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0b17c96705
This patch switches MIPS to make use of generically implemented queued
spinlocks, rather than the ticket spinlocks used previously. This allows
us to drop a whole load of inline assembly, share more generic code, and
is also a performance win.
Results from running the AIM7 short workload on a MIPS Creator Ci40 (ie.
2 core 2 thread interAptiv CPU clocked at 546MHz) with v4.12-rc4
pistachio_defconfig, with ftrace disabled due to a current bug, and both
with & without use of queued rwlocks & spinlocks:
Forks | v4.12-rc4 | +qlocks | Change
-------|-----------|----------|--------
10 | 52630.32 | 53316.31 | +1.01%
20 | 51777.80 | 52623.15 | +1.02%
30 | 51645.92 | 52517.26 | +1.02%
40 | 51634.88 | 52419.89 | +1.02%
50 | 51506.75 | 52307.81 | +1.02%
60 | 51500.74 | 52322.72 | +1.02%
70 | 51434.81 | 52288.60 | +1.02%
80 | 51423.22 | 52434.85 | +1.02%
90 | 51428.65 | 52410.10 | +1.02%
The kernels used for these tests also had my "MIPS: Hardcode cpu_has_*
where known at compile time due to ISA" patch applied, which allows the
kernel_uses_llsc checks in cmpxchg() & xchg() to be optimised away at
compile time.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16358/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
24 lines
599 B
Makefile
24 lines
599 B
Makefile
# MIPS headers
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generic-(CONFIG_GENERIC_CSUM) += checksum.h
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generic-y += clkdev.h
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generic-y += current.h
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generic-y += dma-contiguous.h
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generic-y += emergency-restart.h
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generic-y += export.h
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generic-y += irq_work.h
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generic-y += local64.h
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generic-y += mcs_spinlock.h
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generic-y += mm-arch-hooks.h
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generic-y += parport.h
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generic-y += percpu.h
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generic-y += preempt.h
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generic-y += qrwlock.h
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generic-y += qspinlock.h
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generic-y += sections.h
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generic-y += segment.h
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generic-y += serial.h
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generic-y += trace_clock.h
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generic-y += unaligned.h
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generic-y += user.h
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generic-y += word-at-a-time.h
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generic-y += xor.h
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