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![Vikas Shivappa](/assets/img/avatar_default.png)
Currently we have pqr_state and rdt_default_state which store the cached CLOSID/RMIDs and the user configured cpu default values respectively. We touch both of these during context switch. Put all of them in one structure so that we can spare a cache line. Reported-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: peterz@infradead.org Cc: eranian@google.com Cc: sai.praneeth.prakhya@intel.com Cc: ak@linux.intel.com Cc: davidcc@google.com Link: http://lkml.kernel.org/r/1502304395-7166-3-git-send-email-vikas.shivappa@linux.intel.com
92 lines
2.6 KiB
C
92 lines
2.6 KiB
C
#ifndef _ASM_X86_INTEL_RDT_SCHED_H
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#define _ASM_X86_INTEL_RDT_SCHED_H
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#ifdef CONFIG_INTEL_RDT
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#include <linux/sched.h>
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#include <linux/jump_label.h>
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#define IA32_PQR_ASSOC 0x0c8f
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/**
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* struct intel_pqr_state - State cache for the PQR MSR
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* @cur_rmid: The cached Resource Monitoring ID
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* @cur_closid: The cached Class Of Service ID
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* @default_rmid: The user assigned Resource Monitoring ID
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* @default_closid: The user assigned cached Class Of Service ID
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*
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* The upper 32 bits of IA32_PQR_ASSOC contain closid and the
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* lower 10 bits rmid. The update to IA32_PQR_ASSOC always
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* contains both parts, so we need to cache them. This also
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* stores the user configured per cpu CLOSID and RMID.
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*
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* The cache also helps to avoid pointless updates if the value does
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* not change.
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*/
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struct intel_pqr_state {
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u32 cur_rmid;
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u32 cur_closid;
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u32 default_rmid;
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u32 default_closid;
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};
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DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
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DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key);
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DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key);
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/*
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* __intel_rdt_sched_in() - Writes the task's CLOSid/RMID to IA32_PQR_MSR
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*
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* Following considerations are made so that this has minimal impact
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* on scheduler hot path:
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* - This will stay as no-op unless we are running on an Intel SKU
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* which supports resource control or monitoring and we enable by
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* mounting the resctrl file system.
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* - Caches the per cpu CLOSid/RMID values and does the MSR write only
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* when a task with a different CLOSid/RMID is scheduled in.
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* - We allocate RMIDs/CLOSids globally in order to keep this as
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* simple as possible.
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* Must be called with preemption disabled.
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*/
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static void __intel_rdt_sched_in(void)
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{
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struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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u32 closid = state->default_closid;
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u32 rmid = state->default_rmid;
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/*
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* If this task has a closid/rmid assigned, use it.
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* Else use the closid/rmid assigned to this cpu.
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*/
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if (static_branch_likely(&rdt_alloc_enable_key)) {
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if (current->closid)
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closid = current->closid;
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}
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if (static_branch_likely(&rdt_mon_enable_key)) {
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if (current->rmid)
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rmid = current->rmid;
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}
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if (closid != state->cur_closid || rmid != state->cur_rmid) {
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state->cur_closid = closid;
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state->cur_rmid = rmid;
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wrmsr(IA32_PQR_ASSOC, rmid, closid);
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}
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}
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static inline void intel_rdt_sched_in(void)
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{
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if (static_branch_likely(&rdt_enable_key))
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__intel_rdt_sched_in();
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}
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#else
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static inline void intel_rdt_sched_in(void) {}
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#endif /* CONFIG_INTEL_RDT */
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#endif /* _ASM_X86_INTEL_RDT_SCHED_H */
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