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ef9e56d894
With single CPU affinities the post SMP boot vector update is pointless as it will just leave the affinities on the same vectors and the same CPUs. Remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Yu Chen <yu.c.chen@intel.com> Acked-by: Juergen Gross <jgross@suse.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Link: https://lkml.kernel.org/r/20170913213154.308697243@linutronix.de
237 lines
5.6 KiB
C
237 lines
5.6 KiB
C
#ifndef _ASM_X86_IO_APIC_H
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#define _ASM_X86_IO_APIC_H
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#include <linux/types.h>
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#include <asm/mpspec.h>
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#include <asm/apicdef.h>
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#include <asm/irq_vectors.h>
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#include <asm/x86_init.h>
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/*
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* Intel IO-APIC support for SMP and UP systems.
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*
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* Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
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*/
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/* I/O Unit Redirection Table */
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#define IO_APIC_REDIR_VECTOR_MASK 0x000FF
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#define IO_APIC_REDIR_DEST_LOGICAL 0x00800
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#define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
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#define IO_APIC_REDIR_SEND_PENDING (1 << 12)
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#define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
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#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
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#define IO_APIC_REDIR_MASKED (1 << 16)
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/*
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* The structure of the IO-APIC:
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*/
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union IO_APIC_reg_00 {
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u32 raw;
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struct {
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u32 __reserved_2 : 14,
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LTS : 1,
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delivery_type : 1,
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__reserved_1 : 8,
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ID : 8;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_01 {
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u32 raw;
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struct {
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u32 version : 8,
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__reserved_2 : 7,
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PRQ : 1,
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entries : 8,
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__reserved_1 : 8;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_02 {
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u32 raw;
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struct {
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u32 __reserved_2 : 24,
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arbitration : 4,
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__reserved_1 : 4;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_03 {
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u32 raw;
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struct {
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u32 boot_DT : 1,
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__reserved_1 : 31;
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} __attribute__ ((packed)) bits;
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};
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struct IO_APIC_route_entry {
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__u32 vector : 8,
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delivery_mode : 3, /* 000: FIXED
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* 001: lowest prio
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* 111: ExtINT
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*/
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dest_mode : 1, /* 0: physical, 1: logical */
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delivery_status : 1,
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polarity : 1,
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irr : 1,
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trigger : 1, /* 0: edge, 1: level */
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mask : 1, /* 0: enabled, 1: disabled */
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__reserved_2 : 15;
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__u32 __reserved_3 : 24,
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dest : 8;
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} __attribute__ ((packed));
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struct IR_IO_APIC_route_entry {
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__u64 vector : 8,
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zero : 3,
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index2 : 1,
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delivery_status : 1,
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polarity : 1,
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irr : 1,
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trigger : 1,
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mask : 1,
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reserved : 31,
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format : 1,
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index : 15;
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} __attribute__ ((packed));
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struct irq_alloc_info;
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struct ioapic_domain_cfg;
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#define IOAPIC_AUTO -1
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#define IOAPIC_EDGE 0
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#define IOAPIC_LEVEL 1
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#define IOAPIC_MASKED 1
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#define IOAPIC_UNMASKED 0
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#define IOAPIC_POL_HIGH 0
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#define IOAPIC_POL_LOW 1
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#define IOAPIC_DEST_MODE_PHYSICAL 0
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#define IOAPIC_DEST_MODE_LOGICAL 1
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#define IOAPIC_MAP_ALLOC 0x1
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#define IOAPIC_MAP_CHECK 0x2
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#ifdef CONFIG_X86_IO_APIC
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/*
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* # of IO-APICs and # of IRQ routing registers
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*/
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extern int nr_ioapics;
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extern int mpc_ioapic_id(int ioapic);
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extern unsigned int mpc_ioapic_addr(int ioapic);
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/* # of MP IRQ source entries */
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extern int mp_irq_entries;
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/* MP IRQ source entries */
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extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
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/* 1 if "noapic" boot option passed */
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extern int skip_ioapic_setup;
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/* 1 if "noapic" boot option passed */
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extern int noioapicquirk;
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/* -1 if "noapic" boot option passed */
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extern int noioapicreroute;
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extern u32 gsi_top;
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extern unsigned long io_apic_irqs;
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#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
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/*
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* If we use the IO-APIC for IRQ routing, disable automatic
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* assignment of PCI IRQ's.
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*/
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#define io_apic_assign_pci_irqs \
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(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
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struct irq_cfg;
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extern void ioapic_insert_resources(void);
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extern int arch_early_ioapic_init(void);
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extern int save_ioapic_entries(void);
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extern void mask_ioapic_entries(void);
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extern int restore_ioapic_entries(void);
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extern void setup_ioapic_ids_from_mpc(void);
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extern void setup_ioapic_ids_from_mpc_nocheck(void);
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extern int mp_find_ioapic(u32 gsi);
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extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
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extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
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struct irq_alloc_info *info);
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extern void mp_unmap_irq(int irq);
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extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg);
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extern int mp_unregister_ioapic(u32 gsi_base);
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extern int mp_ioapic_registered(u32 gsi_base);
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extern void ioapic_set_alloc_attr(struct irq_alloc_info *info,
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int node, int trigger, int polarity);
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extern void mp_save_irq(struct mpc_intsrc *m);
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extern void disable_ioapic_support(void);
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extern void __init io_apic_init_mappings(void);
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extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
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extern void native_disable_io_apic(void);
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static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
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{
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return x86_io_apic_ops.read(apic, reg);
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}
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extern void setup_IO_APIC(void);
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extern void enable_IO_APIC(void);
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extern void disable_IO_APIC(void);
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extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);
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extern void print_IO_APICs(void);
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#else /* !CONFIG_X86_IO_APIC */
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#define IO_APIC_IRQ(x) 0
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#define io_apic_assign_pci_irqs 0
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#define setup_ioapic_ids_from_mpc x86_init_noop
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static inline void ioapic_insert_resources(void) { }
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static inline int arch_early_ioapic_init(void) { return 0; }
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static inline void print_IO_APICs(void) {}
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#define gsi_top (NR_IRQS_LEGACY)
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static inline int mp_find_ioapic(u32 gsi) { return 0; }
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static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
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struct irq_alloc_info *info)
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{
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return gsi;
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}
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static inline void mp_unmap_irq(int irq) { }
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static inline int save_ioapic_entries(void)
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{
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return -ENOMEM;
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}
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static inline void mask_ioapic_entries(void) { }
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static inline int restore_ioapic_entries(void)
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{
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return -ENOMEM;
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}
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static inline void mp_save_irq(struct mpc_intsrc *m) { }
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static inline void disable_ioapic_support(void) { }
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static inline void io_apic_init_mappings(void) { }
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#define native_io_apic_read NULL
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#define native_disable_io_apic NULL
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static inline void setup_IO_APIC(void) { }
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static inline void enable_IO_APIC(void) { }
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#endif
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#endif /* _ASM_X86_IO_APIC_H */
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