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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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4e237903f9
After issuing successive kexecs it was found that the SHA hash failed verification when booting the kexec'd kernel. When SME is enabled, the change from using pages that were marked encrypted to now being marked as not encrypted (through new identify mapped page tables) results in memory corruption if there are any cache entries for the previously encrypted pages. This is because separate cache entries can exist for the same physical location but tagged both with and without the encryption bit. To prevent this, issue a wbinvd if SME is active before copying the pages from the source location to the destination location to clear any possible cache entry conflicts. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Cc: <kexec@lists.infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Dave Young <dyoung@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/e7fb8610af3a93e8f8ae6f214cd9249adc0df2b4.1501186516.git.thomas.lendacky@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
227 lines
6.4 KiB
C
227 lines
6.4 KiB
C
#ifndef _ASM_X86_KEXEC_H
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#define _ASM_X86_KEXEC_H
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#ifdef CONFIG_X86_32
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# define PA_CONTROL_PAGE 0
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# define VA_CONTROL_PAGE 1
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# define PA_PGD 2
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# define PA_SWAP_PAGE 3
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# define PAGES_NR 4
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#else
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# define PA_CONTROL_PAGE 0
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# define VA_CONTROL_PAGE 1
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# define PA_TABLE_PAGE 2
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# define PA_SWAP_PAGE 3
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# define PAGES_NR 4
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#endif
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# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
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#ifndef __ASSEMBLY__
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#include <linux/string.h>
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#include <asm/page.h>
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#include <asm/ptrace.h>
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#include <asm/bootparam.h>
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struct kimage;
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/*
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* KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
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* I.e. Maximum page that is mapped directly into kernel memory,
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* and kmap is not required.
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*
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* So far x86_64 is limited to 40 physical address bits.
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*/
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#ifdef CONFIG_X86_32
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/* Maximum physical address we can use pages from */
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# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
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/* Maximum address we can reach in physical address mode */
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# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
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/* Maximum address we can use for the control code buffer */
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# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
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# define KEXEC_CONTROL_PAGE_SIZE 4096
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/* The native architecture */
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# define KEXEC_ARCH KEXEC_ARCH_386
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/* We can also handle crash dumps from 64 bit kernel. */
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# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
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#else
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/* Maximum physical address we can use pages from */
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# define KEXEC_SOURCE_MEMORY_LIMIT (MAXMEM-1)
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/* Maximum address we can reach in physical address mode */
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# define KEXEC_DESTINATION_MEMORY_LIMIT (MAXMEM-1)
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/* Maximum address we can use for the control pages */
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# define KEXEC_CONTROL_MEMORY_LIMIT (MAXMEM-1)
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/* Allocate one page for the pdp and the second for the code */
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# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
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/* The native architecture */
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# define KEXEC_ARCH KEXEC_ARCH_X86_64
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#endif
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/* Memory to backup during crash kdump */
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#define KEXEC_BACKUP_SRC_START (0UL)
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#define KEXEC_BACKUP_SRC_END (640 * 1024UL) /* 640K */
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/*
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* CPU does not save ss and sp on stack if execution is already
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* running in kernel mode at the time of NMI occurrence. This code
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* fixes it.
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*/
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static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
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struct pt_regs *oldregs)
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{
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#ifdef CONFIG_X86_32
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newregs->sp = (unsigned long)&(oldregs->sp);
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asm volatile("xorl %%eax, %%eax\n\t"
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"movw %%ss, %%ax\n\t"
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:"=a"(newregs->ss));
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#endif
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}
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/*
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* This function is responsible for capturing register states if coming
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* via panic otherwise just fix up the ss and sp if coming via kernel
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* mode exception.
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*/
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static inline void crash_setup_regs(struct pt_regs *newregs,
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struct pt_regs *oldregs)
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{
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if (oldregs) {
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memcpy(newregs, oldregs, sizeof(*newregs));
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crash_fixup_ss_esp(newregs, oldregs);
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} else {
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#ifdef CONFIG_X86_32
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asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
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asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
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asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
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asm volatile("movl %%esi,%0" : "=m"(newregs->si));
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asm volatile("movl %%edi,%0" : "=m"(newregs->di));
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asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
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asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
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asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
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asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
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asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
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asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
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asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
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asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
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#else
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asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
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asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
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asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
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asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
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asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
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asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
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asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
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asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
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asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
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asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
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asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
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asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
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asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
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asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
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asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
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asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
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asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
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asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
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asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
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#endif
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newregs->ip = (unsigned long)current_text_addr();
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}
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}
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#ifdef CONFIG_X86_32
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asmlinkage unsigned long
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relocate_kernel(unsigned long indirection_page,
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unsigned long control_page,
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unsigned long start_address,
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unsigned int has_pae,
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unsigned int preserve_context);
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#else
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unsigned long
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relocate_kernel(unsigned long indirection_page,
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unsigned long page_list,
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unsigned long start_address,
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unsigned int preserve_context,
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unsigned int sme_active);
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#endif
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#define ARCH_HAS_KIMAGE_ARCH
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#ifdef CONFIG_X86_32
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struct kimage_arch {
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pgd_t *pgd;
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#ifdef CONFIG_X86_PAE
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pmd_t *pmd0;
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pmd_t *pmd1;
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#endif
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pte_t *pte0;
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pte_t *pte1;
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};
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#else
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struct kimage_arch {
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p4d_t *p4d;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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/* Details of backup region */
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unsigned long backup_src_start;
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unsigned long backup_src_sz;
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/* Physical address of backup segment */
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unsigned long backup_load_addr;
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/* Core ELF header buffer */
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void *elf_headers;
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unsigned long elf_headers_sz;
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unsigned long elf_load_addr;
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};
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#endif /* CONFIG_X86_32 */
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#ifdef CONFIG_X86_64
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/*
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* Number of elements and order of elements in this structure should match
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* with the ones in arch/x86/purgatory/entry64.S. If you make a change here
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* make an appropriate change in purgatory too.
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*/
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struct kexec_entry64_regs {
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uint64_t rax;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rbx;
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uint64_t rsp;
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uint64_t rbp;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t r8;
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uint64_t r9;
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uint64_t r10;
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uint64_t r11;
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uint64_t r12;
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uint64_t r13;
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uint64_t r14;
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uint64_t r15;
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uint64_t rip;
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};
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extern int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages,
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gfp_t gfp);
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#define arch_kexec_post_alloc_pages arch_kexec_post_alloc_pages
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extern void arch_kexec_pre_free_pages(void *vaddr, unsigned int pages);
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#define arch_kexec_pre_free_pages arch_kexec_pre_free_pages
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#endif
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typedef void crash_vmclear_fn(void);
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extern crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;
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extern void kdump_nmi_shootdown_cpus(void);
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_X86_KEXEC_H */
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