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![Andy Lutomirski](/assets/img/avatar_default.png)
Putting the logical ASID into CR3's PCID bits directly means that we have two cases to consider separately: ASID == 0 and ASID != 0. This means that bugs that only hit in one of these cases trigger nondeterministically. There were some bugs like this in the past, and I think there's still one in current kernels. In particular, we have a number of ASID-unware code paths that save CR3, write some special value, and then restore CR3. This includes suspend/resume, hibernate, kexec, EFI, and maybe other things I've missed. This is currently dangerous: if ASID != 0, then this code sequence will leave garbage in the TLB tagged for ASID 0. We could potentially see corruption when switching back to ASID 0. In principle, an initialize_tlbstate_and_flush() call after these sequences would solve the problem, but EFI, at least, does not call this. (And it probably shouldn't -- initialize_tlbstate_and_flush() is rather expensive.) Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bpetkov@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/cdc14bbe5d3c3ef2a562be09a6368ffe9bd947a6.1505663533.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
335 lines
9.2 KiB
C
335 lines
9.2 KiB
C
#ifndef _ASM_X86_MMU_CONTEXT_H
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#define _ASM_X86_MMU_CONTEXT_H
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#include <asm/desc.h>
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#include <linux/atomic.h>
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#include <linux/mm_types.h>
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#include <linux/pkeys.h>
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#include <trace/events/tlb.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/paravirt.h>
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#include <asm/mpx.h>
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extern atomic64_t last_mm_ctx_id;
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#ifndef CONFIG_PARAVIRT
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static inline void paravirt_activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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}
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#endif /* !CONFIG_PARAVIRT */
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#ifdef CONFIG_PERF_EVENTS
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extern struct static_key rdpmc_always_available;
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static inline void load_mm_cr4(struct mm_struct *mm)
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{
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if (static_key_false(&rdpmc_always_available) ||
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atomic_read(&mm->context.perf_rdpmc_allowed))
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cr4_set_bits(X86_CR4_PCE);
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else
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cr4_clear_bits(X86_CR4_PCE);
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}
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#else
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static inline void load_mm_cr4(struct mm_struct *mm) {}
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#endif
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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/*
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* ldt_structs can be allocated, used, and freed, but they are never
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* modified while live.
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*/
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struct ldt_struct {
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/*
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* Xen requires page-aligned LDTs with special permissions. This is
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* needed to prevent us from installing evil descriptors such as
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* call gates. On native, we could merge the ldt_struct and LDT
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* allocations, but it's not worth trying to optimize.
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*/
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struct desc_struct *entries;
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unsigned int nr_entries;
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};
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/*
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* Used for LDT copy/destruction.
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*/
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int init_new_context_ldt(struct task_struct *tsk, struct mm_struct *mm);
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void destroy_context_ldt(struct mm_struct *mm);
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#else /* CONFIG_MODIFY_LDT_SYSCALL */
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static inline int init_new_context_ldt(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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return 0;
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}
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static inline void destroy_context_ldt(struct mm_struct *mm) {}
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#endif
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static inline void load_mm_ldt(struct mm_struct *mm)
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{
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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struct ldt_struct *ldt;
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/* lockless_dereference synchronizes with smp_store_release */
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ldt = lockless_dereference(mm->context.ldt);
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/*
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* Any change to mm->context.ldt is followed by an IPI to all
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* CPUs with the mm active. The LDT will not be freed until
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* after the IPI is handled by all such CPUs. This means that,
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* if the ldt_struct changes before we return, the values we see
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* will be safe, and the new values will be loaded before we run
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* any user code.
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*
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* NB: don't try to convert this to use RCU without extreme care.
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* We would still need IRQs off, because we don't want to change
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* the local LDT after an IPI loaded a newer value than the one
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* that we can see.
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*/
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if (unlikely(ldt))
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set_ldt(ldt->entries, ldt->nr_entries);
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else
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clear_LDT();
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#else
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clear_LDT();
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#endif
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}
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static inline void switch_ldt(struct mm_struct *prev, struct mm_struct *next)
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{
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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/*
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* Load the LDT if either the old or new mm had an LDT.
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*
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* An mm will never go from having an LDT to not having an LDT. Two
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* mms never share an LDT, so we don't gain anything by checking to
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* see whether the LDT changed. There's also no guarantee that
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* prev->context.ldt actually matches LDTR, but, if LDTR is non-NULL,
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* then prev->context.ldt will also be non-NULL.
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*
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* If we really cared, we could optimize the case where prev == next
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* and we're exiting lazy mode. Most of the time, if this happens,
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* we don't actually need to reload LDTR, but modify_ldt() is mostly
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* used by legacy code and emulators where we don't need this level of
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* performance.
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*
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* This uses | instead of || because it generates better code.
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*/
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if (unlikely((unsigned long)prev->context.ldt |
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(unsigned long)next->context.ldt))
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load_mm_ldt(next);
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#endif
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DEBUG_LOCKS_WARN_ON(preemptible());
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}
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (cpumask_test_cpu(cpu, mm_cpumask(mm)))
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cpumask_clear_cpu(cpu, mm_cpumask(mm));
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}
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
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atomic64_set(&mm->context.tlb_gen, 0);
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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if (cpu_feature_enabled(X86_FEATURE_OSPKE)) {
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/* pkey 0 is the default and always allocated */
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mm->context.pkey_allocation_map = 0x1;
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/* -1 means unallocated or invalid */
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mm->context.execute_only_pkey = -1;
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}
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#endif
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return init_new_context_ldt(tsk, mm);
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}
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static inline void destroy_context(struct mm_struct *mm)
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{
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destroy_context_ldt(mm);
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}
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extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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extern void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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#define switch_mm_irqs_off switch_mm_irqs_off
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#define activate_mm(prev, next) \
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do { \
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paravirt_activate_mm((prev), (next)); \
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switch_mm((prev), (next), NULL); \
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} while (0);
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#ifdef CONFIG_X86_32
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#define deactivate_mm(tsk, mm) \
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do { \
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lazy_load_gs(0); \
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} while (0)
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#else
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#define deactivate_mm(tsk, mm) \
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do { \
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load_gs_index(0); \
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loadsegment(fs, 0); \
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} while (0)
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#endif
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static inline void arch_dup_mmap(struct mm_struct *oldmm,
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struct mm_struct *mm)
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{
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paravirt_arch_dup_mmap(oldmm, mm);
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}
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static inline void arch_exit_mmap(struct mm_struct *mm)
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{
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paravirt_arch_exit_mmap(mm);
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}
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#ifdef CONFIG_X86_64
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static inline bool is_64bit_mm(struct mm_struct *mm)
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{
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return !IS_ENABLED(CONFIG_IA32_EMULATION) ||
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!(mm->context.ia32_compat == TIF_IA32);
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}
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#else
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static inline bool is_64bit_mm(struct mm_struct *mm)
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{
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return false;
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}
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#endif
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static inline void arch_bprm_mm_init(struct mm_struct *mm,
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struct vm_area_struct *vma)
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{
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mpx_mm_init(mm);
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}
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static inline void arch_unmap(struct mm_struct *mm, struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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/*
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* mpx_notify_unmap() goes and reads a rarely-hot
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* cacheline in the mm_struct. That can be expensive
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* enough to be seen in profiles.
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*
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* The mpx_notify_unmap() call and its contents have been
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* observed to affect munmap() performance on hardware
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* where MPX is not present.
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*
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* The unlikely() optimizes for the fast case: no MPX
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* in the CPU, or no MPX use in the process. Even if
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* we get this wrong (in the unlikely event that MPX
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* is widely enabled on some system) the overhead of
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* MPX itself (reading bounds tables) is expected to
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* overwhelm the overhead of getting this unlikely()
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* consistently wrong.
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*/
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if (unlikely(cpu_feature_enabled(X86_FEATURE_MPX)))
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mpx_notify_unmap(mm, vma, start, end);
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}
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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static inline int vma_pkey(struct vm_area_struct *vma)
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{
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unsigned long vma_pkey_mask = VM_PKEY_BIT0 | VM_PKEY_BIT1 |
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VM_PKEY_BIT2 | VM_PKEY_BIT3;
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return (vma->vm_flags & vma_pkey_mask) >> VM_PKEY_SHIFT;
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}
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#else
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static inline int vma_pkey(struct vm_area_struct *vma)
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{
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return 0;
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}
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#endif
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/*
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* We only want to enforce protection keys on the current process
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* because we effectively have no access to PKRU for other
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* processes or any way to tell *which * PKRU in a threaded
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* process we could use.
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*
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* So do not enforce things if the VMA is not from the current
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* mm, or if we are in a kernel thread.
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*/
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static inline bool vma_is_foreign(struct vm_area_struct *vma)
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{
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if (!current->mm)
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return true;
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/*
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* Should PKRU be enforced on the access to this VMA? If
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* the VMA is from another process, then PKRU has no
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* relevance and should not be enforced.
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*/
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if (current->mm != vma->vm_mm)
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return true;
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return false;
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}
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static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
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bool write, bool execute, bool foreign)
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{
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/* pkeys never affect instruction fetches */
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if (execute)
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return true;
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/* allow access if the VMA is not one from this process */
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if (foreign || vma_is_foreign(vma))
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return true;
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return __pkru_allows_pkey(vma_pkey(vma), write);
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}
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/*
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* If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
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* bits. This serves two purposes. It prevents a nasty situation in
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* which PCID-unaware code saves CR3, loads some other value (with PCID
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* == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
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* the saved ASID was nonzero. It also means that any bugs involving
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* loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
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* deterministically.
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*/
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static inline unsigned long build_cr3(struct mm_struct *mm, u16 asid)
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{
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if (static_cpu_has(X86_FEATURE_PCID)) {
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VM_WARN_ON_ONCE(asid > 4094);
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return __sme_pa(mm->pgd) | (asid + 1);
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} else {
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VM_WARN_ON_ONCE(asid != 0);
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return __sme_pa(mm->pgd);
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}
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}
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static inline unsigned long build_cr3_noflush(struct mm_struct *mm, u16 asid)
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{
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VM_WARN_ON_ONCE(asid > 4094);
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return __sme_pa(mm->pgd) | (asid + 1) | CR3_NOFLUSH;
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}
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/*
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* This can be used from process context to figure out what the value of
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* CR3 is without needing to do a (slow) __read_cr3().
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*
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* It's intended to be used for code like KVM that sneakily changes CR3
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* and needs to restore it. It needs to be used very carefully.
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*/
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static inline unsigned long __get_current_cr3_fast(void)
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{
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unsigned long cr3 = build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm),
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this_cpu_read(cpu_tlbstate.loaded_mm_asid));
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/* For now, be very restrictive about when this can be called. */
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VM_WARN_ON(in_nmi() || preemptible());
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VM_BUG_ON(cr3 != __read_cr3());
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return cr3;
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}
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#endif /* _ASM_X86_MMU_CONTEXT_H */
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