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4c7c44837b
The first part of memory map (up to %esp fixup) simply scales existing map for 4-level paging by factor of 9 -- number of bits addressed by the additional page table level. The rest of the map is unchanged. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170330080731.65421-4-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
39 lines
999 B
C
39 lines
999 B
C
#ifndef _ASM_X86_SPARSEMEM_H
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#define _ASM_X86_SPARSEMEM_H
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#ifdef CONFIG_SPARSEMEM
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/*
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* generic non-linear memory support:
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*
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* 1) we will not split memory into more chunks than will fit into the flags
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* field of the struct page
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*
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* SECTION_SIZE_BITS 2^n: size of each section
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* MAX_PHYSADDR_BITS 2^n: max size of physical address space
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* MAX_PHYSMEM_BITS 2^n: how much memory we can have in that space
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*
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*/
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#ifdef CONFIG_X86_32
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# ifdef CONFIG_X86_PAE
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# define SECTION_SIZE_BITS 29
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# define MAX_PHYSADDR_BITS 36
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# define MAX_PHYSMEM_BITS 36
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# else
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# define SECTION_SIZE_BITS 26
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# define MAX_PHYSADDR_BITS 32
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# define MAX_PHYSMEM_BITS 32
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# endif
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#else /* CONFIG_X86_32 */
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# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */
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# ifdef CONFIG_X86_5LEVEL
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# define MAX_PHYSADDR_BITS 52
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# define MAX_PHYSMEM_BITS 52
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# else
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# define MAX_PHYSADDR_BITS 44
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# define MAX_PHYSMEM_BITS 46
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# endif
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#endif
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#endif /* CONFIG_SPARSEMEM */
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#endif /* _ASM_X86_SPARSEMEM_H */
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