126 lines
2.4 KiB
C
126 lines
2.4 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include <drm/drm_managed.h>
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#include "xe_bo.h"
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#include "xe_device.h"
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#include "xe_gt.h"
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#include "xe_guc.h"
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#include "xe_guc_hwconfig.h"
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#include "xe_map.h"
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static struct xe_gt *
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guc_to_gt(struct xe_guc *guc)
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{
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return container_of(guc, struct xe_gt, uc.guc);
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}
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static struct xe_device *
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guc_to_xe(struct xe_guc *guc)
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{
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return gt_to_xe(guc_to_gt(guc));
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}
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static int send_get_hwconfig(struct xe_guc *guc, u32 ggtt_addr, u32 size)
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{
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u32 action[] = {
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XE_GUC_ACTION_GET_HWCONFIG,
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lower_32_bits(ggtt_addr),
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upper_32_bits(ggtt_addr),
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size,
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};
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return xe_guc_send_mmio(guc, action, ARRAY_SIZE(action));
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}
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static int guc_hwconfig_size(struct xe_guc *guc, u32 *size)
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{
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int ret = send_get_hwconfig(guc, 0, 0);
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if (ret < 0)
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return ret;
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*size = ret;
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return 0;
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}
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static int guc_hwconfig_copy(struct xe_guc *guc)
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{
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int ret = send_get_hwconfig(guc, xe_bo_ggtt_addr(guc->hwconfig.bo),
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guc->hwconfig.size);
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if (ret < 0)
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return ret;
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return 0;
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}
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static void guc_hwconfig_fini(struct drm_device *drm, void *arg)
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{
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struct xe_guc *guc = arg;
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xe_bo_unpin_map_no_vm(guc->hwconfig.bo);
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}
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int xe_guc_hwconfig_init(struct xe_guc *guc)
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{
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struct xe_device *xe = guc_to_xe(guc);
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struct xe_gt *gt = guc_to_gt(guc);
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struct xe_bo *bo;
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u32 size;
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int err;
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/* Initialization already done */
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if (guc->hwconfig.bo)
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return 0;
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/*
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* All hwconfig the same across GTs so only GT0 needs to be configured
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*/
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if (gt->info.id != XE_GT0)
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return 0;
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/* ADL_P, DG2+ supports hwconfig table */
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if (GRAPHICS_VERx100(xe) < 1255 && xe->info.platform != XE_ALDERLAKE_P)
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return 0;
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err = guc_hwconfig_size(guc, &size);
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if (err)
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return err;
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if (!size)
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return -EINVAL;
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bo = xe_bo_create_pin_map(xe, gt, NULL, PAGE_ALIGN(size),
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ttm_bo_type_kernel,
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XE_BO_CREATE_VRAM_IF_DGFX(gt) |
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XE_BO_CREATE_GGTT_BIT);
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if (IS_ERR(bo))
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return PTR_ERR(bo);
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guc->hwconfig.bo = bo;
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guc->hwconfig.size = size;
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err = drmm_add_action_or_reset(&xe->drm, guc_hwconfig_fini, guc);
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if (err)
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return err;
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return guc_hwconfig_copy(guc);
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}
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u32 xe_guc_hwconfig_size(struct xe_guc *guc)
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{
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return !guc->hwconfig.bo ? 0 : guc->hwconfig.size;
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}
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void xe_guc_hwconfig_copy(struct xe_guc *guc, void *dst)
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{
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struct xe_device *xe = guc_to_xe(guc);
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XE_BUG_ON(!guc->hwconfig.bo);
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xe_map_memcpy_from(xe, dst, &guc->hwconfig.bo->vmap, 0,
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guc->hwconfig.size);
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}
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