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dd3e6e8c6e
Unify the top comment and the includes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
132 lines
3.2 KiB
C
132 lines
3.2 KiB
C
/*
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* Copyright (c) 1991,1992,1995 Linus Torvalds
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* Copyright (c) 1994 Alan Modra
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* Copyright (c) 1995 Markus Kuhn
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* Copyright (c) 1996 Ingo Molnar
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* Copyright (c) 1998 Andrea Arcangeli
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* Copyright (c) 2002,2006 Vojtech Pavlik
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* Copyright (c) 2003 Andi Kleen
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*
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/mca.h>
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#include <asm/vsyscall.h>
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#include <asm/x86_init.h>
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#include <asm/i8259.h>
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#include <asm/i8253.h>
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#include <asm/timer.h>
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#include <asm/hpet.h>
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#include <asm/time.h>
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#include <asm/nmi.h>
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int timer_ack;
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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#ifdef CONFIG_SMP
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if (!user_mode_vm(regs) && in_lock_functions(pc)) {
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#ifdef CONFIG_FRAME_POINTER
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return *(unsigned long *)(regs->bp + sizeof(long));
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#else
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unsigned long *sp = (unsigned long *)®s->sp;
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/* Return address is either directly at stack pointer
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or above a saved flags. Eflags has bits 22-31 zero,
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kernel addresses don't. */
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if (sp[0] >> 22)
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return sp[0];
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if (sp[1] >> 22)
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return sp[1];
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#endif
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}
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#endif
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* This is the same as the above, except we _also_ save the current
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* Time Stamp Counter value at the time of the timer interrupt, so that
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* we later on can estimate the time of day more exactly.
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*/
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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/* Keep nmi watchdog up to date */
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inc_irq_stat(irq0_irqs);
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#ifdef CONFIG_X86_IO_APIC
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if (timer_ack) {
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/*
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* Subtle, when I/O APICs are used we have to ack timer IRQ
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* manually to deassert NMI lines for the watchdog if run
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* on an 82489DX-based system.
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*/
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spin_lock(&i8259A_lock);
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outb(0x0c, PIC_MASTER_OCW3);
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/* Ack the IRQ; AEOI will end it automatically. */
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inb(PIC_MASTER_POLL);
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spin_unlock(&i8259A_lock);
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}
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#endif
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global_clock_event->event_handler(global_clock_event);
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#ifdef CONFIG_MCA
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if (MCA_bus) {
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/* The PS/2 uses level-triggered interrupts. You can't
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turn them off, nor would you want to (any attempt to
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enable edge-triggered interrupts usually gets intercepted by a
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special hardware circuit). Hence we have to acknowledge
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the timer interrupt. Through some incredibly stupid
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design idea, the reset for IRQ 0 is done by setting the
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high bit of the PPI port B (0x61). Note that some PS/2s,
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notably the 55SX, work fine if this is removed. */
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u8 irq_v = inb_p(0x61); /* read the current state */
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outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */
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}
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#endif
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return IRQ_HANDLED;
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
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.name = "timer"
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};
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void __init setup_default_timer_irq(void)
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{
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irq0.mask = cpumask_of_cpu(0);
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setup_irq(0, &irq0);
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}
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/* Default timer init function */
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void __init hpet_time_init(void)
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{
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if (!hpet_enable())
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setup_pit_timer();
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setup_default_timer_irq();
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}
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static void x86_late_time_init(void)
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{
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x86_init.timers.timer_init();
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}
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/*
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* Initialize TSC and delay the periodic timer init to
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* late x86_late_time_init() so ioremap works.
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*/
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void __init time_init(void)
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{
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tsc_init();
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late_time_init = x86_late_time_init;
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}
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