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938a0447f0
The RTL8822BE, an 802.11ac wireless network card, is now appearing in new computers. Its driver is being placed in staging to reduce the time that users of this new card will have access to in-kernel drivers. New Realtek devices implement a common sub-driver to control the MAC layer. The RTL8822BE is the first of these devices, thus its introduction involves some extra code. In the wireless tree, this will be a separate module; however, it is compiled into the 8822be driver here. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
116 lines
3.3 KiB
C
116 lines
3.3 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2016 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef HALMAC_POWER_SEQUENCE_CMD
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#define HALMAC_POWER_SEQUENCE_CMD
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#include "halmac_2_platform.h"
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#include "halmac_type.h"
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#define HALMAC_POLLING_READY_TIMEOUT_COUNT 20000
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/* The value of cmd : 4 bits */
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/* offset : the read register offset
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* msk : the mask of the read value
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* value : N/A, left by 0
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* Note : dirver shall implement this function by read & msk
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*/
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#define HALMAC_PWR_CMD_READ 0x00
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/*
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* offset: the read register offset
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* msk: the mask of the write bits
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* value: write value
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* Note: driver shall implement this cmd by read & msk after write
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*/
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#define HALMAC_PWR_CMD_WRITE 0x01
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/* offset: the read register offset
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* msk: the mask of the polled value
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* value: the value to be polled, masked by the msd field.
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* Note: driver shall implement this cmd by
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* do{
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* if( (Read(offset) & msk) == (value & msk) )
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* break;
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* } while(not timeout);
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*/
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#define HALMAC_PWR_CMD_POLLING 0x02
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/* offset: the value to delay
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* msk: N/A
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* value: the unit of delay, 0: us, 1: ms
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*/
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#define HALMAC_PWR_CMD_DELAY 0x03
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/* offset: N/A
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* msk: N/A
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* value: N/A
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*/
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#define HALMAC_PWR_CMD_END 0x04
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/* The value of base : 4 bits */
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/* define the base address of each block */
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#define HALMAC_PWR_BASEADDR_MAC 0x00
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#define HALMAC_PWR_BASEADDR_USB 0x01
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#define HALMAC_PWR_BASEADDR_PCIE 0x02
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#define HALMAC_PWR_BASEADDR_SDIO 0x03
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/* The value of interface_msk : 4 bits */
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#define HALMAC_PWR_INTF_SDIO_MSK BIT(0)
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#define HALMAC_PWR_INTF_USB_MSK BIT(1)
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#define HALMAC_PWR_INTF_PCI_MSK BIT(2)
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#define HALMAC_PWR_INTF_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
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/* The value of fab_msk : 4 bits */
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#define HALMAC_PWR_FAB_TSMC_MSK BIT(0)
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#define HALMAC_PWR_FAB_UMC_MSK BIT(1)
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#define HALMAC_PWR_FAB_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
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/* The value of cut_msk : 8 bits */
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#define HALMAC_PWR_CUT_TESTCHIP_MSK BIT(0)
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#define HALMAC_PWR_CUT_A_MSK BIT(1)
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#define HALMAC_PWR_CUT_B_MSK BIT(2)
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#define HALMAC_PWR_CUT_C_MSK BIT(3)
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#define HALMAC_PWR_CUT_D_MSK BIT(4)
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#define HALMAC_PWR_CUT_E_MSK BIT(5)
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#define HALMAC_PWR_CUT_F_MSK BIT(6)
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#define HALMAC_PWR_CUT_G_MSK BIT(7)
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#define HALMAC_PWR_CUT_ALL_MSK 0xFF
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enum halmac_pwrseq_cmd_delay_unit_ {
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HALMAC_PWRSEQ_DELAY_US,
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HALMAC_PWRSEQ_DELAY_MS,
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};
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/*Don't care endian issue, because element of pwer seq vector is fixed address*/
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struct halmac_wl_pwr_cfg_ {
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u16 offset;
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u8 cut_msk;
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u8 fab_msk : 4;
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u8 interface_msk : 4;
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u8 base : 4;
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u8 cmd : 4;
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u8 msk;
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u8 value;
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};
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#endif
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