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5bef003538
Some atomics can be implemented in several different ways, e.g. FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms of FULL ordered atomics. Other atomics are optional, and don't exist in some configurations (e.g. not all architectures implement the 128-bit cmpxchg ops). Subsequent patches will require that architectures define a preprocessor symbol for any atomic (or ordering variant) which is optional. This will make the fallback ifdeffery more robust, and simplify future changes. Add the required definitions to arch/x86. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-13-mark.rutland@arm.com
90 lines
2.3 KiB
C
90 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CMPXCHG_64_H
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#define _ASM_X86_CMPXCHG_64_H
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#define arch_cmpxchg64(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_cmpxchg((ptr), (o), (n)); \
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})
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#define arch_cmpxchg64_local(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_cmpxchg_local((ptr), (o), (n)); \
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})
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#define arch_try_cmpxchg64(ptr, po, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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arch_try_cmpxchg((ptr), (po), (n)); \
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})
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union __u128_halves {
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u128 full;
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struct {
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u64 low, high;
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};
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};
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#define __arch_cmpxchg128(_ptr, _old, _new, _lock) \
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({ \
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union __u128_halves o = { .full = (_old), }, \
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n = { .full = (_new), }; \
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\
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asm volatile(_lock "cmpxchg16b %[ptr]" \
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: [ptr] "+m" (*(_ptr)), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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o.full; \
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})
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static __always_inline u128 arch_cmpxchg128(volatile u128 *ptr, u128 old, u128 new)
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{
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return __arch_cmpxchg128(ptr, old, new, LOCK_PREFIX);
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}
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#define arch_cmpxchg128 arch_cmpxchg128
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static __always_inline u128 arch_cmpxchg128_local(volatile u128 *ptr, u128 old, u128 new)
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{
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return __arch_cmpxchg128(ptr, old, new,);
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}
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#define arch_cmpxchg128_local arch_cmpxchg128_local
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#define __arch_try_cmpxchg128(_ptr, _oldp, _new, _lock) \
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({ \
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union __u128_halves o = { .full = *(_oldp), }, \
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n = { .full = (_new), }; \
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bool ret; \
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\
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asm volatile(_lock "cmpxchg16b %[ptr]" \
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CC_SET(e) \
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: CC_OUT(e) (ret), \
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[ptr] "+m" (*ptr), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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if (unlikely(!ret)) \
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*(_oldp) = o.full; \
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\
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likely(ret); \
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})
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static __always_inline bool arch_try_cmpxchg128(volatile u128 *ptr, u128 *oldp, u128 new)
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{
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return __arch_try_cmpxchg128(ptr, oldp, new, LOCK_PREFIX);
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}
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#define arch_try_cmpxchg128 arch_try_cmpxchg128
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static __always_inline bool arch_try_cmpxchg128_local(volatile u128 *ptr, u128 *oldp, u128 new)
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{
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return __arch_try_cmpxchg128(ptr, oldp, new,);
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}
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#define arch_try_cmpxchg128_local arch_try_cmpxchg128_local
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#define system_has_cmpxchg128() boot_cpu_has(X86_FEATURE_CX16)
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#endif /* _ASM_X86_CMPXCHG_64_H */
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