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Add an EDAC driver for SiFive SoCs. The initial version supports ECC event monitoring and reporting through the EDAC framework for the SiFive L2 cache controller. It registers for notifier events from the L2 cache controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events. [ bp: Massage commit message. ] Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: James Morse <james.morse@arm.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linux-riscv@lists.infradead.org Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: "Paul E. McKenney" <paulmck@linux.ibm.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: sachin.ghadi@sifive.com Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
87 lines
2.9 KiB
Makefile
87 lines
2.9 KiB
Makefile
#
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# Makefile for the Linux kernel EDAC drivers.
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#
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# Copyright 02 Jul 2003, Linux Networx (http://lnxi.com)
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# This file may be distributed under the terms of the
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# GNU General Public License.
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#
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obj-$(CONFIG_EDAC) := edac_core.o
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edac_core-y := edac_mc.o edac_device.o edac_mc_sysfs.o
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edac_core-y += edac_module.o edac_device_sysfs.o wq.o
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edac_core-$(CONFIG_EDAC_DEBUG) += debugfs.o
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ifdef CONFIG_PCI
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edac_core-y += edac_pci.o edac_pci_sysfs.o
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endif
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obj-$(CONFIG_EDAC_GHES) += ghes_edac.o
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edac_mce_amd-y := mce_amd.o
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obj-$(CONFIG_EDAC_DECODE_MCE) += edac_mce_amd.o
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obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o
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obj-$(CONFIG_EDAC_CPC925) += cpc925_edac.o
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obj-$(CONFIG_EDAC_I5000) += i5000_edac.o
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obj-$(CONFIG_EDAC_I5100) += i5100_edac.o
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obj-$(CONFIG_EDAC_I5400) += i5400_edac.o
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obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
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obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
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obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
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obj-$(CONFIG_EDAC_PND2) += pnd2_edac.o
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obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
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obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
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obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o
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obj-$(CONFIG_EDAC_I82875P) += i82875p_edac.o
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obj-$(CONFIG_EDAC_I82975X) += i82975x_edac.o
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obj-$(CONFIG_EDAC_I3000) += i3000_edac.o
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obj-$(CONFIG_EDAC_I3200) += i3200_edac.o
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obj-$(CONFIG_EDAC_IE31200) += ie31200_edac.o
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obj-$(CONFIG_EDAC_X38) += x38_edac.o
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obj-$(CONFIG_EDAC_I82860) += i82860_edac.o
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obj-$(CONFIG_EDAC_R82600) += r82600_edac.o
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amd64_edac_mod-y := amd64_edac.o
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amd64_edac_mod-$(CONFIG_EDAC_DEBUG) += amd64_edac_dbg.o
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amd64_edac_mod-$(CONFIG_EDAC_AMD64_ERROR_INJECTION) += amd64_edac_inj.o
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obj-$(CONFIG_EDAC_AMD64) += amd64_edac_mod.o
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obj-$(CONFIG_EDAC_PASEMI) += pasemi_edac.o
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mpc85xx_edac_mod-y := fsl_ddr_edac.o mpc85xx_edac.o
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obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o
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layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o
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obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o
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skx_edac-y := skx_common.o skx_base.o
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obj-$(CONFIG_EDAC_SKX) += skx_edac.o
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i10nm_edac-y := skx_common.o i10nm_base.o
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obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o
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obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
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obj-$(CONFIG_EDAC_CELL) += cell_edac.o
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obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o
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obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o
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obj-$(CONFIG_EDAC_AMD8131) += amd8131_edac.o
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obj-$(CONFIG_EDAC_HIGHBANK_MC) += highbank_mc_edac.o
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obj-$(CONFIG_EDAC_HIGHBANK_L2) += highbank_l2_edac.o
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obj-$(CONFIG_EDAC_OCTEON_PC) += octeon_edac-pc.o
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obj-$(CONFIG_EDAC_OCTEON_L2C) += octeon_edac-l2c.o
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obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o
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obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o
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obj-$(CONFIG_EDAC_THUNDERX) += thunderx_edac.o
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obj-$(CONFIG_EDAC_ALTERA) += altera_edac.o
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obj-$(CONFIG_EDAC_SIFIVE) += sifive_edac.o
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obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o
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obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o
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obj-$(CONFIG_EDAC_TI) += ti_edac.o
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obj-$(CONFIG_EDAC_QCOM) += qcom_edac.o
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obj-$(CONFIG_EDAC_ASPEED) += aspeed_edac.o
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