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9d05a96e29
Make the NVMe NAWUN, NAWUPF, NACWU, NPWG, NPWA, NPDG and NOWS attributes available to initator systems for the block backend. Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
503 lines
13 KiB
C
503 lines
13 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015-2016 HGST, a Western Digital Company.
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*/
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#ifndef _NVMET_H
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#define _NVMET_H
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#include <linux/dma-mapping.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/kref.h>
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#include <linux/percpu-refcount.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/uuid.h>
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#include <linux/nvme.h>
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#include <linux/configfs.h>
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#include <linux/rcupdate.h>
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#include <linux/blkdev.h>
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#include <linux/radix-tree.h>
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#define NVMET_ASYNC_EVENTS 4
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#define NVMET_ERROR_LOG_SLOTS 128
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#define NVMET_NO_ERROR_LOC ((u16)-1)
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/*
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* Supported optional AENs:
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*/
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#define NVMET_AEN_CFG_OPTIONAL \
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(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_ANA_CHANGE)
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#define NVMET_DISC_AEN_CFG_OPTIONAL \
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(NVME_AEN_CFG_DISC_CHANGE)
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/*
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* Plus mandatory SMART AENs (we'll never send them, but allow enabling them):
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*/
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#define NVMET_AEN_CFG_ALL \
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(NVME_SMART_CRIT_SPARE | NVME_SMART_CRIT_TEMPERATURE | \
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NVME_SMART_CRIT_RELIABILITY | NVME_SMART_CRIT_MEDIA | \
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NVME_SMART_CRIT_VOLATILE_MEMORY | NVMET_AEN_CFG_OPTIONAL)
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/* Helper Macros when NVMe error is NVME_SC_CONNECT_INVALID_PARAM
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* The 16 bit shift is to set IATTR bit to 1, which means offending
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* offset starts in the data section of connect()
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*/
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#define IPO_IATTR_CONNECT_DATA(x) \
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(cpu_to_le32((1 << 16) | (offsetof(struct nvmf_connect_data, x))))
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#define IPO_IATTR_CONNECT_SQE(x) \
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(cpu_to_le32(offsetof(struct nvmf_connect_command, x)))
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struct nvmet_ns {
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struct list_head dev_link;
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struct percpu_ref ref;
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struct block_device *bdev;
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struct file *file;
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bool readonly;
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u32 nsid;
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u32 blksize_shift;
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loff_t size;
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u8 nguid[16];
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uuid_t uuid;
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u32 anagrpid;
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bool buffered_io;
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bool enabled;
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struct nvmet_subsys *subsys;
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const char *device_path;
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struct config_group device_group;
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struct config_group group;
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struct completion disable_done;
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mempool_t *bvec_pool;
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struct kmem_cache *bvec_cache;
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int use_p2pmem;
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struct pci_dev *p2p_dev;
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};
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static inline struct nvmet_ns *to_nvmet_ns(struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_ns, group);
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}
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static inline struct device *nvmet_ns_dev(struct nvmet_ns *ns)
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{
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return ns->bdev ? disk_to_dev(ns->bdev->bd_disk) : NULL;
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}
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struct nvmet_cq {
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u16 qid;
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u16 size;
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};
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struct nvmet_sq {
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struct nvmet_ctrl *ctrl;
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struct percpu_ref ref;
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u16 qid;
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u16 size;
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u32 sqhd;
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bool sqhd_disabled;
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struct completion free_done;
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struct completion confirm_done;
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};
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struct nvmet_ana_group {
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struct config_group group;
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struct nvmet_port *port;
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u32 grpid;
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};
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static inline struct nvmet_ana_group *to_ana_group(struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_ana_group,
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group);
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}
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/**
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* struct nvmet_port - Common structure to keep port
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* information for the target.
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* @entry: Entry into referrals or transport list.
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* @disc_addr: Address information is stored in a format defined
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* for a discovery log page entry.
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* @group: ConfigFS group for this element's folder.
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* @priv: Private data for the transport.
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*/
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struct nvmet_port {
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struct list_head entry;
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struct nvmf_disc_rsp_page_entry disc_addr;
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struct config_group group;
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struct config_group subsys_group;
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struct list_head subsystems;
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struct config_group referrals_group;
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struct list_head referrals;
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struct list_head global_entry;
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struct config_group ana_groups_group;
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struct nvmet_ana_group ana_default_group;
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enum nvme_ana_state *ana_state;
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void *priv;
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bool enabled;
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int inline_data_size;
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const struct nvmet_fabrics_ops *tr_ops;
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};
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static inline struct nvmet_port *to_nvmet_port(struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_port,
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group);
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}
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static inline struct nvmet_port *ana_groups_to_port(
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struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_port,
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ana_groups_group);
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}
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struct nvmet_ctrl {
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struct nvmet_subsys *subsys;
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struct nvmet_cq **cqs;
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struct nvmet_sq **sqs;
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bool cmd_seen;
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struct mutex lock;
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u64 cap;
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u32 cc;
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u32 csts;
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uuid_t hostid;
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u16 cntlid;
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u32 kato;
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struct nvmet_port *port;
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u32 aen_enabled;
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unsigned long aen_masked;
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struct nvmet_req *async_event_cmds[NVMET_ASYNC_EVENTS];
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unsigned int nr_async_event_cmds;
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struct list_head async_events;
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struct work_struct async_event_work;
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struct list_head subsys_entry;
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struct kref ref;
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struct delayed_work ka_work;
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struct work_struct fatal_err_work;
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const struct nvmet_fabrics_ops *ops;
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__le32 *changed_ns_list;
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u32 nr_changed_ns;
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char subsysnqn[NVMF_NQN_FIELD_LEN];
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char hostnqn[NVMF_NQN_FIELD_LEN];
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struct device *p2p_client;
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struct radix_tree_root p2p_ns_map;
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spinlock_t error_lock;
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u64 err_counter;
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struct nvme_error_slot slots[NVMET_ERROR_LOG_SLOTS];
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};
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struct nvmet_subsys {
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enum nvme_subsys_type type;
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struct mutex lock;
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struct kref ref;
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struct list_head namespaces;
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unsigned int nr_namespaces;
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unsigned int max_nsid;
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struct list_head ctrls;
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struct list_head hosts;
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bool allow_any_host;
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u16 max_qid;
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u64 ver;
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u64 serial;
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char *subsysnqn;
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struct config_group group;
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struct config_group namespaces_group;
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struct config_group allowed_hosts_group;
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};
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static inline struct nvmet_subsys *to_subsys(struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_subsys, group);
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}
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static inline struct nvmet_subsys *namespaces_to_subsys(
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struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_subsys,
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namespaces_group);
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}
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struct nvmet_host {
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struct config_group group;
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};
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static inline struct nvmet_host *to_host(struct config_item *item)
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{
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return container_of(to_config_group(item), struct nvmet_host, group);
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}
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static inline char *nvmet_host_name(struct nvmet_host *host)
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{
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return config_item_name(&host->group.cg_item);
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}
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struct nvmet_host_link {
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struct list_head entry;
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struct nvmet_host *host;
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};
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struct nvmet_subsys_link {
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struct list_head entry;
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struct nvmet_subsys *subsys;
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};
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struct nvmet_req;
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struct nvmet_fabrics_ops {
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struct module *owner;
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unsigned int type;
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unsigned int msdbd;
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bool has_keyed_sgls : 1;
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void (*queue_response)(struct nvmet_req *req);
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int (*add_port)(struct nvmet_port *port);
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void (*remove_port)(struct nvmet_port *port);
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void (*delete_ctrl)(struct nvmet_ctrl *ctrl);
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void (*disc_traddr)(struct nvmet_req *req,
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struct nvmet_port *port, char *traddr);
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u16 (*install_queue)(struct nvmet_sq *nvme_sq);
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void (*discovery_chg)(struct nvmet_port *port);
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};
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#define NVMET_MAX_INLINE_BIOVEC 8
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#define NVMET_MAX_INLINE_DATA_LEN NVMET_MAX_INLINE_BIOVEC * PAGE_SIZE
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struct nvmet_req {
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struct nvme_command *cmd;
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struct nvme_completion *cqe;
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struct nvmet_sq *sq;
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struct nvmet_cq *cq;
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struct nvmet_ns *ns;
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struct scatterlist *sg;
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struct bio_vec inline_bvec[NVMET_MAX_INLINE_BIOVEC];
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union {
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struct {
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struct bio inline_bio;
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} b;
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struct {
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bool mpool_alloc;
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struct kiocb iocb;
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struct bio_vec *bvec;
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struct work_struct work;
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} f;
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};
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int sg_cnt;
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/* data length as parsed from the command: */
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size_t data_len;
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/* data length as parsed from the SGL descriptor: */
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size_t transfer_len;
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struct nvmet_port *port;
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void (*execute)(struct nvmet_req *req);
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const struct nvmet_fabrics_ops *ops;
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struct pci_dev *p2p_dev;
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struct device *p2p_client;
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u16 error_loc;
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u64 error_slba;
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};
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extern struct workqueue_struct *buffered_io_wq;
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static inline void nvmet_set_result(struct nvmet_req *req, u32 result)
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{
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req->cqe->result.u32 = cpu_to_le32(result);
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}
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/*
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* NVMe command writes actually are DMA reads for us on the target side.
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*/
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static inline enum dma_data_direction
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nvmet_data_dir(struct nvmet_req *req)
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{
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return nvme_is_write(req->cmd) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
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}
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struct nvmet_async_event {
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struct list_head entry;
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u8 event_type;
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u8 event_info;
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u8 log_page;
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};
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static inline void nvmet_clear_aen_bit(struct nvmet_req *req, u32 bn)
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{
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int rae = le32_to_cpu(req->cmd->common.cdw10) & 1 << 15;
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if (!rae)
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clear_bit(bn, &req->sq->ctrl->aen_masked);
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}
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static inline bool nvmet_aen_bit_disabled(struct nvmet_ctrl *ctrl, u32 bn)
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{
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if (!(READ_ONCE(ctrl->aen_enabled) & (1 << bn)))
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return true;
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return test_and_set_bit(bn, &ctrl->aen_masked);
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}
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void nvmet_get_feat_kato(struct nvmet_req *req);
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void nvmet_get_feat_async_event(struct nvmet_req *req);
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u16 nvmet_set_feat_kato(struct nvmet_req *req);
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u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask);
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void nvmet_execute_async_event(struct nvmet_req *req);
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u16 nvmet_parse_connect_cmd(struct nvmet_req *req);
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void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id);
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u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req);
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u16 nvmet_file_parse_io_cmd(struct nvmet_req *req);
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u16 nvmet_parse_admin_cmd(struct nvmet_req *req);
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u16 nvmet_parse_discovery_cmd(struct nvmet_req *req);
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u16 nvmet_parse_fabrics_cmd(struct nvmet_req *req);
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bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq,
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struct nvmet_sq *sq, const struct nvmet_fabrics_ops *ops);
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void nvmet_req_uninit(struct nvmet_req *req);
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void nvmet_req_execute(struct nvmet_req *req);
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void nvmet_req_complete(struct nvmet_req *req, u16 status);
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int nvmet_req_alloc_sgl(struct nvmet_req *req);
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void nvmet_req_free_sgl(struct nvmet_req *req);
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void nvmet_execute_keep_alive(struct nvmet_req *req);
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void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid,
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u16 size);
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void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid,
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u16 size);
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void nvmet_sq_destroy(struct nvmet_sq *sq);
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int nvmet_sq_init(struct nvmet_sq *sq);
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void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl);
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void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new);
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u16 nvmet_alloc_ctrl(const char *subsysnqn, const char *hostnqn,
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struct nvmet_req *req, u32 kato, struct nvmet_ctrl **ctrlp);
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u16 nvmet_ctrl_find_get(const char *subsysnqn, const char *hostnqn, u16 cntlid,
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struct nvmet_req *req, struct nvmet_ctrl **ret);
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void nvmet_ctrl_put(struct nvmet_ctrl *ctrl);
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u16 nvmet_check_ctrl_status(struct nvmet_req *req, struct nvme_command *cmd);
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struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn,
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enum nvme_subsys_type type);
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void nvmet_subsys_put(struct nvmet_subsys *subsys);
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void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys);
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struct nvmet_ns *nvmet_find_namespace(struct nvmet_ctrl *ctrl, __le32 nsid);
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void nvmet_put_namespace(struct nvmet_ns *ns);
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int nvmet_ns_enable(struct nvmet_ns *ns);
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void nvmet_ns_disable(struct nvmet_ns *ns);
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struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid);
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void nvmet_ns_free(struct nvmet_ns *ns);
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void nvmet_send_ana_event(struct nvmet_subsys *subsys,
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struct nvmet_port *port);
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void nvmet_port_send_ana_event(struct nvmet_port *port);
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int nvmet_register_transport(const struct nvmet_fabrics_ops *ops);
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void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops);
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int nvmet_enable_port(struct nvmet_port *port);
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void nvmet_disable_port(struct nvmet_port *port);
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void nvmet_referral_enable(struct nvmet_port *parent, struct nvmet_port *port);
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void nvmet_referral_disable(struct nvmet_port *parent, struct nvmet_port *port);
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u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf,
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size_t len);
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u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf,
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size_t len);
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u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len);
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u32 nvmet_get_log_page_len(struct nvme_command *cmd);
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u64 nvmet_get_log_page_offset(struct nvme_command *cmd);
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extern struct list_head *nvmet_ports;
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void nvmet_port_disc_changed(struct nvmet_port *port,
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struct nvmet_subsys *subsys);
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void nvmet_subsys_disc_changed(struct nvmet_subsys *subsys,
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struct nvmet_host *host);
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void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type,
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u8 event_info, u8 log_page);
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#define NVMET_QUEUE_SIZE 1024
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#define NVMET_NR_QUEUES 128
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#define NVMET_MAX_CMD NVMET_QUEUE_SIZE
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/*
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* Nice round number that makes a list of nsids fit into a page.
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* Should become tunable at some point in the future.
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*/
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#define NVMET_MAX_NAMESPACES 1024
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/*
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* 0 is not a valid ANA group ID, so we start numbering at 1.
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*
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* ANA Group 1 exists without manual intervention, has namespaces assigned to it
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* by default, and is available in an optimized state through all ports.
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*/
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#define NVMET_MAX_ANAGRPS 128
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#define NVMET_DEFAULT_ANA_GRPID 1
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#define NVMET_KAS 10
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#define NVMET_DISC_KATO_MS 120000
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int __init nvmet_init_configfs(void);
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void __exit nvmet_exit_configfs(void);
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int __init nvmet_init_discovery(void);
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void nvmet_exit_discovery(void);
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extern struct nvmet_subsys *nvmet_disc_subsys;
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extern struct rw_semaphore nvmet_config_sem;
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extern u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1];
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extern u64 nvmet_ana_chgcnt;
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extern struct rw_semaphore nvmet_ana_sem;
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bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn);
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int nvmet_bdev_ns_enable(struct nvmet_ns *ns);
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int nvmet_file_ns_enable(struct nvmet_ns *ns);
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void nvmet_bdev_ns_disable(struct nvmet_ns *ns);
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void nvmet_file_ns_disable(struct nvmet_ns *ns);
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u16 nvmet_bdev_flush(struct nvmet_req *req);
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u16 nvmet_file_flush(struct nvmet_req *req);
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void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid);
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static inline u32 nvmet_rw_len(struct nvmet_req *req)
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{
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return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) <<
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req->ns->blksize_shift;
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}
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u16 errno_to_nvme_status(struct nvmet_req *req, int errno);
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/* Convert a 32-bit number to a 16-bit 0's based number */
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static inline __le16 to0based(u32 a)
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{
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return cpu_to_le16(max(1U, min(1U << 16, a)) - 1);
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}
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#endif /* _NVMET_H */
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