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![Arnd Bergmann](/assets/img/avatar_default.png)
Most of the header files are no longer referenced from outside arch/arm/mach-omap1, so move them all to that place directly and change their users to use the new location. The exceptions are: - mach/compress.h is used by the core architecture code - mach/serial.h is used by mach/compress.h The mach/memory.h is empty and gets removed in the process, avoiding the need for CONFIG_NEED_MACH_MEMORY_H. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
707 lines
16 KiB
C
707 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Platform level USB initialization for FS USB OTG controller on omap1
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*
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* Copyright (C) 2004 Texas Instruments, Inc.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-map-ops.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/soc/ti/omap1-io.h>
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#include <asm/irq.h>
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#include "hardware.h"
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#include "mux.h"
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#include "usb.h"
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#include "common.h"
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/* These routines should handle the standard chip-specific modes
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* for usb0/1/2 ports, covering basic mux and transceiver setup.
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*
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* Some board-*.c files will need to set up additional mux options,
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* like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
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*/
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/* TESTED ON:
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* - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
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* - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
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* - 5912 OSK UDC, with *nonstandard* A-to-A cable
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* - 1510 Innovator UDC with bundled usb0 cable
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* - 1510 Innovator OHCI with bundled usb1/usb2 cable
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* - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
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* - 1710 custom development board using alternate pin group
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* - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
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*/
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#define INT_USB_IRQ_GEN IH2_BASE + 20
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#define INT_USB_IRQ_NISO IH2_BASE + 30
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#define INT_USB_IRQ_ISO IH2_BASE + 29
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#define INT_USB_IRQ_HGEN INT_USB_HHC_1
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#define INT_USB_IRQ_OTG IH2_BASE + 8
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#ifdef CONFIG_ARCH_OMAP_OTG
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static void __init
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omap_otg_init(struct omap_usb_config *config)
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{
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u32 syscon;
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int alt_pingroup = 0;
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u16 w;
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/* NOTE: no bus or clock setup (yet?) */
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syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
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if (!(syscon & OTG_RESET_DONE))
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pr_debug("USB resets not complete?\n");
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//omap_writew(0, OTG_IRQ_EN);
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/* pin muxing and transceiver pinouts */
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if (config->pins[0] > 2) /* alt pingroup 2 */
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alt_pingroup = 1;
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syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
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syscon |= config->usb1_init(config->pins[1]);
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syscon |= config->usb2_init(config->pins[2], alt_pingroup);
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pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
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omap_writel(syscon, OTG_SYSCON_1);
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syscon = config->hmc_mode;
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syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
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#ifdef CONFIG_USB_OTG
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if (config->otg)
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syscon |= OTG_EN;
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#endif
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pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
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omap_readl(USB_TRANSCEIVER_CTRL));
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pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
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omap_writel(syscon, OTG_SYSCON_2);
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printk("USB: hmc %d", config->hmc_mode);
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if (!alt_pingroup)
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pr_cont(", usb2 alt %d wires", config->pins[2]);
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else if (config->pins[0])
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pr_cont(", usb0 %d wires%s", config->pins[0],
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is_usb0_device(config) ? " (dev)" : "");
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if (config->pins[1])
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pr_cont(", usb1 %d wires", config->pins[1]);
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if (!alt_pingroup && config->pins[2])
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pr_cont(", usb2 %d wires", config->pins[2]);
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if (config->otg)
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pr_cont(", Mini-AB on usb%d", config->otg - 1);
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pr_cont("\n");
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/* leave USB clocks/controllers off until needed */
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w = omap_readw(ULPD_SOFT_REQ);
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w &= ~SOFT_USB_CLK_REQ;
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omap_writew(w, ULPD_SOFT_REQ);
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w = omap_readw(ULPD_CLOCK_CTRL);
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w &= ~USB_MCLK_EN;
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w |= DIS_USB_PVCI_CLK;
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omap_writew(w, ULPD_CLOCK_CTRL);
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syscon = omap_readl(OTG_SYSCON_1);
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syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
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#if IS_ENABLED(CONFIG_USB_OMAP)
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if (config->otg || config->register_dev) {
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struct platform_device *udc_device = config->udc_device;
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int status;
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syscon &= ~DEV_IDLE_EN;
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udc_device->dev.platform_data = config;
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status = platform_device_register(udc_device);
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if (status)
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pr_debug("can't register UDC device, %d\n", status);
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}
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#endif
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#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
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if (config->otg || config->register_host) {
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struct platform_device *ohci_device = config->ohci_device;
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int status;
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syscon &= ~HST_IDLE_EN;
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ohci_device->dev.platform_data = config;
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status = platform_device_register(ohci_device);
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if (status)
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pr_debug("can't register OHCI device, %d\n", status);
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}
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#endif
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#ifdef CONFIG_USB_OTG
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if (config->otg) {
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struct platform_device *otg_device = config->otg_device;
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int status;
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syscon &= ~OTG_IDLE_EN;
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otg_device->dev.platform_data = config;
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status = platform_device_register(otg_device);
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if (status)
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pr_debug("can't register OTG device, %d\n", status);
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}
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#endif
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pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
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omap_writel(syscon, OTG_SYSCON_1);
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}
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#else
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static void omap_otg_init(struct omap_usb_config *config) {}
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#endif
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#if IS_ENABLED(CONFIG_USB_OMAP)
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static struct resource udc_resources[] = {
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/* order is significant! */
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{ /* registers */
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.start = UDC_BASE,
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.end = UDC_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, { /* general IRQ */
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.start = INT_USB_IRQ_GEN,
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.flags = IORESOURCE_IRQ,
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}, { /* PIO IRQ */
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.start = INT_USB_IRQ_NISO,
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.flags = IORESOURCE_IRQ,
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}, { /* SOF IRQ */
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.start = INT_USB_IRQ_ISO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = ~(u32)0;
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static struct platform_device udc_device = {
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.name = "omap_udc",
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.id = -1,
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.dev = {
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(udc_resources),
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.resource = udc_resources,
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};
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static inline void udc_device_init(struct omap_usb_config *pdata)
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{
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/* IRQ numbers for omap7xx */
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if(cpu_is_omap7xx()) {
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udc_resources[1].start = INT_7XX_USB_GENI;
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udc_resources[2].start = INT_7XX_USB_NON_ISO;
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udc_resources[3].start = INT_7XX_USB_ISO;
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}
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pdata->udc_device = &udc_device;
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}
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#else
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static inline void udc_device_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = ~(u32)0;
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static struct resource ohci_resources[] = {
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{
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.start = OMAP_OHCI_BASE,
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.end = OMAP_OHCI_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_IRQ_HGEN,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ohci_device = {
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.name = "ohci",
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.id = -1,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(ohci_resources),
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.resource = ohci_resources,
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};
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static inline void ohci_device_init(struct omap_usb_config *pdata)
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{
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if (!IS_ENABLED(CONFIG_USB_OHCI_HCD))
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return;
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if (cpu_is_omap7xx())
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ohci_resources[1].start = INT_7XX_USB_HHC_1;
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pdata->ohci_device = &ohci_device;
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pdata->ocpi_enable = &ocpi_enable;
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}
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#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
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static struct resource otg_resources[] = {
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/* order is significant! */
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{
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.start = OTG_BASE,
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.end = OTG_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = INT_USB_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device otg_device = {
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.name = "omap_otg",
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.id = -1,
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.num_resources = ARRAY_SIZE(otg_resources),
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.resource = otg_resources,
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};
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static inline void otg_device_init(struct omap_usb_config *pdata)
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{
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if (cpu_is_omap7xx())
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otg_resources[1].start = INT_7XX_USB_OTG;
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pdata->otg_device = &otg_device;
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}
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#else
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static inline void otg_device_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
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{
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u32 syscon1 = 0;
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if (nwires == 0) {
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if (!cpu_is_omap15xx()) {
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u32 l;
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/* pulldown D+/D- */
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~(3 << 1);
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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return 0;
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}
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if (is_device) {
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if (cpu_is_omap7xx()) {
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omap_cfg_reg(AA17_7XX_USB_DM);
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omap_cfg_reg(W16_7XX_USB_PU_EN);
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omap_cfg_reg(W17_7XX_USB_VBUSI);
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omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
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omap_cfg_reg(W19_7XX_USB_DCRST);
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} else
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omap_cfg_reg(W4_USB_PUEN);
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}
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if (nwires == 2) {
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u32 l;
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// omap_cfg_reg(P9_USB_DP);
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// omap_cfg_reg(R8_USB_DM);
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if (cpu_is_omap15xx()) {
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/* This works on 1510-Innovator */
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return 0;
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}
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/* NOTES:
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* - peripheral should configure VBUS detection!
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* - only peripherals may use the internal D+/D- pulldowns
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* - OTG support on this port not yet written
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*/
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/* Don't do this for omap7xx -- it causes USB to not work correctly */
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if (!cpu_is_omap7xx()) {
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~(7 << 4);
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if (!is_device)
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l |= (3 << 1);
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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return 3 << 16;
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}
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/* alternate pin config, external transceiver */
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if (cpu_is_omap15xx()) {
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printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
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return 0;
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}
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omap_cfg_reg(V6_USB0_TXD);
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omap_cfg_reg(W9_USB0_TXEN);
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omap_cfg_reg(W5_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB0_RCV);
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/* NOTE: SPEED and SUSP aren't configured here. OTG hosts
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* may be able to use I2C requests to set those bits along
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* with VBUS switching and overcurrent detection.
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*/
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if (nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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switch (nwires) {
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case 3:
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syscon1 = 2;
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break;
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case 4:
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syscon1 = 1;
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break;
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case 6:
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syscon1 = 3;
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{
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u32 l;
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omap_cfg_reg(AA9_USB0_VP);
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omap_cfg_reg(R9_USB0_VM);
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l |= CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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break;
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default:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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0, nwires);
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}
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return syscon1 << 16;
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}
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static u32 __init omap1_usb1_init(unsigned nwires)
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{
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u32 syscon1 = 0;
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if (!cpu_is_omap15xx() && nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB1_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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if (nwires == 0)
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return 0;
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/* external transceiver */
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omap_cfg_reg(USB1_TXD);
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omap_cfg_reg(USB1_TXEN);
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if (nwires != 3)
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omap_cfg_reg(USB1_RCV);
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB1_SEO);
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omap_cfg_reg(USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
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omap_cfg_reg(W13_1610_USB1_SE0);
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omap_cfg_reg(R13_1610_USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1710()) {
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omap_cfg_reg(R13_1710_USB1_SE0);
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// SUSP
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} else {
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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switch (nwires) {
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case 2:
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goto bad;
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case 3:
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syscon1 = 2;
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break;
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case 4:
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syscon1 = 1;
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break;
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case 6:
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syscon1 = 3;
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omap_cfg_reg(USB1_VP);
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omap_cfg_reg(USB1_VM);
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if (!cpu_is_omap15xx()) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l |= CONF_USB1_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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1, nwires);
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}
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return syscon1 << 20;
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}
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static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
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{
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u32 syscon1 = 0;
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/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
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if (alt_pingroup || nwires == 0)
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return 0;
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if (!cpu_is_omap15xx() && nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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/* external transceiver */
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_TXD);
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omap_cfg_reg(USB2_TXEN);
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omap_cfg_reg(USB2_SEO);
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if (nwires != 3)
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omap_cfg_reg(USB2_RCV);
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/* there is no USB2_SPEED */
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} else if (cpu_is_omap16xx()) {
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omap_cfg_reg(V6_USB2_TXD);
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omap_cfg_reg(W9_USB2_TXEN);
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omap_cfg_reg(W5_USB2_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB2_RCV);
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// FIXME omap_cfg_reg(USB2_SPEED);
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} else {
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|
pr_debug("usb%d cpu unrecognized\n", 1);
|
|
return 0;
|
|
}
|
|
|
|
// omap_cfg_reg(USB2_SUSP);
|
|
|
|
switch (nwires) {
|
|
case 2:
|
|
goto bad;
|
|
case 3:
|
|
syscon1 = 2;
|
|
break;
|
|
case 4:
|
|
syscon1 = 1;
|
|
break;
|
|
case 5:
|
|
goto bad;
|
|
case 6:
|
|
syscon1 = 3;
|
|
if (cpu_is_omap15xx()) {
|
|
omap_cfg_reg(USB2_VP);
|
|
omap_cfg_reg(USB2_VM);
|
|
} else {
|
|
u32 l;
|
|
|
|
omap_cfg_reg(AA9_USB2_VP);
|
|
omap_cfg_reg(R9_USB2_VM);
|
|
l = omap_readl(USB_TRANSCEIVER_CTRL);
|
|
l |= CONF_USB2_UNI_R;
|
|
omap_writel(l, USB_TRANSCEIVER_CTRL);
|
|
}
|
|
break;
|
|
default:
|
|
bad:
|
|
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
|
|
2, nwires);
|
|
}
|
|
|
|
return syscon1 << 24;
|
|
}
|
|
|
|
#ifdef CONFIG_ARCH_OMAP15XX
|
|
/* OMAP-1510 OHCI has its own MMU for DMA */
|
|
#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
|
|
#define OMAP1510_LB_CLOCK_DIV 0xfffec10c
|
|
#define OMAP1510_LB_MMU_CTL 0xfffec208
|
|
#define OMAP1510_LB_MMU_LCK 0xfffec224
|
|
#define OMAP1510_LB_MMU_LD_TLB 0xfffec228
|
|
#define OMAP1510_LB_MMU_CAM_H 0xfffec22c
|
|
#define OMAP1510_LB_MMU_CAM_L 0xfffec230
|
|
#define OMAP1510_LB_MMU_RAM_H 0xfffec234
|
|
#define OMAP1510_LB_MMU_RAM_L 0xfffec238
|
|
|
|
/*
|
|
* Bus address is physical address, except for OMAP-1510 Local Bus.
|
|
* OMAP-1510 bus address is translated into a Local Bus address if the
|
|
* OMAP bus type is lbus.
|
|
*/
|
|
#define OMAP1510_LB_OFFSET UL(0x30000000)
|
|
|
|
/*
|
|
* OMAP-1510 specific Local Bus clock on/off
|
|
*/
|
|
static int omap_1510_local_bus_power(int on)
|
|
{
|
|
if (on) {
|
|
omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
|
|
udelay(200);
|
|
} else {
|
|
omap_writel(0, OMAP1510_LB_MMU_CTL);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* OMAP-1510 specific Local Bus initialization
|
|
* NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
|
|
* See also arch/mach-omap/memory.h for __virt_to_dma() and
|
|
* __dma_to_virt() which need to match with the physical
|
|
* Local Bus address below.
|
|
*/
|
|
static int omap_1510_local_bus_init(void)
|
|
{
|
|
unsigned int tlb;
|
|
unsigned long lbaddr, physaddr;
|
|
|
|
omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
|
|
OMAP1510_LB_CLOCK_DIV);
|
|
|
|
/* Configure the Local Bus MMU table */
|
|
for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
|
|
lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
|
|
physaddr = tlb * 0x00100000 + PHYS_OFFSET;
|
|
omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
|
|
omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
|
|
OMAP1510_LB_MMU_CAM_L);
|
|
omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
|
|
omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
|
|
omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
|
|
omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
|
|
}
|
|
|
|
/* Enable the walking table */
|
|
omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
|
|
udelay(200);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void omap_1510_local_bus_reset(void)
|
|
{
|
|
omap_1510_local_bus_power(1);
|
|
omap_1510_local_bus_init();
|
|
}
|
|
|
|
/* ULPD_DPLL_CTRL */
|
|
#define DPLL_IOB (1 << 13)
|
|
#define DPLL_PLL_ENABLE (1 << 4)
|
|
#define DPLL_LOCK (1 << 0)
|
|
|
|
/* ULPD_APLL_CTRL */
|
|
#define APLL_NDPLL_SWITCH (1 << 0)
|
|
|
|
static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
|
{
|
|
unsigned int val;
|
|
u16 w;
|
|
|
|
config->usb0_init(config->pins[0], is_usb0_device(config));
|
|
config->usb1_init(config->pins[1]);
|
|
config->usb2_init(config->pins[2], 0);
|
|
|
|
val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
|
|
val |= (config->hmc_mode << 1);
|
|
omap_writel(val, MOD_CONF_CTRL_0);
|
|
|
|
printk("USB: hmc %d", config->hmc_mode);
|
|
if (config->pins[0])
|
|
pr_cont(", usb0 %d wires%s", config->pins[0],
|
|
is_usb0_device(config) ? " (dev)" : "");
|
|
if (config->pins[1])
|
|
pr_cont(", usb1 %d wires", config->pins[1]);
|
|
if (config->pins[2])
|
|
pr_cont(", usb2 %d wires", config->pins[2]);
|
|
pr_cont("\n");
|
|
|
|
/* use DPLL for 48 MHz function clock */
|
|
pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
|
|
omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
|
|
|
|
w = omap_readw(ULPD_APLL_CTRL);
|
|
w &= ~APLL_NDPLL_SWITCH;
|
|
omap_writew(w, ULPD_APLL_CTRL);
|
|
|
|
w = omap_readw(ULPD_DPLL_CTRL);
|
|
w |= DPLL_IOB | DPLL_PLL_ENABLE;
|
|
omap_writew(w, ULPD_DPLL_CTRL);
|
|
|
|
w = omap_readw(ULPD_SOFT_REQ);
|
|
w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
|
|
omap_writew(w, ULPD_SOFT_REQ);
|
|
|
|
while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
|
|
cpu_relax();
|
|
|
|
#if IS_ENABLED(CONFIG_USB_OMAP)
|
|
if (config->register_dev) {
|
|
int status;
|
|
|
|
udc_device.dev.platform_data = config;
|
|
status = platform_device_register(&udc_device);
|
|
if (status)
|
|
pr_debug("can't register UDC device, %d\n", status);
|
|
/* udc driver gates 48MHz by D+ pullup */
|
|
}
|
|
#endif
|
|
|
|
if (IS_ENABLED(CONFIG_USB_OHCI_HCD) && config->register_host) {
|
|
int status;
|
|
|
|
ohci_device.dev.platform_data = config;
|
|
dma_direct_set_offset(&ohci_device.dev, PHYS_OFFSET,
|
|
OMAP1510_LB_OFFSET, (u64)-1);
|
|
status = platform_device_register(&ohci_device);
|
|
if (status)
|
|
pr_debug("can't register OHCI device, %d\n", status);
|
|
/* hcd explicitly gates 48MHz */
|
|
|
|
config->lb_reset = omap_1510_local_bus_reset;
|
|
}
|
|
}
|
|
|
|
#else
|
|
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
|
|
#endif
|
|
|
|
void __init omap1_usb_init(struct omap_usb_config *_pdata)
|
|
{
|
|
struct omap_usb_config *pdata;
|
|
|
|
pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
|
|
if (!pdata)
|
|
return;
|
|
|
|
pdata->usb0_init = omap1_usb0_init;
|
|
pdata->usb1_init = omap1_usb1_init;
|
|
pdata->usb2_init = omap1_usb2_init;
|
|
udc_device_init(pdata);
|
|
ohci_device_init(pdata);
|
|
otg_device_init(pdata);
|
|
|
|
if (cpu_is_omap7xx() || cpu_is_omap16xx())
|
|
omap_otg_init(pdata);
|
|
else if (cpu_is_omap15xx())
|
|
omap_1510_usb_init(pdata);
|
|
else
|
|
printk(KERN_ERR "USB: No init for your chip yet\n");
|
|
}
|