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c78a41fc04
As a final bit of preparation for converting to ARCH_MULTIPLATFORM, change the interrupt handling for s3c24xx to use sparse IRQs. Since the number of possible interrupts is already fixed and relatively small per chip, just make it use all legacy interrupts preallocated using the .nr_irqs field in the machine descriptor, rather than actually allocating domains on the fly. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
137 lines
2.7 KiB
C
137 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// Copyright 2003-2005 Simtec Electronics
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// Ben Dooks <ben@simtec.co.uk>
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//
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// http://www.simtec.co.uk/products/EB2410ITX/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/mach/irq.h>
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#include "regs-irq.h"
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#include "irqs.h"
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#include "bast.h"
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#define irqdbf(x...)
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#define irqdbf2(x...)
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/* handle PC104 ISA interrupts from the system CPLD */
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/* table of ISA irq nos to the relevant mask... zero means
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* the irq is not implemented
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*/
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static const unsigned char bast_pc104_irqmasks[] = {
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0, /* 0 */
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0, /* 1 */
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0, /* 2 */
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1, /* 3 */
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0, /* 4 */
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2, /* 5 */
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0, /* 6 */
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4, /* 7 */
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0, /* 8 */
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0, /* 9 */
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8, /* 10 */
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0, /* 11 */
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0, /* 12 */
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0, /* 13 */
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0, /* 14 */
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0, /* 15 */
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};
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static const unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
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static void
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bast_pc104_mask(struct irq_data *data)
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{
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unsigned long temp;
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temp = __raw_readb(BAST_VA_PC104_IRQMASK);
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temp &= ~bast_pc104_irqmasks[data->irq];
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__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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}
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static void
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bast_pc104_maskack(struct irq_data *data)
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{
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struct irq_desc *desc = irq_to_desc(BAST_IRQ_ISA);
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bast_pc104_mask(data);
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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}
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static void
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bast_pc104_unmask(struct irq_data *data)
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{
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unsigned long temp;
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temp = __raw_readb(BAST_VA_PC104_IRQMASK);
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temp |= bast_pc104_irqmasks[data->irq];
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__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
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}
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static struct irq_chip bast_pc104_chip = {
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.irq_mask = bast_pc104_mask,
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.irq_unmask = bast_pc104_unmask,
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.irq_ack = bast_pc104_maskack
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};
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static void bast_irq_pc104_demux(struct irq_desc *desc)
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{
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unsigned int stat;
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unsigned int irqno;
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int i;
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stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf;
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if (unlikely(stat == 0)) {
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/* ack if we get an irq with nothing (ie, startup) */
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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} else {
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/* handle the IRQ */
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for (i = 0; stat != 0; i++, stat >>= 1) {
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if (stat & 1) {
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irqno = bast_pc104_irqs[i];
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generic_handle_irq(irqno);
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}
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}
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}
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}
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static __init int bast_irq_init(void)
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{
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unsigned int i;
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if (machine_is_bast()) {
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printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n");
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/* zap all the IRQs */
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__raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
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irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux);
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/* register our IRQs */
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for (i = 0; i < 4; i++) {
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unsigned int irqno = bast_pc104_irqs[i];
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irq_set_chip_and_handler(irqno, &bast_pc104_chip,
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handle_level_irq);
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irq_clear_status_flags(irqno, IRQ_NOREQUEST);
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}
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}
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return 0;
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}
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arch_initcall(bast_irq_init);
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