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91276c0fa4
BAST is the one machine that theoretically supports unmodified ISA drivers for hardware on its PC/104 connector, using a custom version of the inb()/outb() and inw()/outw() macros. This is incompatible with the generic version used in asm/io.h, and can't easily be used in a multiplatform kernel. Removing the special case for 16-bit I/O port access on BAST gets us closer to multiplatform, at the expense of any PC/104 users with 16-bit cards having to either use an older kernel or modify their ISA drivers to manually ioremap() the area and use readw()/write() in place of inw()/outw(). Either way is probably ok, given that there is a recurring discussion about dropping s3c24xx altogether, and many traditional ISA drivers are already gone. Machines other than BAST already have no support for ISA drivers, though a couple of them do map one of the external chip-selects into the ISA port range, using the same address for 8-bit and 16-bit I/O. It is unlikely that anything actually uses this mapping, but it's also easy to keep this working by mapping it to the normal platform-independent PCI I/O base that is otherwise unused on s3c24xx. The mach/map-base.h file is no longer referenced in global headers and can be moved into the platform directory. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2003, 2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C - Memory map definitions (virtual addresses)
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*/
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#ifndef __ASM_PLAT_MAP_H
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#define __ASM_PLAT_MAP_H __FILE__
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/* Fit all our registers in at 0xF6000000 upwards, trying to use as
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* little of the VA space as possible so vmalloc and friends have a
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* better chance of getting memory.
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*
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* we try to ensure stuff like the IRQ registers are available for
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* an single MOVS instruction (ie, only 8 bits of set data)
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*/
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#define S3C_ADDR_BASE 0xF6000000
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#ifndef __ASSEMBLY__
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#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
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#else
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#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
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#endif
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#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
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#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
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#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
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#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
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#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
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#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
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/* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O.
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* 16-bit I/O on BAST now requires driver modifications to manually
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* ioremap CS3.
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*/
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#define S3C24XX_VA_ISA_BYTE PCI_IOBASE
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/* This is used for the CPU specific mappings that may be needed, so that
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* they do not need to directly used S3C_ADDR() and thus make it easier to
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* modify the space for mapping.
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*/
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#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
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#endif /* __ASM_PLAT_MAP_H */
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