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![Arnd Bergmann](/assets/img/avatar_default.png)
As a final bit of preparation for converting to ARCH_MULTIPLATFORM, change the interrupt handling for s3c24xx to use sparse IRQs. Since the number of possible interrupts is already fixed and relatively small per chip, just make it use all legacy interrupts preallocated using the .nr_irqs field in the machine descriptor, rather than actually allocating domains on the fly. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Common Header for S3C24XX SoCs
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*/
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#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
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#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
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#include <linux/reboot.h>
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#include "irqs.h"
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struct s3c2410_uartcfg;
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#ifdef CONFIG_CPU_S3C2410
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extern int s3c2410_init(void);
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extern int s3c2410a_init(void);
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extern void s3c2410_map_io(void);
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extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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extern void s3c2410_init_clocks(int xtal);
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extern void s3c2410_init_irq(void);
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#else
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#define s3c2410_init_clocks NULL
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#define s3c2410_init_uarts NULL
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#define s3c2410_map_io NULL
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#define s3c2410_init NULL
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#define s3c2410a_init NULL
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#endif
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#ifdef CONFIG_CPU_S3C2412
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extern int s3c2412_init(void);
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extern void s3c2412_map_io(void);
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extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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extern void s3c2412_init_clocks(int xtal);
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extern int s3c2412_baseclk_add(void);
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extern void s3c2412_init_irq(void);
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#else
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#define s3c2412_init_clocks NULL
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#define s3c2412_init_uarts NULL
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#define s3c2412_map_io NULL
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#define s3c2412_init NULL
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#endif
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#ifdef CONFIG_CPU_S3C2416
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extern int s3c2416_init(void);
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extern void s3c2416_map_io(void);
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extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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extern void s3c2416_init_clocks(int xtal);
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extern int s3c2416_baseclk_add(void);
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extern void s3c2416_init_irq(void);
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extern struct syscore_ops s3c2416_irq_syscore_ops;
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#else
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#define s3c2416_init_clocks NULL
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#define s3c2416_init_uarts NULL
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#define s3c2416_map_io NULL
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#define s3c2416_init NULL
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#endif
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#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
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extern void s3c244x_map_io(void);
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extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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#else
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#define s3c244x_init_uarts NULL
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#endif
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#ifdef CONFIG_CPU_S3C2440
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extern int s3c2440_init(void);
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extern void s3c2440_map_io(void);
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extern void s3c2440_init_clocks(int xtal);
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extern void s3c2440_init_irq(void);
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#else
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#define s3c2440_init NULL
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#define s3c2440_map_io NULL
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#endif
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#ifdef CONFIG_CPU_S3C2442
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extern int s3c2442_init(void);
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extern void s3c2442_map_io(void);
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extern void s3c2442_init_clocks(int xtal);
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extern void s3c2442_init_irq(void);
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#else
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#define s3c2442_init NULL
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#define s3c2442_map_io NULL
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#endif
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#ifdef CONFIG_CPU_S3C2443
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extern int s3c2443_init(void);
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extern void s3c2443_map_io(void);
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extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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extern void s3c2443_init_clocks(int xtal);
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extern int s3c2443_baseclk_add(void);
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extern void s3c2443_init_irq(void);
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#else
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#define s3c2443_init_clocks NULL
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#define s3c2443_init_uarts NULL
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#define s3c2443_map_io NULL
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#define s3c2443_init NULL
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#endif
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extern struct syscore_ops s3c24xx_irq_syscore_ops;
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extern struct platform_device s3c2410_device_dma;
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extern struct platform_device s3c2412_device_dma;
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extern struct platform_device s3c2440_device_dma;
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extern struct platform_device s3c2443_device_dma;
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extern struct platform_device s3c2410_device_dclk;
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enum s3c24xx_timer_mode {
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S3C24XX_PWM0,
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S3C24XX_PWM1,
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S3C24XX_PWM2,
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S3C24XX_PWM3,
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S3C24XX_PWM4,
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};
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extern void __init s3c24xx_set_timer_source(enum s3c24xx_timer_mode event,
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enum s3c24xx_timer_mode source);
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extern void __init s3c24xx_timer_init(void);
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#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
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