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![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
881 lines
32 KiB
C
881 lines
32 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/probes/decode-thumb.c
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*
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* Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "decode.h"
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#include "decode-thumb.h"
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static const union decode_item t32_table_1110_100x_x0xx[] = {
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/* Load/store multiple instructions */
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/* Rn is PC 1110 100x x0xx 1111 xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfe4f0000, 0xe80f0000),
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/* SRS 1110 1000 00x0 xxxx xxxx xxxx xxxx xxxx */
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/* RFE 1110 1000 00x1 xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffc00000, 0xe8000000),
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/* SRS 1110 1001 10x0 xxxx xxxx xxxx xxxx xxxx */
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/* RFE 1110 1001 10x1 xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffc00000, 0xe9800000),
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/* STM Rn, {...pc} 1110 100x x0x0 xxxx 1xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfe508000, 0xe8008000),
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/* LDM Rn, {...lr,pc} 1110 100x x0x1 xxxx 11xx xxxx xxxx xxxx */
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DECODE_REJECT (0xfe50c000, 0xe810c000),
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/* LDM/STM Rn, {...sp} 1110 100x x0xx xxxx xx1x xxxx xxxx xxxx */
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DECODE_REJECT (0xfe402000, 0xe8002000),
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/* STMIA 1110 1000 10x0 xxxx xxxx xxxx xxxx xxxx */
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/* LDMIA 1110 1000 10x1 xxxx xxxx xxxx xxxx xxxx */
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/* STMDB 1110 1001 00x0 xxxx xxxx xxxx xxxx xxxx */
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/* LDMDB 1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */
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DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM),
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DECODE_END
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};
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static const union decode_item t32_table_1110_100x_x1xx[] = {
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/* Load/store dual, load/store exclusive, table branch */
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/* STRD (immediate) 1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */
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/* LDRD (immediate) 1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */
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DECODE_OR (0xff600000, 0xe8600000),
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/* STRD (immediate) 1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */
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/* LDRD (immediate) 1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD,
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REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
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/* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */
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/* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */
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DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, PROBES_T32_TABLE_BRANCH,
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REGS(NOSP, 0, 0, 0, NOSPPC)),
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/* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */
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/* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */
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/* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */
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/* STREXH 1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */
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/* STREXD 1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */
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/* LDREXB 1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */
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/* LDREXH 1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */
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/* LDREXD 1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */
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/* And unallocated instructions... */
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DECODE_END
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};
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static const union decode_item t32_table_1110_101x[] = {
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/* Data-processing (shifted register) */
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/* TST 1110 1010 0001 xxxx xxxx 1111 xxxx xxxx */
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/* TEQ 1110 1010 1001 xxxx xxxx 1111 xxxx xxxx */
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DECODE_EMULATEX (0xff700f00, 0xea100f00, PROBES_T32_TST,
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REGS(NOSPPC, 0, 0, 0, NOSPPC)),
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/* CMN 1110 1011 0001 xxxx xxxx 1111 xxxx xxxx */
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DECODE_OR (0xfff00f00, 0xeb100f00),
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/* CMP 1110 1011 1011 xxxx xxxx 1111 xxxx xxxx */
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DECODE_EMULATEX (0xfff00f00, 0xebb00f00, PROBES_T32_TST,
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REGS(NOPC, 0, 0, 0, NOSPPC)),
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/* MOV 1110 1010 010x 1111 xxxx xxxx xxxx xxxx */
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/* MVN 1110 1010 011x 1111 xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xffcf0000, 0xea4f0000, PROBES_T32_MOV,
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REGS(0, 0, NOSPPC, 0, NOSPPC)),
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/* ??? 1110 1010 101x xxxx xxxx xxxx xxxx xxxx */
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/* ??? 1110 1010 111x xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffa00000, 0xeaa00000),
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/* ??? 1110 1011 001x xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffe00000, 0xeb200000),
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/* ??? 1110 1011 100x xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffe00000, 0xeb800000),
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/* ??? 1110 1011 111x xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xffe00000, 0xebe00000),
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/* ADD/SUB SP, SP, Rm, LSL #0..3 */
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/* 1110 1011 x0xx 1101 x000 1101 xx00 xxxx */
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DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d00, PROBES_T32_ADDSUB,
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REGS(SP, 0, SP, 0, NOSPPC)),
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/* ADD/SUB SP, SP, Rm, shift */
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/* 1110 1011 x0xx 1101 xxxx 1101 xxxx xxxx */
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DECODE_REJECT (0xff4f0f00, 0xeb0d0d00),
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/* ADD/SUB Rd, SP, Rm, shift */
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/* 1110 1011 x0xx 1101 xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xff4f0000, 0xeb0d0000, PROBES_T32_ADDSUB,
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REGS(SP, 0, NOPC, 0, NOSPPC)),
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/* AND 1110 1010 000x xxxx xxxx xxxx xxxx xxxx */
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/* BIC 1110 1010 001x xxxx xxxx xxxx xxxx xxxx */
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/* ORR 1110 1010 010x xxxx xxxx xxxx xxxx xxxx */
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/* ORN 1110 1010 011x xxxx xxxx xxxx xxxx xxxx */
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/* EOR 1110 1010 100x xxxx xxxx xxxx xxxx xxxx */
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/* PKH 1110 1010 110x xxxx xxxx xxxx xxxx xxxx */
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/* ADD 1110 1011 000x xxxx xxxx xxxx xxxx xxxx */
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/* ADC 1110 1011 010x xxxx xxxx xxxx xxxx xxxx */
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/* SBC 1110 1011 011x xxxx xxxx xxxx xxxx xxxx */
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/* SUB 1110 1011 101x xxxx xxxx xxxx xxxx xxxx */
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/* RSB 1110 1011 110x xxxx xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfe000000, 0xea000000, PROBES_T32_LOGICAL,
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REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
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DECODE_END
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};
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static const union decode_item t32_table_1111_0x0x___0[] = {
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/* Data-processing (modified immediate) */
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/* TST 1111 0x00 0001 xxxx 0xxx 1111 xxxx xxxx */
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/* TEQ 1111 0x00 1001 xxxx 0xxx 1111 xxxx xxxx */
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DECODE_EMULATEX (0xfb708f00, 0xf0100f00, PROBES_T32_TST,
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REGS(NOSPPC, 0, 0, 0, 0)),
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/* CMN 1111 0x01 0001 xxxx 0xxx 1111 xxxx xxxx */
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DECODE_OR (0xfbf08f00, 0xf1100f00),
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/* CMP 1111 0x01 1011 xxxx 0xxx 1111 xxxx xxxx */
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DECODE_EMULATEX (0xfbf08f00, 0xf1b00f00, PROBES_T32_CMP,
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REGS(NOPC, 0, 0, 0, 0)),
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/* MOV 1111 0x00 010x 1111 0xxx xxxx xxxx xxxx */
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/* MVN 1111 0x00 011x 1111 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfbcf8000, 0xf04f0000, PROBES_T32_MOV,
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REGS(0, 0, NOSPPC, 0, 0)),
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/* ??? 1111 0x00 101x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfbe08000, 0xf0a00000),
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/* ??? 1111 0x00 110x xxxx 0xxx xxxx xxxx xxxx */
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/* ??? 1111 0x00 111x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfbc08000, 0xf0c00000),
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/* ??? 1111 0x01 001x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfbe08000, 0xf1200000),
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/* ??? 1111 0x01 100x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfbe08000, 0xf1800000),
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/* ??? 1111 0x01 111x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfbe08000, 0xf1e00000),
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/* ADD Rd, SP, #imm 1111 0x01 000x 1101 0xxx xxxx xxxx xxxx */
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/* SUB Rd, SP, #imm 1111 0x01 101x 1101 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfb4f8000, 0xf10d0000, PROBES_T32_ADDSUB,
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REGS(SP, 0, NOPC, 0, 0)),
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/* AND 1111 0x00 000x xxxx 0xxx xxxx xxxx xxxx */
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/* BIC 1111 0x00 001x xxxx 0xxx xxxx xxxx xxxx */
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/* ORR 1111 0x00 010x xxxx 0xxx xxxx xxxx xxxx */
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/* ORN 1111 0x00 011x xxxx 0xxx xxxx xxxx xxxx */
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/* EOR 1111 0x00 100x xxxx 0xxx xxxx xxxx xxxx */
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/* ADD 1111 0x01 000x xxxx 0xxx xxxx xxxx xxxx */
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/* ADC 1111 0x01 010x xxxx 0xxx xxxx xxxx xxxx */
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/* SBC 1111 0x01 011x xxxx 0xxx xxxx xxxx xxxx */
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/* SUB 1111 0x01 101x xxxx 0xxx xxxx xxxx xxxx */
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/* RSB 1111 0x01 110x xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfa008000, 0xf0000000, PROBES_T32_LOGICAL,
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REGS(NOSPPC, 0, NOSPPC, 0, 0)),
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DECODE_END
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};
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static const union decode_item t32_table_1111_0x1x___0[] = {
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/* Data-processing (plain binary immediate) */
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/* ADDW Rd, PC, #imm 1111 0x10 0000 1111 0xxx xxxx xxxx xxxx */
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DECODE_OR (0xfbff8000, 0xf20f0000),
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/* SUBW Rd, PC, #imm 1111 0x10 1010 1111 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfbff8000, 0xf2af0000, PROBES_T32_ADDWSUBW_PC,
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REGS(PC, 0, NOSPPC, 0, 0)),
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/* ADDW SP, SP, #imm 1111 0x10 0000 1101 0xxx 1101 xxxx xxxx */
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DECODE_OR (0xfbff8f00, 0xf20d0d00),
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/* SUBW SP, SP, #imm 1111 0x10 1010 1101 0xxx 1101 xxxx xxxx */
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DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d00, PROBES_T32_ADDWSUBW,
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REGS(SP, 0, SP, 0, 0)),
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/* ADDW 1111 0x10 0000 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_OR (0xfbf08000, 0xf2000000),
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/* SUBW 1111 0x10 1010 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfbf08000, 0xf2a00000, PROBES_T32_ADDWSUBW,
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REGS(NOPCX, 0, NOSPPC, 0, 0)),
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/* MOVW 1111 0x10 0100 xxxx 0xxx xxxx xxxx xxxx */
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/* MOVT 1111 0x10 1100 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfb708000, 0xf2400000, PROBES_T32_MOVW,
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REGS(0, 0, NOSPPC, 0, 0)),
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/* SSAT16 1111 0x11 0010 xxxx 0000 xxxx 00xx xxxx */
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/* SSAT 1111 0x11 00x0 xxxx 0xxx xxxx xxxx xxxx */
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/* USAT16 1111 0x11 1010 xxxx 0000 xxxx 00xx xxxx */
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/* USAT 1111 0x11 10x0 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfb508000, 0xf3000000, PROBES_T32_SAT,
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REGS(NOSPPC, 0, NOSPPC, 0, 0)),
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/* SFBX 1111 0x11 0100 xxxx 0xxx xxxx xxxx xxxx */
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/* UFBX 1111 0x11 1100 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfb708000, 0xf3400000, PROBES_T32_BITFIELD,
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REGS(NOSPPC, 0, NOSPPC, 0, 0)),
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/* BFC 1111 0x11 0110 1111 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfbff8000, 0xf36f0000, PROBES_T32_BITFIELD,
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REGS(0, 0, NOSPPC, 0, 0)),
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/* BFI 1111 0x11 0110 xxxx 0xxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0xfbf08000, 0xf3600000, PROBES_T32_BITFIELD,
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REGS(NOSPPCX, 0, NOSPPC, 0, 0)),
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DECODE_END
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};
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static const union decode_item t32_table_1111_0xxx___1[] = {
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/* Branches and miscellaneous control */
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/* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */
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DECODE_OR (0xfff0d7ff, 0xf3a08001),
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/* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */
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DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, PROBES_T32_SEV),
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/* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */
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/* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */
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/* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */
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DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, PROBES_T32_WFE),
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/* MRS Rd, CPSR 1111 0011 1110 xxxx 10x0 xxxx xxxx xxxx */
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DECODE_SIMULATEX(0xfff0d000, 0xf3e08000, PROBES_T32_MRS,
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REGS(0, 0, NOSPPC, 0, 0)),
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/*
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* Unsupported instructions
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* 1111 0x11 1xxx xxxx 10x0 xxxx xxxx xxxx
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*
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* MSR 1111 0011 100x xxxx 10x0 xxxx xxxx xxxx
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* DBG hint 1111 0011 1010 xxxx 10x0 x000 1111 xxxx
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* Unallocated hints 1111 0011 1010 xxxx 10x0 x000 xxxx xxxx
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* CPS 1111 0011 1010 xxxx 10x0 xxxx xxxx xxxx
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* CLREX/DSB/DMB/ISB 1111 0011 1011 xxxx 10x0 xxxx xxxx xxxx
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* BXJ 1111 0011 1100 xxxx 10x0 xxxx xxxx xxxx
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* SUBS PC,LR,#<imm8> 1111 0011 1101 xxxx 10x0 xxxx xxxx xxxx
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* MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx
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* SMC 1111 0111 1111 xxxx 1000 xxxx xxxx xxxx
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* UNDEFINED 1111 0111 1111 xxxx 1010 xxxx xxxx xxxx
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* ??? 1111 0111 1xxx xxxx 1010 xxxx xxxx xxxx
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*/
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DECODE_REJECT (0xfb80d000, 0xf3808000),
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/* Bcc 1111 0xxx xxxx xxxx 10x0 xxxx xxxx xxxx */
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DECODE_CUSTOM (0xf800d000, 0xf0008000, PROBES_T32_BRANCH_COND),
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/* BLX 1111 0xxx xxxx xxxx 11x0 xxxx xxxx xxx0 */
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DECODE_OR (0xf800d001, 0xf000c000),
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/* B 1111 0xxx xxxx xxxx 10x1 xxxx xxxx xxxx */
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/* BL 1111 0xxx xxxx xxxx 11x1 xxxx xxxx xxxx */
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DECODE_SIMULATE (0xf8009000, 0xf0009000, PROBES_T32_BRANCH),
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DECODE_END
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};
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static const union decode_item t32_table_1111_100x_x0x1__1111[] = {
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/* Memory hints */
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/* PLD (literal) 1111 1000 x001 1111 1111 xxxx xxxx xxxx */
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/* PLI (literal) 1111 1001 x001 1111 1111 xxxx xxxx xxxx */
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DECODE_SIMULATE (0xfe7ff000, 0xf81ff000, PROBES_T32_PLDI),
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/* PLD{W} (immediate) 1111 1000 10x1 xxxx 1111 xxxx xxxx xxxx */
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DECODE_OR (0xffd0f000, 0xf890f000),
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/* PLD{W} (immediate) 1111 1000 00x1 xxxx 1111 1100 xxxx xxxx */
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DECODE_OR (0xffd0ff00, 0xf810fc00),
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/* PLI (immediate) 1111 1001 1001 xxxx 1111 xxxx xxxx xxxx */
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DECODE_OR (0xfff0f000, 0xf990f000),
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/* PLI (immediate) 1111 1001 0001 xxxx 1111 1100 xxxx xxxx */
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DECODE_SIMULATEX(0xfff0ff00, 0xf910fc00, PROBES_T32_PLDI,
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REGS(NOPCX, 0, 0, 0, 0)),
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/* PLD{W} (register) 1111 1000 00x1 xxxx 1111 0000 00xx xxxx */
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DECODE_OR (0xffd0ffc0, 0xf810f000),
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/* PLI (register) 1111 1001 0001 xxxx 1111 0000 00xx xxxx */
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DECODE_SIMULATEX(0xfff0ffc0, 0xf910f000, PROBES_T32_PLDI,
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REGS(NOPCX, 0, 0, 0, NOSPPC)),
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/* Other unallocated instructions... */
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DECODE_END
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};
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static const union decode_item t32_table_1111_100x[] = {
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/* Store/Load single data item */
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/* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfe600000, 0xf8600000),
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/* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xfff00000, 0xf9500000),
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/* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */
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DECODE_REJECT (0xfe800d00, 0xf8000800),
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/* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */
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/* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */
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/* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */
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/* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */
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/* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */
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/* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */
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/* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */
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/* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */
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DECODE_REJECT (0xfe800f00, 0xf8000e00),
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/* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0xff1f0000, 0xf80f0000),
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/* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */
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DECODE_REJECT (0xff10f000, 0xf800f000),
|
|
|
|
/* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */
|
|
DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, PROBES_T32_LDR_LIT,
|
|
REGS(PC, ANY, 0, 0, 0)),
|
|
|
|
/* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */
|
|
DECODE_OR (0xffe00800, 0xf8400800),
|
|
/* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */
|
|
/* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */
|
|
DECODE_EMULATEX (0xffe00000, 0xf8c00000, PROBES_T32_LDRSTR,
|
|
REGS(NOPCX, ANY, 0, 0, 0)),
|
|
|
|
/* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */
|
|
/* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */
|
|
DECODE_EMULATEX (0xffe00fc0, 0xf8400000, PROBES_T32_LDRSTR,
|
|
REGS(NOPCX, ANY, 0, 0, NOSPPC)),
|
|
|
|
/* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */
|
|
/* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
|
|
/* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
|
|
/* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
|
|
DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, PROBES_T32_LDR_LIT,
|
|
REGS(PC, NOSPPCX, 0, 0, 0)),
|
|
|
|
/* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */
|
|
/* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */
|
|
DECODE_OR (0xfec00800, 0xf8000800),
|
|
/* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */
|
|
/* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */
|
|
/* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */
|
|
/* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */
|
|
/* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */
|
|
/* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */
|
|
DECODE_EMULATEX (0xfec00000, 0xf8800000, PROBES_T32_LDRSTR,
|
|
REGS(NOPCX, NOSPPCX, 0, 0, 0)),
|
|
|
|
/* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */
|
|
/* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */
|
|
/* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */
|
|
/* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */
|
|
/* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */
|
|
/* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */
|
|
DECODE_EMULATEX (0xfe800fc0, 0xf8000000, PROBES_T32_LDRSTR,
|
|
REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)),
|
|
|
|
/* Other unallocated instructions... */
|
|
DECODE_END
|
|
};
|
|
|
|
static const union decode_item t32_table_1111_1010___1111[] = {
|
|
/* Data-processing (register) */
|
|
|
|
/* ??? 1111 1010 011x xxxx 1111 xxxx 1xxx xxxx */
|
|
DECODE_REJECT (0xffe0f080, 0xfa60f080),
|
|
|
|
/* SXTH 1111 1010 0000 1111 1111 xxxx 1xxx xxxx */
|
|
/* UXTH 1111 1010 0001 1111 1111 xxxx 1xxx xxxx */
|
|
/* SXTB16 1111 1010 0010 1111 1111 xxxx 1xxx xxxx */
|
|
/* UXTB16 1111 1010 0011 1111 1111 xxxx 1xxx xxxx */
|
|
/* SXTB 1111 1010 0100 1111 1111 xxxx 1xxx xxxx */
|
|
/* UXTB 1111 1010 0101 1111 1111 xxxx 1xxx xxxx */
|
|
DECODE_EMULATEX (0xff8ff080, 0xfa0ff080, PROBES_T32_SIGN_EXTEND,
|
|
REGS(0, 0, NOSPPC, 0, NOSPPC)),
|
|
|
|
|
|
/* ??? 1111 1010 1xxx xxxx 1111 xxxx 0x11 xxxx */
|
|
DECODE_REJECT (0xff80f0b0, 0xfa80f030),
|
|
/* ??? 1111 1010 1x11 xxxx 1111 xxxx 0xxx xxxx */
|
|
DECODE_REJECT (0xffb0f080, 0xfab0f000),
|
|
|
|
/* SADD16 1111 1010 1001 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SASX 1111 1010 1010 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SSAX 1111 1010 1110 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SSUB16 1111 1010 1101 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SADD8 1111 1010 1000 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SSUB8 1111 1010 1100 xxxx 1111 xxxx 0000 xxxx */
|
|
|
|
/* QADD16 1111 1010 1001 xxxx 1111 xxxx 0001 xxxx */
|
|
/* QASX 1111 1010 1010 xxxx 1111 xxxx 0001 xxxx */
|
|
/* QSAX 1111 1010 1110 xxxx 1111 xxxx 0001 xxxx */
|
|
/* QSUB16 1111 1010 1101 xxxx 1111 xxxx 0001 xxxx */
|
|
/* QADD8 1111 1010 1000 xxxx 1111 xxxx 0001 xxxx */
|
|
/* QSUB8 1111 1010 1100 xxxx 1111 xxxx 0001 xxxx */
|
|
|
|
/* SHADD16 1111 1010 1001 xxxx 1111 xxxx 0010 xxxx */
|
|
/* SHASX 1111 1010 1010 xxxx 1111 xxxx 0010 xxxx */
|
|
/* SHSAX 1111 1010 1110 xxxx 1111 xxxx 0010 xxxx */
|
|
/* SHSUB16 1111 1010 1101 xxxx 1111 xxxx 0010 xxxx */
|
|
/* SHADD8 1111 1010 1000 xxxx 1111 xxxx 0010 xxxx */
|
|
/* SHSUB8 1111 1010 1100 xxxx 1111 xxxx 0010 xxxx */
|
|
|
|
/* UADD16 1111 1010 1001 xxxx 1111 xxxx 0100 xxxx */
|
|
/* UASX 1111 1010 1010 xxxx 1111 xxxx 0100 xxxx */
|
|
/* USAX 1111 1010 1110 xxxx 1111 xxxx 0100 xxxx */
|
|
/* USUB16 1111 1010 1101 xxxx 1111 xxxx 0100 xxxx */
|
|
/* UADD8 1111 1010 1000 xxxx 1111 xxxx 0100 xxxx */
|
|
/* USUB8 1111 1010 1100 xxxx 1111 xxxx 0100 xxxx */
|
|
|
|
/* UQADD16 1111 1010 1001 xxxx 1111 xxxx 0101 xxxx */
|
|
/* UQASX 1111 1010 1010 xxxx 1111 xxxx 0101 xxxx */
|
|
/* UQSAX 1111 1010 1110 xxxx 1111 xxxx 0101 xxxx */
|
|
/* UQSUB16 1111 1010 1101 xxxx 1111 xxxx 0101 xxxx */
|
|
/* UQADD8 1111 1010 1000 xxxx 1111 xxxx 0101 xxxx */
|
|
/* UQSUB8 1111 1010 1100 xxxx 1111 xxxx 0101 xxxx */
|
|
|
|
/* UHADD16 1111 1010 1001 xxxx 1111 xxxx 0110 xxxx */
|
|
/* UHASX 1111 1010 1010 xxxx 1111 xxxx 0110 xxxx */
|
|
/* UHSAX 1111 1010 1110 xxxx 1111 xxxx 0110 xxxx */
|
|
/* UHSUB16 1111 1010 1101 xxxx 1111 xxxx 0110 xxxx */
|
|
/* UHADD8 1111 1010 1000 xxxx 1111 xxxx 0110 xxxx */
|
|
/* UHSUB8 1111 1010 1100 xxxx 1111 xxxx 0110 xxxx */
|
|
DECODE_OR (0xff80f080, 0xfa80f000),
|
|
|
|
/* SXTAH 1111 1010 0000 xxxx 1111 xxxx 1xxx xxxx */
|
|
/* UXTAH 1111 1010 0001 xxxx 1111 xxxx 1xxx xxxx */
|
|
/* SXTAB16 1111 1010 0010 xxxx 1111 xxxx 1xxx xxxx */
|
|
/* UXTAB16 1111 1010 0011 xxxx 1111 xxxx 1xxx xxxx */
|
|
/* SXTAB 1111 1010 0100 xxxx 1111 xxxx 1xxx xxxx */
|
|
/* UXTAB 1111 1010 0101 xxxx 1111 xxxx 1xxx xxxx */
|
|
DECODE_OR (0xff80f080, 0xfa00f080),
|
|
|
|
/* QADD 1111 1010 1000 xxxx 1111 xxxx 1000 xxxx */
|
|
/* QDADD 1111 1010 1000 xxxx 1111 xxxx 1001 xxxx */
|
|
/* QSUB 1111 1010 1000 xxxx 1111 xxxx 1010 xxxx */
|
|
/* QDSUB 1111 1010 1000 xxxx 1111 xxxx 1011 xxxx */
|
|
DECODE_OR (0xfff0f0c0, 0xfa80f080),
|
|
|
|
/* SEL 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */
|
|
DECODE_OR (0xfff0f0f0, 0xfaa0f080),
|
|
|
|
/* LSL 1111 1010 000x xxxx 1111 xxxx 0000 xxxx */
|
|
/* LSR 1111 1010 001x xxxx 1111 xxxx 0000 xxxx */
|
|
/* ASR 1111 1010 010x xxxx 1111 xxxx 0000 xxxx */
|
|
/* ROR 1111 1010 011x xxxx 1111 xxxx 0000 xxxx */
|
|
DECODE_EMULATEX (0xff80f0f0, 0xfa00f000, PROBES_T32_MEDIA,
|
|
REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
|
|
|
|
/* CLZ 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */
|
|
DECODE_OR (0xfff0f0f0, 0xfab0f080),
|
|
|
|
/* REV 1111 1010 1001 xxxx 1111 xxxx 1000 xxxx */
|
|
/* REV16 1111 1010 1001 xxxx 1111 xxxx 1001 xxxx */
|
|
/* RBIT 1111 1010 1001 xxxx 1111 xxxx 1010 xxxx */
|
|
/* REVSH 1111 1010 1001 xxxx 1111 xxxx 1011 xxxx */
|
|
DECODE_EMULATEX (0xfff0f0c0, 0xfa90f080, PROBES_T32_REVERSE,
|
|
REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)),
|
|
|
|
/* Other unallocated instructions... */
|
|
DECODE_END
|
|
};
|
|
|
|
static const union decode_item t32_table_1111_1011_0[] = {
|
|
/* Multiply, multiply accumulate, and absolute difference */
|
|
|
|
/* ??? 1111 1011 0000 xxxx 1111 xxxx 0001 xxxx */
|
|
DECODE_REJECT (0xfff0f0f0, 0xfb00f010),
|
|
/* ??? 1111 1011 0111 xxxx 1111 xxxx 0001 xxxx */
|
|
DECODE_REJECT (0xfff0f0f0, 0xfb70f010),
|
|
|
|
/* SMULxy 1111 1011 0001 xxxx 1111 xxxx 00xx xxxx */
|
|
DECODE_OR (0xfff0f0c0, 0xfb10f000),
|
|
/* MUL 1111 1011 0000 xxxx 1111 xxxx 0000 xxxx */
|
|
/* SMUAD{X} 1111 1011 0010 xxxx 1111 xxxx 000x xxxx */
|
|
/* SMULWy 1111 1011 0011 xxxx 1111 xxxx 000x xxxx */
|
|
/* SMUSD{X} 1111 1011 0100 xxxx 1111 xxxx 000x xxxx */
|
|
/* SMMUL{R} 1111 1011 0101 xxxx 1111 xxxx 000x xxxx */
|
|
/* USAD8 1111 1011 0111 xxxx 1111 xxxx 0000 xxxx */
|
|
DECODE_EMULATEX (0xff80f0e0, 0xfb00f000, PROBES_T32_MUL_ADD,
|
|
REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
|
|
|
|
/* ??? 1111 1011 0111 xxxx xxxx xxxx 0001 xxxx */
|
|
DECODE_REJECT (0xfff000f0, 0xfb700010),
|
|
|
|
/* SMLAxy 1111 1011 0001 xxxx xxxx xxxx 00xx xxxx */
|
|
DECODE_OR (0xfff000c0, 0xfb100000),
|
|
/* MLA 1111 1011 0000 xxxx xxxx xxxx 0000 xxxx */
|
|
/* MLS 1111 1011 0000 xxxx xxxx xxxx 0001 xxxx */
|
|
/* SMLAD{X} 1111 1011 0010 xxxx xxxx xxxx 000x xxxx */
|
|
/* SMLAWy 1111 1011 0011 xxxx xxxx xxxx 000x xxxx */
|
|
/* SMLSD{X} 1111 1011 0100 xxxx xxxx xxxx 000x xxxx */
|
|
/* SMMLA{R} 1111 1011 0101 xxxx xxxx xxxx 000x xxxx */
|
|
/* SMMLS{R} 1111 1011 0110 xxxx xxxx xxxx 000x xxxx */
|
|
/* USADA8 1111 1011 0111 xxxx xxxx xxxx 0000 xxxx */
|
|
DECODE_EMULATEX (0xff8000c0, 0xfb000000, PROBES_T32_MUL_ADD2,
|
|
REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)),
|
|
|
|
/* Other unallocated instructions... */
|
|
DECODE_END
|
|
};
|
|
|
|
static const union decode_item t32_table_1111_1011_1[] = {
|
|
/* Long multiply, long multiply accumulate, and divide */
|
|
|
|
/* UMAAL 1111 1011 1110 xxxx xxxx xxxx 0110 xxxx */
|
|
DECODE_OR (0xfff000f0, 0xfbe00060),
|
|
/* SMLALxy 1111 1011 1100 xxxx xxxx xxxx 10xx xxxx */
|
|
DECODE_OR (0xfff000c0, 0xfbc00080),
|
|
/* SMLALD{X} 1111 1011 1100 xxxx xxxx xxxx 110x xxxx */
|
|
/* SMLSLD{X} 1111 1011 1101 xxxx xxxx xxxx 110x xxxx */
|
|
DECODE_OR (0xffe000e0, 0xfbc000c0),
|
|
/* SMULL 1111 1011 1000 xxxx xxxx xxxx 0000 xxxx */
|
|
/* UMULL 1111 1011 1010 xxxx xxxx xxxx 0000 xxxx */
|
|
/* SMLAL 1111 1011 1100 xxxx xxxx xxxx 0000 xxxx */
|
|
/* UMLAL 1111 1011 1110 xxxx xxxx xxxx 0000 xxxx */
|
|
DECODE_EMULATEX (0xff9000f0, 0xfb800000, PROBES_T32_MUL_ADD_LONG,
|
|
REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)),
|
|
|
|
/* SDIV 1111 1011 1001 xxxx xxxx xxxx 1111 xxxx */
|
|
/* UDIV 1111 1011 1011 xxxx xxxx xxxx 1111 xxxx */
|
|
/* Other unallocated instructions... */
|
|
DECODE_END
|
|
};
|
|
|
|
const union decode_item probes_decode_thumb32_table[] = {
|
|
|
|
/*
|
|
* Load/store multiple instructions
|
|
* 1110 100x x0xx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfe400000, 0xe8000000, t32_table_1110_100x_x0xx),
|
|
|
|
/*
|
|
* Load/store dual, load/store exclusive, table branch
|
|
* 1110 100x x1xx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfe400000, 0xe8400000, t32_table_1110_100x_x1xx),
|
|
|
|
/*
|
|
* Data-processing (shifted register)
|
|
* 1110 101x xxxx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfe000000, 0xea000000, t32_table_1110_101x),
|
|
|
|
/*
|
|
* Coprocessor instructions
|
|
* 1110 11xx xxxx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_REJECT (0xfc000000, 0xec000000),
|
|
|
|
/*
|
|
* Data-processing (modified immediate)
|
|
* 1111 0x0x xxxx xxxx 0xxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfa008000, 0xf0000000, t32_table_1111_0x0x___0),
|
|
|
|
/*
|
|
* Data-processing (plain binary immediate)
|
|
* 1111 0x1x xxxx xxxx 0xxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfa008000, 0xf2000000, t32_table_1111_0x1x___0),
|
|
|
|
/*
|
|
* Branches and miscellaneous control
|
|
* 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1),
|
|
|
|
/*
|
|
* Advanced SIMD element or structure load/store instructions
|
|
* 1111 1001 xxx0 xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_REJECT (0xff100000, 0xf9000000),
|
|
|
|
/*
|
|
* Memory hints
|
|
* 1111 100x x0x1 xxxx 1111 xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111),
|
|
|
|
/*
|
|
* Store single data item
|
|
* 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx
|
|
* Load single data items
|
|
* 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x),
|
|
|
|
/*
|
|
* Data-processing (register)
|
|
* 1111 1010 xxxx xxxx 1111 xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xff00f000, 0xfa00f000, t32_table_1111_1010___1111),
|
|
|
|
/*
|
|
* Multiply, multiply accumulate, and absolute difference
|
|
* 1111 1011 0xxx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xff800000, 0xfb000000, t32_table_1111_1011_0),
|
|
|
|
/*
|
|
* Long multiply, long multiply accumulate, and divide
|
|
* 1111 1011 1xxx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xff800000, 0xfb800000, t32_table_1111_1011_1),
|
|
|
|
/*
|
|
* Coprocessor instructions
|
|
* 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx
|
|
*/
|
|
DECODE_END
|
|
};
|
|
#ifdef CONFIG_ARM_KPROBES_TEST_MODULE
|
|
EXPORT_SYMBOL_GPL(probes_decode_thumb32_table);
|
|
#endif
|
|
|
|
static const union decode_item t16_table_1011[] = {
|
|
/* Miscellaneous 16-bit instructions */
|
|
|
|
/* ADD (SP plus immediate) 1011 0000 0xxx xxxx */
|
|
/* SUB (SP minus immediate) 1011 0000 1xxx xxxx */
|
|
DECODE_SIMULATE (0xff00, 0xb000, PROBES_T16_ADD_SP),
|
|
|
|
/* CBZ 1011 00x1 xxxx xxxx */
|
|
/* CBNZ 1011 10x1 xxxx xxxx */
|
|
DECODE_SIMULATE (0xf500, 0xb100, PROBES_T16_CBZ),
|
|
|
|
/* SXTH 1011 0010 00xx xxxx */
|
|
/* SXTB 1011 0010 01xx xxxx */
|
|
/* UXTH 1011 0010 10xx xxxx */
|
|
/* UXTB 1011 0010 11xx xxxx */
|
|
/* REV 1011 1010 00xx xxxx */
|
|
/* REV16 1011 1010 01xx xxxx */
|
|
/* ??? 1011 1010 10xx xxxx */
|
|
/* REVSH 1011 1010 11xx xxxx */
|
|
DECODE_REJECT (0xffc0, 0xba80),
|
|
DECODE_EMULATE (0xf500, 0xb000, PROBES_T16_SIGN_EXTEND),
|
|
|
|
/* PUSH 1011 010x xxxx xxxx */
|
|
DECODE_CUSTOM (0xfe00, 0xb400, PROBES_T16_PUSH),
|
|
/* POP 1011 110x xxxx xxxx */
|
|
DECODE_CUSTOM (0xfe00, 0xbc00, PROBES_T16_POP),
|
|
|
|
/*
|
|
* If-Then, and hints
|
|
* 1011 1111 xxxx xxxx
|
|
*/
|
|
|
|
/* YIELD 1011 1111 0001 0000 */
|
|
DECODE_OR (0xffff, 0xbf10),
|
|
/* SEV 1011 1111 0100 0000 */
|
|
DECODE_EMULATE (0xffff, 0xbf40, PROBES_T16_SEV),
|
|
/* NOP 1011 1111 0000 0000 */
|
|
/* WFE 1011 1111 0010 0000 */
|
|
/* WFI 1011 1111 0011 0000 */
|
|
DECODE_SIMULATE (0xffcf, 0xbf00, PROBES_T16_WFE),
|
|
/* Unassigned hints 1011 1111 xxxx 0000 */
|
|
DECODE_REJECT (0xff0f, 0xbf00),
|
|
/* IT 1011 1111 xxxx xxxx */
|
|
DECODE_CUSTOM (0xff00, 0xbf00, PROBES_T16_IT),
|
|
|
|
/* SETEND 1011 0110 010x xxxx */
|
|
/* CPS 1011 0110 011x xxxx */
|
|
/* BKPT 1011 1110 xxxx xxxx */
|
|
/* And unallocated instructions... */
|
|
DECODE_END
|
|
};
|
|
|
|
const union decode_item probes_decode_thumb16_table[] = {
|
|
|
|
/*
|
|
* Shift (immediate), add, subtract, move, and compare
|
|
* 00xx xxxx xxxx xxxx
|
|
*/
|
|
|
|
/* CMP (immediate) 0010 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xf800, 0x2800, PROBES_T16_CMP),
|
|
|
|
/* ADD (register) 0001 100x xxxx xxxx */
|
|
/* SUB (register) 0001 101x xxxx xxxx */
|
|
/* LSL (immediate) 0000 0xxx xxxx xxxx */
|
|
/* LSR (immediate) 0000 1xxx xxxx xxxx */
|
|
/* ASR (immediate) 0001 0xxx xxxx xxxx */
|
|
/* ADD (immediate, Thumb) 0001 110x xxxx xxxx */
|
|
/* SUB (immediate, Thumb) 0001 111x xxxx xxxx */
|
|
/* MOV (immediate) 0010 0xxx xxxx xxxx */
|
|
/* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */
|
|
/* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xc000, 0x0000, PROBES_T16_ADDSUB),
|
|
|
|
/*
|
|
* 16-bit Thumb data-processing instructions
|
|
* 0100 00xx xxxx xxxx
|
|
*/
|
|
|
|
/* TST (register) 0100 0010 00xx xxxx */
|
|
DECODE_EMULATE (0xffc0, 0x4200, PROBES_T16_CMP),
|
|
/* CMP (register) 0100 0010 10xx xxxx */
|
|
/* CMN (register) 0100 0010 11xx xxxx */
|
|
DECODE_EMULATE (0xff80, 0x4280, PROBES_T16_CMP),
|
|
/* AND (register) 0100 0000 00xx xxxx */
|
|
/* EOR (register) 0100 0000 01xx xxxx */
|
|
/* LSL (register) 0100 0000 10xx xxxx */
|
|
/* LSR (register) 0100 0000 11xx xxxx */
|
|
/* ASR (register) 0100 0001 00xx xxxx */
|
|
/* ADC (register) 0100 0001 01xx xxxx */
|
|
/* SBC (register) 0100 0001 10xx xxxx */
|
|
/* ROR (register) 0100 0001 11xx xxxx */
|
|
/* RSB (immediate) 0100 0010 01xx xxxx */
|
|
/* ORR (register) 0100 0011 00xx xxxx */
|
|
/* MUL 0100 0011 00xx xxxx */
|
|
/* BIC (register) 0100 0011 10xx xxxx */
|
|
/* MVN (register) 0100 0011 10xx xxxx */
|
|
DECODE_EMULATE (0xfc00, 0x4000, PROBES_T16_LOGICAL),
|
|
|
|
/*
|
|
* Special data instructions and branch and exchange
|
|
* 0100 01xx xxxx xxxx
|
|
*/
|
|
|
|
/* BLX pc 0100 0111 1111 1xxx */
|
|
DECODE_REJECT (0xfff8, 0x47f8),
|
|
|
|
/* BX (register) 0100 0111 0xxx xxxx */
|
|
/* BLX (register) 0100 0111 1xxx xxxx */
|
|
DECODE_SIMULATE (0xff00, 0x4700, PROBES_T16_BLX),
|
|
|
|
/* ADD pc, pc 0100 0100 1111 1111 */
|
|
DECODE_REJECT (0xffff, 0x44ff),
|
|
|
|
/* ADD (register) 0100 0100 xxxx xxxx */
|
|
/* CMP (register) 0100 0101 xxxx xxxx */
|
|
/* MOV (register) 0100 0110 xxxx xxxx */
|
|
DECODE_CUSTOM (0xfc00, 0x4400, PROBES_T16_HIREGOPS),
|
|
|
|
/*
|
|
* Load from Literal Pool
|
|
* LDR (literal) 0100 1xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf800, 0x4800, PROBES_T16_LDR_LIT),
|
|
|
|
/*
|
|
* 16-bit Thumb Load/store instructions
|
|
* 0101 xxxx xxxx xxxx
|
|
* 011x xxxx xxxx xxxx
|
|
* 100x xxxx xxxx xxxx
|
|
*/
|
|
|
|
/* STR (register) 0101 000x xxxx xxxx */
|
|
/* STRH (register) 0101 001x xxxx xxxx */
|
|
/* STRB (register) 0101 010x xxxx xxxx */
|
|
/* LDRSB (register) 0101 011x xxxx xxxx */
|
|
/* LDR (register) 0101 100x xxxx xxxx */
|
|
/* LDRH (register) 0101 101x xxxx xxxx */
|
|
/* LDRB (register) 0101 110x xxxx xxxx */
|
|
/* LDRSH (register) 0101 111x xxxx xxxx */
|
|
/* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */
|
|
/* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */
|
|
/* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */
|
|
/* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xc000, 0x4000, PROBES_T16_LDRHSTRH),
|
|
/* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */
|
|
/* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xf000, 0x8000, PROBES_T16_LDRHSTRH),
|
|
/* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */
|
|
/* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */
|
|
DECODE_SIMULATE (0xf000, 0x9000, PROBES_T16_LDRSTR),
|
|
|
|
/*
|
|
* Generate PC-/SP-relative address
|
|
* ADR (literal) 1010 0xxx xxxx xxxx
|
|
* ADD (SP plus immediate) 1010 1xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf000, 0xa000, PROBES_T16_ADR),
|
|
|
|
/*
|
|
* Miscellaneous 16-bit instructions
|
|
* 1011 xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xf000, 0xb000, t16_table_1011),
|
|
|
|
/* STM 1100 0xxx xxxx xxxx */
|
|
/* LDM 1100 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xf000, 0xc000, PROBES_T16_LDMSTM),
|
|
|
|
/*
|
|
* Conditional branch, and Supervisor Call
|
|
*/
|
|
|
|
/* Permanently UNDEFINED 1101 1110 xxxx xxxx */
|
|
/* SVC 1101 1111 xxxx xxxx */
|
|
DECODE_REJECT (0xfe00, 0xde00),
|
|
|
|
/* Conditional branch 1101 xxxx xxxx xxxx */
|
|
DECODE_CUSTOM (0xf000, 0xd000, PROBES_T16_BRANCH_COND),
|
|
|
|
/*
|
|
* Unconditional branch
|
|
* B 1110 0xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf800, 0xe000, PROBES_T16_BRANCH),
|
|
|
|
DECODE_END
|
|
};
|
|
#ifdef CONFIG_ARM_KPROBES_TEST_MODULE
|
|
EXPORT_SYMBOL_GPL(probes_decode_thumb16_table);
|
|
#endif
|
|
|
|
static unsigned long __kprobes thumb_check_cc(unsigned long cpsr)
|
|
{
|
|
if (unlikely(in_it_block(cpsr)))
|
|
return probes_condition_checks[current_cond(cpsr)](cpsr);
|
|
return true;
|
|
}
|
|
|
|
static void __kprobes thumb16_singlestep(probes_opcode_t opcode,
|
|
struct arch_probes_insn *asi,
|
|
struct pt_regs *regs)
|
|
{
|
|
regs->ARM_pc += 2;
|
|
asi->insn_handler(opcode, asi, regs);
|
|
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
|
|
}
|
|
|
|
static void __kprobes thumb32_singlestep(probes_opcode_t opcode,
|
|
struct arch_probes_insn *asi,
|
|
struct pt_regs *regs)
|
|
{
|
|
regs->ARM_pc += 4;
|
|
asi->insn_handler(opcode, asi, regs);
|
|
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
|
|
}
|
|
|
|
enum probes_insn __kprobes
|
|
thumb16_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi,
|
|
bool emulate, const union decode_action *actions,
|
|
const struct decode_checker *checkers[])
|
|
{
|
|
asi->insn_singlestep = thumb16_singlestep;
|
|
asi->insn_check_cc = thumb_check_cc;
|
|
return probes_decode_insn(insn, asi, probes_decode_thumb16_table, true,
|
|
emulate, actions, checkers);
|
|
}
|
|
|
|
enum probes_insn __kprobes
|
|
thumb32_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi,
|
|
bool emulate, const union decode_action *actions,
|
|
const struct decode_checker *checkers[])
|
|
{
|
|
asi->insn_singlestep = thumb32_singlestep;
|
|
asi->insn_check_cc = thumb_check_cc;
|
|
return probes_decode_insn(insn, asi, probes_decode_thumb32_table, true,
|
|
emulate, actions, checkers);
|
|
}
|