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![Chris Down](/assets/img/avatar_default.png)
We have a number of systems industry-wide that have a subset of their functionality that works as follows: 1. Receive a message from local kmsg, serial console, or netconsole; 2. Apply a set of rules to classify the message; 3. Do something based on this classification (like scheduling a remediation for the machine), rinse, and repeat. As a couple of examples of places we have this implemented just inside Facebook, although this isn't a Facebook-specific problem, we have this inside our netconsole processing (for alarm classification), and as part of our machine health checking. We use these messages to determine fairly important metrics around production health, and it's important that we get them right. While for some kinds of issues we have counters, tracepoints, or metrics with a stable interface which can reliably indicate the issue, in order to react to production issues quickly we need to work with the interface which most kernel developers naturally use when developing: printk. Most production issues come from unexpected phenomena, and as such usually the code in question doesn't have easily usable tracepoints or other counters available for the specific problem being mitigated. We have a number of lines of monitoring defence against problems in production (host metrics, process metrics, service metrics, etc), and where it's not feasible to reliably monitor at another level, this kind of pragmatic netconsole monitoring is essential. As one would expect, monitoring using printk is rather brittle for a number of reasons -- most notably that the message might disappear entirely in a new version of the kernel, or that the message may change in some way that the regex or other classification methods start to silently fail. One factor that makes this even harder is that, under normal operation, many of these messages are never expected to be hit. For example, there may be a rare hardware bug which one wants to detect if it was to ever happen again, but its recurrence is not likely or anticipated. This precludes using something like checking whether the printk in question was printed somewhere fleetwide recently to determine whether the message in question is still present or not, since we don't anticipate that it should be printed anywhere, but still need to monitor for its future presence in the long-term. This class of issue has happened on a number of occasions, causing unhealthy machines with hardware issues to remain in production for longer than ideal. As a recent example, some monitoring around blk_update_request fell out of date and caused semi-broken machines to remain in production for longer than would be desirable. Searching through the codebase to find the message is also extremely fragile, because many of the messages are further constructed beyond their callsite (eg. btrfs_printk and other module-specific wrappers, each with their own functionality). Even if they aren't, guessing the format and formulation of the underlying message based on the aesthetics of the message emitted is not a recipe for success at scale, and our previous issues with fleetwide machine health checking demonstrate as much. This provides a solution to the issue of silently changed or deleted printks: we record pointers to all printk format strings known at compile time into a new .printk_index section, both in vmlinux and modules. At runtime, this can then be iterated by looking at <debugfs>/printk/index/<module>, which emits the following format, both readable by humans and able to be parsed by machines: $ head -1 vmlinux; shuf -n 5 vmlinux # <level[,flags]> filename:line function "format" <5> block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n" <4> kernel/trace/trace.c:8296 trace_create_file "Could not create tracefs '%s' entry\n" <6> arch/x86/kernel/hpet.c:144 _hpet_print_config "hpet: %s(%d):\n" <6> init/do_mounts.c:605 prepare_namespace "Waiting for root device %s...\n" <6> drivers/acpi/osl.c:1410 acpi_no_auto_serialize_setup "ACPI: auto-serialization disabled\n" This mitigates the majority of cases where we have a highly-specific printk which we want to match on, as we can now enumerate and check whether the format changed or the printk callsite disappeared entirely in userspace. This allows us to catch changes to printks we monitor earlier and decide what to do about it before it becomes problematic. There is no additional runtime cost for printk callers or printk itself, and the assembly generated is exactly the same. Signed-off-by: Chris Down <chris@chrisdown.name> Cc: Petr Mladek <pmladek@suse.com> Cc: Jessica Yu <jeyu@kernel.org> Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: John Ogness <john.ogness@linutronix.de> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Kees Cook <keescook@chromium.org> Reviewed-by: Petr Mladek <pmladek@suse.com> Tested-by: Petr Mladek <pmladek@suse.com> Reported-by: kernel test robot <lkp@intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Jessica Yu <jeyu@kernel.org> # for module.{c,h} Signed-off-by: Petr Mladek <pmladek@suse.com> Link: https://lore.kernel.org/r/e42070983637ac5e384f17fbdbe86d19c7b212a5.1623775748.git.chris@chrisdown.name
326 lines
8.4 KiB
ArmAsm
326 lines
8.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/arch/arm/vfp/vfphw.S
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*
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* Copyright (C) 2004 ARM Limited.
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* Written by Deep Blue Solutions Limited.
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*
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* This code is called from the kernel's undefined instruction trap.
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* r9 holds the return address for successful handling.
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* lr holds the return address for unrecognised instructions.
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* r10 points at the start of the private FP workspace in the thread structure
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* sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h)
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*/
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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#include <asm/vfpmacros.h>
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#include <linux/kern_levels.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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.macro DBGSTR, str
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#ifdef DEBUG
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stmfd sp!, {r0-r3, ip, lr}
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ldr r0, =1f
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bl _printk
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ldmfd sp!, {r0-r3, ip, lr}
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.pushsection .rodata, "a"
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1: .ascii KERN_DEBUG "VFP: \str\n"
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.byte 0
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.previous
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#endif
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.endm
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.macro DBGSTR1, str, arg
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#ifdef DEBUG
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stmfd sp!, {r0-r3, ip, lr}
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mov r1, \arg
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ldr r0, =1f
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bl _printk
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ldmfd sp!, {r0-r3, ip, lr}
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.pushsection .rodata, "a"
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1: .ascii KERN_DEBUG "VFP: \str\n"
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.byte 0
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.previous
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#endif
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.endm
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.macro DBGSTR3, str, arg1, arg2, arg3
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#ifdef DEBUG
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stmfd sp!, {r0-r3, ip, lr}
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mov r3, \arg3
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mov r2, \arg2
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mov r1, \arg1
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ldr r0, =1f
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bl _printk
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ldmfd sp!, {r0-r3, ip, lr}
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.pushsection .rodata, "a"
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1: .ascii KERN_DEBUG "VFP: \str\n"
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.byte 0
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.previous
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#endif
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.endm
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@ VFP hardware support entry point.
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@
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@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
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@ r2 = PC value to resume execution after successful emulation
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@ r9 = normal "successful" return address
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@ r10 = vfp_state union
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@ r11 = CPU number
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@ lr = unrecognised instruction return address
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@ IRQs enabled.
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ENTRY(vfp_support_entry)
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DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
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.fpu vfpv2
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VFPFMRX r1, FPEXC @ Is the VFP enabled?
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DBGSTR1 "fpexc %08x", r1
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tst r1, #FPEXC_EN
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bne look_for_VFP_exceptions @ VFP is already enabled
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DBGSTR1 "enable %x", r10
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ldr r3, vfp_current_hw_state_address
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orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set
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ldr r4, [r3, r11, lsl #2] @ vfp_current_hw_state pointer
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bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled
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cmp r4, r10 @ this thread owns the hw context?
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#ifndef CONFIG_SMP
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@ For UP, checking that this thread owns the hw context is
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@ sufficient to determine that the hardware state is valid.
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beq vfp_hw_state_valid
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@ On UP, we lazily save the VFP context. As a different
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@ thread wants ownership of the VFP hardware, save the old
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@ state if there was a previous (valid) owner.
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VFPFMXR FPEXC, r5 @ enable VFP, disable any pending
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@ exceptions, so we can get at the
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@ rest of it
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DBGSTR1 "save old state %p", r4
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cmp r4, #0 @ if the vfp_current_hw_state is NULL
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beq vfp_reload_hw @ then the hw state needs reloading
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VFPFSTMIA r4, r5 @ save the working registers
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VFPFMRX r5, FPSCR @ current status
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#ifndef CONFIG_CPU_FEROCEON
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tst r1, #FPEXC_EX @ is there additional state to save?
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beq 1f
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VFPFMRX r6, FPINST @ FPINST (only if FPEXC.EX is set)
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tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?
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beq 1f
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VFPFMRX r8, FPINST2 @ FPINST2 if needed (and present)
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1:
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#endif
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stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
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vfp_reload_hw:
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#else
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@ For SMP, if this thread does not own the hw context, then we
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@ need to reload it. No need to save the old state as on SMP,
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@ we always save the state when we switch away from a thread.
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bne vfp_reload_hw
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@ This thread has ownership of the current hardware context.
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@ However, it may have been migrated to another CPU, in which
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@ case the saved state is newer than the hardware context.
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@ Check this by looking at the CPU number which the state was
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@ last loaded onto.
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ldr ip, [r10, #VFP_CPU]
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teq ip, r11
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beq vfp_hw_state_valid
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vfp_reload_hw:
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@ We're loading this threads state into the VFP hardware. Update
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@ the CPU number which contains the most up to date VFP context.
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str r11, [r10, #VFP_CPU]
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VFPFMXR FPEXC, r5 @ enable VFP, disable any pending
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@ exceptions, so we can get at the
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@ rest of it
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#endif
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DBGSTR1 "load state %p", r10
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str r10, [r3, r11, lsl #2] @ update the vfp_current_hw_state pointer
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@ Load the saved state back into the VFP
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VFPFLDMIA r10, r5 @ reload the working registers while
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@ FPEXC is in a safe state
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ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
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#ifndef CONFIG_CPU_FEROCEON
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tst r1, #FPEXC_EX @ is there additional state to restore?
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beq 1f
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VFPFMXR FPINST, r6 @ restore FPINST (only if FPEXC.EX is set)
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tst r1, #FPEXC_FP2V @ is there an FPINST2 to write?
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beq 1f
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VFPFMXR FPINST2, r8 @ FPINST2 if needed (and present)
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1:
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#endif
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VFPFMXR FPSCR, r5 @ restore status
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@ The context stored in the VFP hardware is up to date with this thread
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vfp_hw_state_valid:
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tst r1, #FPEXC_EX
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bne process_exception @ might as well handle the pending
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@ exception before retrying branch
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@ out before setting an FPEXC that
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@ stops us reading stuff
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VFPFMXR FPEXC, r1 @ Restore FPEXC last
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sub r2, r2, #4 @ Retry current instruction - if Thumb
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str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
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@ else it's one 32-bit instruction, so
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@ always subtract 4 from the following
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@ instruction address.
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dec_preempt_count_ti r10, r4
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ret r9 @ we think we have handled things
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look_for_VFP_exceptions:
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@ Check for synchronous or asynchronous exception
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tst r1, #FPEXC_EX | FPEXC_DEX
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bne process_exception
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@ On some implementations of the VFP subarch 1, setting FPSCR.IXE
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@ causes all the CDP instructions to be bounced synchronously without
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@ setting the FPEXC.EX bit
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VFPFMRX r5, FPSCR
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tst r5, #FPSCR_IXE
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bne process_exception
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tst r5, #FPSCR_LENGTH_MASK
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beq skip
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orr r1, r1, #FPEXC_DEX
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b process_exception
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skip:
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@ Fall into hand on to next handler - appropriate coproc instr
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@ not recognised by VFP
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DBGSTR "not VFP"
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dec_preempt_count_ti r10, r4
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ret lr
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process_exception:
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DBGSTR "bounce"
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mov r2, sp @ nothing stacked - regdump is at TOS
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mov lr, r9 @ setup for a return to the user code.
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@ Now call the C code to package up the bounce to the support code
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@ r0 holds the trigger instruction
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@ r1 holds the FPEXC value
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@ r2 pointer to register dump
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b VFP_bounce @ we have handled this - the support
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@ code will raise an exception if
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@ required. If not, the user code will
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@ retry the faulted instruction
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ENDPROC(vfp_support_entry)
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ENTRY(vfp_save_state)
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@ Save the current VFP state
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@ r0 - save location
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@ r1 - FPEXC
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DBGSTR1 "save VFP state %p", r0
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VFPFSTMIA r0, r2 @ save the working registers
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VFPFMRX r2, FPSCR @ current status
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tst r1, #FPEXC_EX @ is there additional state to save?
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beq 1f
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VFPFMRX r3, FPINST @ FPINST (only if FPEXC.EX is set)
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tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?
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beq 1f
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VFPFMRX r12, FPINST2 @ FPINST2 if needed (and present)
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1:
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stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
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ret lr
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ENDPROC(vfp_save_state)
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.align
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vfp_current_hw_state_address:
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.word vfp_current_hw_state
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.macro tbl_branch, base, tmp, shift
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#ifdef CONFIG_THUMB2_KERNEL
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adr \tmp, 1f
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add \tmp, \tmp, \base, lsl \shift
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ret \tmp
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#else
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add pc, pc, \base, lsl \shift
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mov r0, r0
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#endif
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1:
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.endm
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ENTRY(vfp_get_float)
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tbl_branch r0, r3, #3
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.fpu vfpv2
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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1: vmov r0, s\dr
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ret lr
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.org 1b + 8
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.endr
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.irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
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1: vmov r0, s\dr
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ret lr
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.org 1b + 8
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.endr
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ENDPROC(vfp_get_float)
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ENTRY(vfp_put_float)
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tbl_branch r1, r3, #3
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.fpu vfpv2
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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1: vmov s\dr, r0
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ret lr
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.org 1b + 8
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.endr
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.irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
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1: vmov s\dr, r0
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ret lr
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.org 1b + 8
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.endr
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ENDPROC(vfp_put_float)
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ENTRY(vfp_get_double)
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tbl_branch r0, r3, #3
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.fpu vfpv2
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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1: vmov r0, r1, d\dr
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ret lr
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.org 1b + 8
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.endr
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#ifdef CONFIG_VFPv3
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@ d16 - d31 registers
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.fpu vfpv3
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.irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
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1: vmov r0, r1, d\dr
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ret lr
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.org 1b + 8
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.endr
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#endif
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@ virtual register 16 (or 32 if VFPv3) for compare with zero
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mov r0, #0
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mov r1, #0
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ret lr
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ENDPROC(vfp_get_double)
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ENTRY(vfp_put_double)
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tbl_branch r2, r3, #3
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.fpu vfpv2
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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1: vmov d\dr, r0, r1
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ret lr
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.org 1b + 8
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.endr
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#ifdef CONFIG_VFPv3
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.fpu vfpv3
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@ d16 - d31 registers
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.irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
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1: vmov d\dr, r0, r1
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ret lr
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.org 1b + 8
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.endr
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#endif
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ENDPROC(vfp_put_double)
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