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67a9c428ef
The short psw definitions are contained in compat header files, however short psws are not compat specific. Therefore move the definitions to ptrace header file. This also gets rid of a compat header include in kvm code. Acked-by: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
261 lines
7.3 KiB
C
261 lines
7.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* S390 version
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* Copyright IBM Corp. 1999, 2000
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* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
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*/
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#ifndef _S390_PTRACE_H
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#define _S390_PTRACE_H
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#include <linux/bits.h>
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#include <uapi/asm/ptrace.h>
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#include <asm/tpi.h>
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#define PIF_SYSCALL 0 /* inside a system call */
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#define PIF_EXECVE_PGSTE_RESTART 1 /* restart execve for PGSTE binaries */
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#define PIF_SYSCALL_RET_SET 2 /* return value was set via ptrace */
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#define PIF_GUEST_FAULT 3 /* indicates program check in sie64a */
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#define PIF_FTRACE_FULL_REGS 4 /* all register contents valid (ftrace) */
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#define _PIF_SYSCALL BIT(PIF_SYSCALL)
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#define _PIF_EXECVE_PGSTE_RESTART BIT(PIF_EXECVE_PGSTE_RESTART)
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#define _PIF_SYSCALL_RET_SET BIT(PIF_SYSCALL_RET_SET)
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#define _PIF_GUEST_FAULT BIT(PIF_GUEST_FAULT)
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#define _PIF_FTRACE_FULL_REGS BIT(PIF_FTRACE_FULL_REGS)
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#ifndef __ASSEMBLY__
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#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
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PSW_MASK_EA | PSW_MASK_BA)
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#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
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PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
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PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
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struct psw_bits {
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unsigned long : 1;
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unsigned long per : 1; /* PER-Mask */
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unsigned long : 3;
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unsigned long dat : 1; /* DAT Mode */
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unsigned long io : 1; /* Input/Output Mask */
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unsigned long ext : 1; /* External Mask */
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unsigned long key : 4; /* PSW Key */
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unsigned long : 1;
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unsigned long mcheck : 1; /* Machine-Check Mask */
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unsigned long wait : 1; /* Wait State */
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unsigned long pstate : 1; /* Problem State */
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unsigned long as : 2; /* Address Space Control */
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unsigned long cc : 2; /* Condition Code */
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unsigned long pm : 4; /* Program Mask */
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unsigned long ri : 1; /* Runtime Instrumentation */
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unsigned long : 6;
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unsigned long eaba : 2; /* Addressing Mode */
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unsigned long : 31;
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unsigned long ia : 64; /* Instruction Address */
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};
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enum {
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PSW_BITS_AMODE_24BIT = 0,
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PSW_BITS_AMODE_31BIT = 1,
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PSW_BITS_AMODE_64BIT = 3
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};
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enum {
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PSW_BITS_AS_PRIMARY = 0,
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PSW_BITS_AS_ACCREG = 1,
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PSW_BITS_AS_SECONDARY = 2,
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PSW_BITS_AS_HOME = 3
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};
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#define psw_bits(__psw) (*({ \
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typecheck(psw_t, __psw); \
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&(*(struct psw_bits *)(&(__psw))); \
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}))
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#define PSW32_MASK_PER 0x40000000UL
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#define PSW32_MASK_DAT 0x04000000UL
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#define PSW32_MASK_IO 0x02000000UL
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#define PSW32_MASK_EXT 0x01000000UL
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#define PSW32_MASK_KEY 0x00F00000UL
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#define PSW32_MASK_BASE 0x00080000UL /* Always one */
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#define PSW32_MASK_MCHECK 0x00040000UL
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#define PSW32_MASK_WAIT 0x00020000UL
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#define PSW32_MASK_PSTATE 0x00010000UL
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#define PSW32_MASK_ASC 0x0000C000UL
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#define PSW32_MASK_CC 0x00003000UL
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#define PSW32_MASK_PM 0x00000f00UL
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#define PSW32_MASK_RI 0x00000080UL
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#define PSW32_ADDR_AMODE 0x80000000UL
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#define PSW32_ADDR_INSN 0x7FFFFFFFUL
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#define PSW32_DEFAULT_KEY (((u32)PAGE_DEFAULT_ACC) << 20)
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#define PSW32_ASC_PRIMARY 0x00000000UL
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#define PSW32_ASC_ACCREG 0x00004000UL
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#define PSW32_ASC_SECONDARY 0x00008000UL
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#define PSW32_ASC_HOME 0x0000C000UL
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typedef struct {
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unsigned int mask;
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unsigned int addr;
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} psw_t32 __aligned(8);
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#define PGM_INT_CODE_MASK 0x7f
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#define PGM_INT_CODE_PER 0x80
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/*
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* The pt_regs struct defines the way the registers are stored on
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* the stack during a system call.
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*/
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struct pt_regs {
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union {
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user_pt_regs user_regs;
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struct {
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unsigned long args[1];
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psw_t psw;
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unsigned long gprs[NUM_GPRS];
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};
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};
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unsigned long orig_gpr2;
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union {
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struct {
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unsigned int int_code;
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unsigned int int_parm;
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unsigned long int_parm_long;
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};
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struct tpi_info tpi_info;
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};
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unsigned long flags;
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unsigned long cr1;
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unsigned long last_break;
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};
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/*
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* Program event recording (PER) register set.
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*/
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struct per_regs {
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unsigned long control; /* PER control bits */
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unsigned long start; /* PER starting address */
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unsigned long end; /* PER ending address */
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};
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/*
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* PER event contains information about the cause of the last PER exception.
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*/
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struct per_event {
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unsigned short cause; /* PER code, ATMID and AI */
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unsigned long address; /* PER address */
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unsigned char paid; /* PER access identification */
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};
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/*
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* Simplified per_info structure used to decode the ptrace user space ABI.
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*/
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struct per_struct_kernel {
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unsigned long cr9; /* PER control bits */
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unsigned long cr10; /* PER starting address */
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unsigned long cr11; /* PER ending address */
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unsigned long bits; /* Obsolete software bits */
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unsigned long starting_addr; /* User specified start address */
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unsigned long ending_addr; /* User specified end address */
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unsigned short perc_atmid; /* PER trap ATMID */
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unsigned long address; /* PER trap instruction address */
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unsigned char access_id; /* PER trap access identification */
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};
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#define PER_EVENT_MASK 0xEB000000UL
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#define PER_EVENT_BRANCH 0x80000000UL
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#define PER_EVENT_IFETCH 0x40000000UL
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#define PER_EVENT_STORE 0x20000000UL
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#define PER_EVENT_STORE_REAL 0x08000000UL
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#define PER_EVENT_TRANSACTION_END 0x02000000UL
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#define PER_EVENT_NULLIFICATION 0x01000000UL
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#define PER_CONTROL_MASK 0x00e00000UL
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#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
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#define PER_CONTROL_SUSPENSION 0x00400000UL
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#define PER_CONTROL_ALTERATION 0x00200000UL
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static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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regs->flags |= (1UL << flag);
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}
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static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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regs->flags &= ~(1UL << flag);
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}
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static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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return !!(regs->flags & (1UL << flag));
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}
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static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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int ret = test_pt_regs_flag(regs, flag);
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clear_pt_regs_flag(regs, flag);
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return ret;
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}
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/*
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* These are defined as per linux/ptrace.h, which see.
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*/
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#define arch_has_single_step() (1)
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#define arch_has_block_step() (1)
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#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
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#define instruction_pointer(regs) ((regs)->psw.addr)
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#define user_stack_pointer(regs)((regs)->gprs[15])
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#define profile_pc(regs) instruction_pointer(regs)
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static inline long regs_return_value(struct pt_regs *regs)
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{
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return regs->gprs[2];
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}
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static inline void instruction_pointer_set(struct pt_regs *regs,
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unsigned long val)
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{
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regs->psw.addr = val;
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}
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int regs_query_register_offset(const char *name);
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const char *regs_query_register_name(unsigned int offset);
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unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
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unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
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/**
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* regs_get_kernel_argument() - get Nth function argument in kernel
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* @regs: pt_regs of that context
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* @n: function argument number (start from 0)
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*
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* regs_get_kernel_argument() returns @n th argument of the function call.
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*/
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static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
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unsigned int n)
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{
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unsigned int argoffset = STACK_FRAME_OVERHEAD / sizeof(long);
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#define NR_REG_ARGUMENTS 5
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if (n < NR_REG_ARGUMENTS)
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return regs_get_register(regs, 2 + n);
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n -= NR_REG_ARGUMENTS;
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return regs_get_kernel_stack_nth(regs, argoffset + n);
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}
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static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
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{
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return regs->gprs[15];
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}
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static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
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{
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regs->gprs[2] = rc;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* _S390_PTRACE_H */
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