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![Thomas Richter](/assets/img/avatar_default.png)
PMU device driver perf_pai_crypto supports Processor Activity Instrumentation (PAI), available with IBM z16: - maps a full page to lowcore address 0x1500. - uses CR0 bit 13 to turn PAI crypto counting on and off. - creates a sample with raw data on each context switch out when at context switch some mapped counters have a value of nonzero. This device driver only supports CPU wide context, no task context is allowed. Support for counting: - one or more counters can be specified using perf stat -e pai_crypto/xxx/ where xxx stands for the counter event name. Multiple invocation of this command is possible. The counter names are listed in /sys/devices/pai_crypto/events directory. - one special counters can be specified using perf stat -e pai_crypto/CRYPTO_ALL/ which returns the sum of all incremented crypto counters. - one event pai_crypto/CRYPTO_ALL/ is reserved for sampling. No multiple invocations are possible. The event collects data at context switch out and saves them in the ring buffer. Add qpaci assembly instruction to query supported memory mapped crypto counters. It returns the number of counters (no holes allowed in that range). The PAI crypto counter events are system wide and can not be executed in parallel. Therefore some restrictions documented in function paicrypt_busy apply. In particular event CRYPTO_ALL for sampling must run exclusive. Only counting events can run in parallel. PAI crypto counter events can not be created when a CPU hot plug add is processed. This means a CPU hot plug add does not get the necessary PAI event to record PAI cryptography counter increments on the newly added CPU. CPU hot plug remove removes the event and terminates the counting of PAI counters immediately. Co-developed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Sven Schnelle <svens@linux.ibm.com> Reviewed-by: Juergen Christ <jchrist@linux.ibm.com> Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Link: https://lore.kernel.org/r/20220504062351.2954280-3-tmricht@linux.ibm.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
526 lines
14 KiB
C
526 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Machine check handler
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*
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* Copyright IBM Corp. 2000, 2009
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* Author(s): Ingo Adlung <adlung@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Cornelia Huck <cornelia.huck@de.ibm.com>,
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*/
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/hardirq.h>
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#include <linux/log2.h>
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#include <linux/kprobes.h>
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#include <linux/kmemleak.h>
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#include <linux/time.h>
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#include <linux/module.h>
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#include <linux/sched/signal.h>
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#include <linux/export.h>
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#include <asm/lowcore.h>
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#include <asm/smp.h>
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#include <asm/stp.h>
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#include <asm/cputime.h>
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#include <asm/nmi.h>
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#include <asm/crw.h>
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#include <asm/switch_to.h>
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#include <asm/ctl_reg.h>
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#include <asm/asm-offsets.h>
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#include <asm/pai.h>
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#include <linux/kvm_host.h>
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struct mcck_struct {
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unsigned int kill_task : 1;
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unsigned int channel_report : 1;
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unsigned int warning : 1;
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unsigned int stp_queue : 1;
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unsigned long mcck_code;
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};
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static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
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static struct kmem_cache *mcesa_cache;
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static unsigned long mcesa_origin_lc;
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static inline int nmi_needs_mcesa(void)
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{
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return MACHINE_HAS_VX || MACHINE_HAS_GS;
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}
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static inline unsigned long nmi_get_mcesa_size(void)
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{
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if (MACHINE_HAS_GS)
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return MCESA_MAX_SIZE;
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return MCESA_MIN_SIZE;
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}
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/*
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* The initial machine check extended save area for the boot CPU.
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* It will be replaced on the boot CPU reinit with an allocated
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* structure. The structure is required for machine check happening
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* early in the boot process.
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*/
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static struct mcesa boot_mcesa __initdata __aligned(MCESA_MAX_SIZE);
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void __init nmi_alloc_mcesa_early(u64 *mcesad)
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{
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if (!nmi_needs_mcesa())
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return;
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*mcesad = __pa(&boot_mcesa);
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if (MACHINE_HAS_GS)
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*mcesad |= ilog2(MCESA_MAX_SIZE);
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}
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static void __init nmi_alloc_cache(void)
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{
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unsigned long size;
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if (!nmi_needs_mcesa())
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return;
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size = nmi_get_mcesa_size();
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if (size > MCESA_MIN_SIZE)
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mcesa_origin_lc = ilog2(size);
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/* create slab cache for the machine-check-extended-save-areas */
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mcesa_cache = kmem_cache_create("nmi_save_areas", size, size, 0, NULL);
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if (!mcesa_cache)
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panic("Couldn't create nmi save area cache");
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}
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int __ref nmi_alloc_mcesa(u64 *mcesad)
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{
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unsigned long origin;
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*mcesad = 0;
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if (!nmi_needs_mcesa())
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return 0;
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if (!mcesa_cache)
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nmi_alloc_cache();
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origin = (unsigned long) kmem_cache_alloc(mcesa_cache, GFP_KERNEL);
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if (!origin)
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return -ENOMEM;
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/* The pointer is stored with mcesa_bits ORed in */
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kmemleak_not_leak((void *) origin);
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*mcesad = __pa(origin) | mcesa_origin_lc;
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return 0;
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}
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void nmi_free_mcesa(u64 *mcesad)
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{
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if (!nmi_needs_mcesa())
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return;
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kmem_cache_free(mcesa_cache, __va(*mcesad & MCESA_ORIGIN_MASK));
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}
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static notrace void s390_handle_damage(void)
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{
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smp_emergency_stop();
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disabled_wait();
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while (1);
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}
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NOKPROBE_SYMBOL(s390_handle_damage);
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/*
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* Main machine check handler function. Will be called with interrupts disabled
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* and machine checks enabled.
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*/
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void __s390_handle_mcck(void)
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{
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struct mcck_struct mcck;
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/*
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* Disable machine checks and get the current state of accumulated
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* machine checks. Afterwards delete the old state and enable machine
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* checks again.
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*/
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local_mcck_disable();
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mcck = *this_cpu_ptr(&cpu_mcck);
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memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
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local_mcck_enable();
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if (mcck.channel_report)
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crw_handle_channel_report();
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/*
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* A warning may remain for a prolonged period on the bare iron.
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* (actually until the machine is powered off, or the problem is gone)
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* So we just stop listening for the WARNING MCH and avoid continuously
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* being interrupted. One caveat is however, that we must do this per
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* processor and cannot use the smp version of ctl_clear_bit().
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* On VM we only get one interrupt per virtally presented machinecheck.
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* Though one suffices, we may get one interrupt per (virtual) cpu.
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*/
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if (mcck.warning) { /* WARNING pending ? */
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static int mchchk_wng_posted = 0;
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/* Use single cpu clear, as we cannot handle smp here. */
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__ctl_clear_bit(14, 24); /* Disable WARNING MCH */
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if (xchg(&mchchk_wng_posted, 1) == 0)
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kill_cad_pid(SIGPWR, 1);
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}
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if (mcck.stp_queue)
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stp_queue_work();
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if (mcck.kill_task) {
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local_irq_enable();
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printk(KERN_EMERG "mcck: Terminating task because of machine "
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"malfunction (code 0x%016lx).\n", mcck.mcck_code);
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printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
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current->comm, current->pid);
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make_task_dead(SIGSEGV);
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}
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}
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void noinstr s390_handle_mcck(struct pt_regs *regs)
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{
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trace_hardirqs_off();
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pai_kernel_enter(regs);
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__s390_handle_mcck();
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pai_kernel_exit(regs);
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trace_hardirqs_on();
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}
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/*
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* returns 0 if all required registers are available
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* returns 1 otherwise
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*/
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static int notrace s390_validate_registers(union mci mci, int umode)
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{
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struct mcesa *mcesa;
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void *fpt_save_area;
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union ctlreg2 cr2;
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int kill_task;
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u64 zero;
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kill_task = 0;
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zero = 0;
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if (!mci.gr) {
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/*
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* General purpose registers couldn't be restored and have
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* unknown contents. Stop system or terminate process.
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*/
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if (!umode)
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s390_handle_damage();
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kill_task = 1;
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}
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if (!mci.fp) {
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/*
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* Floating point registers can't be restored. If the
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* kernel currently uses floating point registers the
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* system is stopped. If the process has its floating
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* pointer registers loaded it is terminated.
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*/
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if (S390_lowcore.fpu_flags & KERNEL_VXR_V0V7)
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s390_handle_damage();
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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}
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fpt_save_area = &S390_lowcore.floating_pt_save_area;
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if (!mci.fc) {
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/*
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* Floating point control register can't be restored.
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* If the kernel currently uses the floating pointer
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* registers and needs the FPC register the system is
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* stopped. If the process has its floating pointer
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* registers loaded it is terminated. Otherwise the
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* FPC is just validated.
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*/
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if (S390_lowcore.fpu_flags & KERNEL_FPC)
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s390_handle_damage();
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (zero));
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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} else {
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (S390_lowcore.fpt_creg_save_area));
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}
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mcesa = __va(S390_lowcore.mcesad & MCESA_ORIGIN_MASK);
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if (!MACHINE_HAS_VX) {
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/* Validate floating point registers */
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 1,8(%0)\n"
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" ld 2,16(%0)\n"
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" ld 3,24(%0)\n"
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" ld 4,32(%0)\n"
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" ld 5,40(%0)\n"
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" ld 6,48(%0)\n"
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" ld 7,56(%0)\n"
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" ld 8,64(%0)\n"
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" ld 9,72(%0)\n"
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" ld 10,80(%0)\n"
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" ld 11,88(%0)\n"
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" ld 12,96(%0)\n"
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" ld 13,104(%0)\n"
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" ld 14,112(%0)\n"
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" ld 15,120(%0)\n"
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:
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: "a" (fpt_save_area)
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: "memory");
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} else {
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/* Validate vector registers */
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union ctlreg0 cr0;
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/*
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* The vector validity must only be checked if not running a
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* KVM guest. For KVM guests the machine check is forwarded by
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* KVM and it is the responsibility of the guest to take
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* appropriate actions. The host vector or FPU values have been
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* saved by KVM and will be restored by KVM.
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*/
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if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST)) {
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/*
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* Vector registers can't be restored. If the kernel
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* currently uses vector registers the system is
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* stopped. If the process has its vector registers
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* loaded it is terminated. Otherwise just validate
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* the registers.
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*/
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if (S390_lowcore.fpu_flags & KERNEL_VXR)
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s390_handle_damage();
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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}
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cr0.val = S390_lowcore.cregs_save_area[0];
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cr0.afp = cr0.vx = 1;
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__ctl_load(cr0.val, 0, 0);
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asm volatile(
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" la 1,%0\n"
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" .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
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" .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
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:
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: "Q" (*(struct vx_array *)mcesa->vector_save_area)
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: "1");
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__ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
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}
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/* Validate access registers */
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asm volatile(
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" lam 0,15,0(%0)\n"
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:
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: "a" (&S390_lowcore.access_regs_save_area)
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: "memory");
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if (!mci.ar) {
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/*
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* Access registers have unknown contents.
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* Terminating task.
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*/
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kill_task = 1;
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}
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/* Validate guarded storage registers */
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cr2.val = S390_lowcore.cregs_save_area[2];
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if (cr2.gse) {
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if (!mci.gs) {
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/*
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* 2 cases:
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* - machine check in kernel or userspace
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* - machine check while running SIE (KVM guest)
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* For kernel or userspace the userspace values of
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* guarded storage control can not be recreated, the
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* process must be terminated.
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* For SIE the guest values of guarded storage can not
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* be recreated. This is either due to a bug or due to
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* GS being disabled in the guest. The guest will be
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* notified by KVM code and the guests machine check
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* handling must take care of this. The host values
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* are saved by KVM and are not affected.
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*/
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if (!test_cpu_flag(CIF_MCCK_GUEST))
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kill_task = 1;
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} else {
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load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
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}
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}
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/*
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* The getcpu vdso syscall reads CPU number from the programmable
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* field of the TOD clock. Disregard the TOD programmable register
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* validity bit and load the CPU number into the TOD programmable
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* field unconditionally.
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*/
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set_tod_programmable_field(raw_smp_processor_id());
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/* Validate clock comparator register */
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set_clock_comparator(S390_lowcore.clock_comparator);
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if (!mci.ms || !mci.pm || !mci.ia)
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kill_task = 1;
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return kill_task;
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}
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NOKPROBE_SYMBOL(s390_validate_registers);
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/*
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* Backup the guest's machine check info to its description block
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*/
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static void notrace s390_backup_mcck_info(struct pt_regs *regs)
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{
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struct mcck_volatile_info *mcck_backup;
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struct sie_page *sie_page;
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/* r14 contains the sie block, which was set in sie64a */
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struct kvm_s390_sie_block *sie_block =
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(struct kvm_s390_sie_block *) regs->gprs[14];
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if (sie_block == NULL)
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/* Something's seriously wrong, stop system. */
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s390_handle_damage();
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sie_page = container_of(sie_block, struct sie_page, sie_block);
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mcck_backup = &sie_page->mcck_info;
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mcck_backup->mcic = S390_lowcore.mcck_interruption_code &
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~(MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE);
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mcck_backup->ext_damage_code = S390_lowcore.external_damage_code;
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mcck_backup->failing_storage_address
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= S390_lowcore.failing_storage_address;
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}
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NOKPROBE_SYMBOL(s390_backup_mcck_info);
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#define MAX_IPD_COUNT 29
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#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
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#define ED_STP_ISLAND 6 /* External damage STP island check */
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#define ED_STP_SYNC 7 /* External damage STP sync check */
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#define MCCK_CODE_NO_GUEST (MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE)
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/*
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* machine check handler.
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*/
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int notrace s390_do_machine_check(struct pt_regs *regs)
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{
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static int ipd_count;
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static DEFINE_SPINLOCK(ipd_lock);
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static unsigned long long last_ipd;
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struct mcck_struct *mcck;
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unsigned long long tmp;
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union mci mci;
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unsigned long mcck_dam_code;
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int mcck_pending = 0;
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nmi_enter();
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if (user_mode(regs))
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update_timer_mcck();
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inc_irq_stat(NMI_NMI);
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mci.val = S390_lowcore.mcck_interruption_code;
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mcck = this_cpu_ptr(&cpu_mcck);
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/*
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* Reinject the instruction processing damages' machine checks
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* including Delayed Access Exception into the guest
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* instead of damaging the host if they happen in the guest.
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*/
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if (mci.pd && !test_cpu_flag(CIF_MCCK_GUEST)) {
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if (mci.b) {
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/* Processing backup -> verify if we can survive this */
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u64 z_mcic, o_mcic, t_mcic;
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z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
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o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
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1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
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1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
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1ULL<<16);
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t_mcic = mci.val;
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if (((t_mcic & z_mcic) != 0) ||
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((t_mcic & o_mcic) != o_mcic)) {
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s390_handle_damage();
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}
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/*
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* Nullifying exigent condition, therefore we might
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* retry this instruction.
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*/
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spin_lock(&ipd_lock);
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tmp = get_tod_clock();
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if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
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ipd_count++;
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else
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ipd_count = 1;
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last_ipd = tmp;
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if (ipd_count == MAX_IPD_COUNT)
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s390_handle_damage();
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spin_unlock(&ipd_lock);
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} else {
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/* Processing damage -> stopping machine */
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s390_handle_damage();
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}
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}
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if (s390_validate_registers(mci, user_mode(regs))) {
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/*
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* Couldn't restore all register contents for the
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* user space process -> mark task for termination.
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|
*/
|
|
mcck->kill_task = 1;
|
|
mcck->mcck_code = mci.val;
|
|
mcck_pending = 1;
|
|
}
|
|
|
|
/*
|
|
* Backup the machine check's info if it happens when the guest
|
|
* is running.
|
|
*/
|
|
if (test_cpu_flag(CIF_MCCK_GUEST))
|
|
s390_backup_mcck_info(regs);
|
|
|
|
if (mci.cd) {
|
|
/* Timing facility damage */
|
|
s390_handle_damage();
|
|
}
|
|
if (mci.ed && mci.ec) {
|
|
/* External damage */
|
|
if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
|
|
mcck->stp_queue |= stp_sync_check();
|
|
if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
|
|
mcck->stp_queue |= stp_island_check();
|
|
mcck_pending = 1;
|
|
}
|
|
|
|
if (mci.cp) {
|
|
/* Channel report word pending */
|
|
mcck->channel_report = 1;
|
|
mcck_pending = 1;
|
|
}
|
|
if (mci.w) {
|
|
/* Warning pending */
|
|
mcck->warning = 1;
|
|
mcck_pending = 1;
|
|
}
|
|
|
|
/*
|
|
* If there are only Channel Report Pending and External Damage
|
|
* machine checks, they will not be reinjected into the guest
|
|
* because they refer to host conditions only.
|
|
*/
|
|
mcck_dam_code = (mci.val & MCIC_SUBCLASS_MASK);
|
|
if (test_cpu_flag(CIF_MCCK_GUEST) &&
|
|
(mcck_dam_code & MCCK_CODE_NO_GUEST) != mcck_dam_code) {
|
|
/* Set exit reason code for host's later handling */
|
|
*((long *)(regs->gprs[15] + __SF_SIE_REASON)) = -EINTR;
|
|
}
|
|
clear_cpu_flag(CIF_MCCK_GUEST);
|
|
|
|
if (user_mode(regs) && mcck_pending) {
|
|
nmi_exit();
|
|
return 1;
|
|
}
|
|
|
|
if (mcck_pending)
|
|
schedule_mcck_handler();
|
|
|
|
nmi_exit();
|
|
return 0;
|
|
}
|
|
NOKPROBE_SYMBOL(s390_do_machine_check);
|
|
|
|
static int __init machine_check_init(void)
|
|
{
|
|
ctl_set_bit(14, 25); /* enable external damage MCH */
|
|
ctl_set_bit(14, 27); /* enable system recovery MCH */
|
|
ctl_set_bit(14, 24); /* enable warning MCH */
|
|
return 0;
|
|
}
|
|
early_initcall(machine_check_init);
|