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![Sean Christopherson](/assets/img/avatar_default.png)
Add a helper to generate the mask of reserved GPA bits _without_ any adjustments for repurposed bits, and use it to replace a variety of open coded variants in the MTRR and APIC_BASE flows. No functional change intended. Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210204000117.3303214-11-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
721 lines
16 KiB
C
721 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* vMTRR implementation
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*
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* Copyright (C) 2006 Qumranet, Inc.
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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* Copyright(C) 2015 Intel Corporation.
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*
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* Authors:
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* Yaniv Kamay <yaniv@qumranet.com>
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* Avi Kivity <avi@qumranet.com>
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* Marcelo Tosatti <mtosatti@redhat.com>
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* Paolo Bonzini <pbonzini@redhat.com>
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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*/
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#include <linux/kvm_host.h>
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#include <asm/mtrr.h>
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#include "cpuid.h"
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#include "mmu.h"
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#define IA32_MTRR_DEF_TYPE_E (1ULL << 11)
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#define IA32_MTRR_DEF_TYPE_FE (1ULL << 10)
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#define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff)
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static bool msr_mtrr_valid(unsigned msr)
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{
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switch (msr) {
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case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
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case MSR_MTRRfix64K_00000:
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case MSR_MTRRfix16K_80000:
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case MSR_MTRRfix16K_A0000:
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case MSR_MTRRfix4K_C0000:
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case MSR_MTRRfix4K_C8000:
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case MSR_MTRRfix4K_D0000:
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case MSR_MTRRfix4K_D8000:
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case MSR_MTRRfix4K_E0000:
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case MSR_MTRRfix4K_E8000:
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case MSR_MTRRfix4K_F0000:
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case MSR_MTRRfix4K_F8000:
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case MSR_MTRRdefType:
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case MSR_IA32_CR_PAT:
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return true;
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}
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return false;
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}
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static bool valid_mtrr_type(unsigned t)
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{
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return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
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}
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bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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int i;
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u64 mask;
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if (!msr_mtrr_valid(msr))
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return false;
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if (msr == MSR_IA32_CR_PAT) {
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return kvm_pat_valid(data);
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} else if (msr == MSR_MTRRdefType) {
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if (data & ~0xcff)
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return false;
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return valid_mtrr_type(data & 0xff);
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} else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
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for (i = 0; i < 8 ; i++)
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if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
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return false;
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return true;
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}
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/* variable MTRRs */
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WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
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mask = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
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if ((msr & 1) == 0) {
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/* MTRR base */
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if (!valid_mtrr_type(data & 0xff))
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return false;
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mask |= 0xf00;
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} else
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/* MTRR mask */
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mask |= 0x7ff;
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return (data & mask) == 0;
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}
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EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
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static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
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{
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return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E);
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}
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static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
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{
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return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE);
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}
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static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
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{
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return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
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}
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static u8 mtrr_disabled_type(struct kvm_vcpu *vcpu)
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{
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/*
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* Intel SDM 11.11.2.2: all MTRRs are disabled when
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* IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
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* memory type is applied to all of physical memory.
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*
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* However, virtual machines can be run with CPUID such that
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* there are no MTRRs. In that case, the firmware will never
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* enable MTRRs and it is obviously undesirable to run the
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* guest entirely with UC memory and we use WB.
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*/
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if (guest_cpuid_has(vcpu, X86_FEATURE_MTRR))
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return MTRR_TYPE_UNCACHABLE;
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else
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return MTRR_TYPE_WRBACK;
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}
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/*
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* Three terms are used in the following code:
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* - segment, it indicates the address segments covered by fixed MTRRs.
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* - unit, it corresponds to the MSR entry in the segment.
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* - range, a range is covered in one memory cache type.
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*/
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struct fixed_mtrr_segment {
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u64 start;
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u64 end;
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int range_shift;
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/* the start position in kvm_mtrr.fixed_ranges[]. */
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int range_start;
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};
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static struct fixed_mtrr_segment fixed_seg_table[] = {
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/* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */
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{
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.start = 0x0,
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.end = 0x80000,
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.range_shift = 16, /* 64K */
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.range_start = 0,
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},
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/*
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* MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units,
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* 16K fixed mtrr.
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*/
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{
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.start = 0x80000,
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.end = 0xc0000,
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.range_shift = 14, /* 16K */
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.range_start = 8,
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},
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/*
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* MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units,
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* 4K fixed mtrr.
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*/
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{
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.start = 0xc0000,
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.end = 0x100000,
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.range_shift = 12, /* 12K */
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.range_start = 24,
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}
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};
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/*
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* The size of unit is covered in one MSR, one MSR entry contains
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* 8 ranges so that unit size is always 8 * 2^range_shift.
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*/
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static u64 fixed_mtrr_seg_unit_size(int seg)
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{
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return 8 << fixed_seg_table[seg].range_shift;
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}
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static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit)
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{
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switch (msr) {
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case MSR_MTRRfix64K_00000:
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*seg = 0;
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*unit = 0;
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break;
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case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000:
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*seg = 1;
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*unit = array_index_nospec(
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msr - MSR_MTRRfix16K_80000,
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MSR_MTRRfix16K_A0000 - MSR_MTRRfix16K_80000 + 1);
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break;
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case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
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*seg = 2;
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*unit = array_index_nospec(
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msr - MSR_MTRRfix4K_C0000,
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MSR_MTRRfix4K_F8000 - MSR_MTRRfix4K_C0000 + 1);
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break;
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default:
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return false;
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}
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return true;
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}
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static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end)
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{
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struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
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u64 unit_size = fixed_mtrr_seg_unit_size(seg);
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*start = mtrr_seg->start + unit * unit_size;
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*end = *start + unit_size;
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WARN_ON(*end > mtrr_seg->end);
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}
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static int fixed_mtrr_seg_unit_range_index(int seg, int unit)
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{
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struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
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WARN_ON(mtrr_seg->start + unit * fixed_mtrr_seg_unit_size(seg)
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> mtrr_seg->end);
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/* each unit has 8 ranges. */
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return mtrr_seg->range_start + 8 * unit;
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}
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static int fixed_mtrr_seg_end_range_index(int seg)
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{
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struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
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int n;
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n = (mtrr_seg->end - mtrr_seg->start) >> mtrr_seg->range_shift;
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return mtrr_seg->range_start + n - 1;
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}
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static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end)
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{
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int seg, unit;
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if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
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return false;
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fixed_mtrr_seg_unit_range(seg, unit, start, end);
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return true;
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}
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static int fixed_msr_to_range_index(u32 msr)
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{
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int seg, unit;
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if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
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return -1;
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return fixed_mtrr_seg_unit_range_index(seg, unit);
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}
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static int fixed_mtrr_addr_to_seg(u64 addr)
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{
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struct fixed_mtrr_segment *mtrr_seg;
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int seg, seg_num = ARRAY_SIZE(fixed_seg_table);
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for (seg = 0; seg < seg_num; seg++) {
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mtrr_seg = &fixed_seg_table[seg];
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if (mtrr_seg->start <= addr && addr < mtrr_seg->end)
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return seg;
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}
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return -1;
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}
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static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg)
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{
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struct fixed_mtrr_segment *mtrr_seg;
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int index;
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mtrr_seg = &fixed_seg_table[seg];
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index = mtrr_seg->range_start;
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index += (addr - mtrr_seg->start) >> mtrr_seg->range_shift;
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return index;
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}
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static u64 fixed_mtrr_range_end_addr(int seg, int index)
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{
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struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
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int pos = index - mtrr_seg->range_start;
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return mtrr_seg->start + ((pos + 1) << mtrr_seg->range_shift);
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}
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static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)
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{
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u64 mask;
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*start = range->base & PAGE_MASK;
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mask = range->mask & PAGE_MASK;
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/* This cannot overflow because writing to the reserved bits of
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* variable MTRRs causes a #GP.
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*/
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*end = (*start | ~mask) + 1;
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}
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static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
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{
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struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
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gfn_t start, end;
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int index;
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if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
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!kvm_arch_has_noncoherent_dma(vcpu->kvm))
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return;
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if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType)
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return;
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/* fixed MTRRs. */
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if (fixed_msr_to_range(msr, &start, &end)) {
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if (!fixed_mtrr_is_enabled(mtrr_state))
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return;
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} else if (msr == MSR_MTRRdefType) {
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start = 0x0;
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end = ~0ULL;
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} else {
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/* variable range MTRRs. */
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index = (msr - 0x200) / 2;
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var_mtrr_range(&mtrr_state->var_ranges[index], &start, &end);
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}
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kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
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}
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static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range)
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{
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return (range->mask & (1 << 11)) != 0;
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}
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static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
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struct kvm_mtrr_range *tmp, *cur;
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int index, is_mtrr_mask;
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index = (msr - 0x200) / 2;
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is_mtrr_mask = msr - 0x200 - 2 * index;
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cur = &mtrr_state->var_ranges[index];
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/* remove the entry if it's in the list. */
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if (var_mtrr_range_is_valid(cur))
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list_del(&mtrr_state->var_ranges[index].node);
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/*
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* Set all illegal GPA bits in the mask, since those bits must
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* implicitly be 0. The bits are then cleared when reading them.
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*/
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if (!is_mtrr_mask)
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cur->base = data;
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else
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cur->mask = data | kvm_vcpu_reserved_gpa_bits_raw(vcpu);
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/* add it to the list if it's enabled. */
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if (var_mtrr_range_is_valid(cur)) {
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list_for_each_entry(tmp, &mtrr_state->head, node)
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if (cur->base >= tmp->base)
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break;
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list_add_tail(&cur->node, &tmp->node);
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}
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}
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int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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int index;
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if (!kvm_mtrr_valid(vcpu, msr, data))
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return 1;
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index = fixed_msr_to_range_index(msr);
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if (index >= 0)
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*(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index] = data;
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else if (msr == MSR_MTRRdefType)
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vcpu->arch.mtrr_state.deftype = data;
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else if (msr == MSR_IA32_CR_PAT)
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vcpu->arch.pat = data;
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else
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set_var_mtrr_msr(vcpu, msr, data);
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update_mtrr(vcpu, msr);
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return 0;
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}
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int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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{
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int index;
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/* MSR_MTRRcap is a readonly MSR. */
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if (msr == MSR_MTRRcap) {
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/*
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* SMRR = 0
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* WC = 1
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* FIX = 1
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* VCNT = KVM_NR_VAR_MTRR
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*/
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*pdata = 0x500 | KVM_NR_VAR_MTRR;
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return 0;
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}
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if (!msr_mtrr_valid(msr))
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return 1;
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index = fixed_msr_to_range_index(msr);
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if (index >= 0)
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*pdata = *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index];
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else if (msr == MSR_MTRRdefType)
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*pdata = vcpu->arch.mtrr_state.deftype;
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else if (msr == MSR_IA32_CR_PAT)
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*pdata = vcpu->arch.pat;
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else { /* Variable MTRRs */
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int is_mtrr_mask;
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index = (msr - 0x200) / 2;
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is_mtrr_mask = msr - 0x200 - 2 * index;
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if (!is_mtrr_mask)
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*pdata = vcpu->arch.mtrr_state.var_ranges[index].base;
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else
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*pdata = vcpu->arch.mtrr_state.var_ranges[index].mask;
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*pdata &= ~kvm_vcpu_reserved_gpa_bits_raw(vcpu);
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}
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return 0;
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}
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void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu)
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{
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INIT_LIST_HEAD(&vcpu->arch.mtrr_state.head);
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}
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struct mtrr_iter {
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/* input fields. */
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struct kvm_mtrr *mtrr_state;
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u64 start;
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u64 end;
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/* output fields. */
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int mem_type;
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/* mtrr is completely disabled? */
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bool mtrr_disabled;
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/* [start, end) is not fully covered in MTRRs? */
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bool partial_map;
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/* private fields. */
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union {
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/* used for fixed MTRRs. */
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struct {
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int index;
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int seg;
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};
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/* used for var MTRRs. */
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struct {
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struct kvm_mtrr_range *range;
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/* max address has been covered in var MTRRs. */
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u64 start_max;
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};
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};
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bool fixed;
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};
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static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter)
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{
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int seg, index;
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if (!fixed_mtrr_is_enabled(iter->mtrr_state))
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return false;
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seg = fixed_mtrr_addr_to_seg(iter->start);
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if (seg < 0)
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return false;
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iter->fixed = true;
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index = fixed_mtrr_addr_seg_to_range_index(iter->start, seg);
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iter->index = index;
|
|
iter->seg = seg;
|
|
return true;
|
|
}
|
|
|
|
static bool match_var_range(struct mtrr_iter *iter,
|
|
struct kvm_mtrr_range *range)
|
|
{
|
|
u64 start, end;
|
|
|
|
var_mtrr_range(range, &start, &end);
|
|
if (!(start >= iter->end || end <= iter->start)) {
|
|
iter->range = range;
|
|
|
|
/*
|
|
* the function is called when we do kvm_mtrr.head walking.
|
|
* Range has the minimum base address which interleaves
|
|
* [looker->start_max, looker->end).
|
|
*/
|
|
iter->partial_map |= iter->start_max < start;
|
|
|
|
/* update the max address has been covered. */
|
|
iter->start_max = max(iter->start_max, end);
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static void __mtrr_lookup_var_next(struct mtrr_iter *iter)
|
|
{
|
|
struct kvm_mtrr *mtrr_state = iter->mtrr_state;
|
|
|
|
list_for_each_entry_continue(iter->range, &mtrr_state->head, node)
|
|
if (match_var_range(iter, iter->range))
|
|
return;
|
|
|
|
iter->range = NULL;
|
|
iter->partial_map |= iter->start_max < iter->end;
|
|
}
|
|
|
|
static void mtrr_lookup_var_start(struct mtrr_iter *iter)
|
|
{
|
|
struct kvm_mtrr *mtrr_state = iter->mtrr_state;
|
|
|
|
iter->fixed = false;
|
|
iter->start_max = iter->start;
|
|
iter->range = NULL;
|
|
iter->range = list_prepare_entry(iter->range, &mtrr_state->head, node);
|
|
|
|
__mtrr_lookup_var_next(iter);
|
|
}
|
|
|
|
static void mtrr_lookup_fixed_next(struct mtrr_iter *iter)
|
|
{
|
|
/* terminate the lookup. */
|
|
if (fixed_mtrr_range_end_addr(iter->seg, iter->index) >= iter->end) {
|
|
iter->fixed = false;
|
|
iter->range = NULL;
|
|
return;
|
|
}
|
|
|
|
iter->index++;
|
|
|
|
/* have looked up for all fixed MTRRs. */
|
|
if (iter->index >= ARRAY_SIZE(iter->mtrr_state->fixed_ranges))
|
|
return mtrr_lookup_var_start(iter);
|
|
|
|
/* switch to next segment. */
|
|
if (iter->index > fixed_mtrr_seg_end_range_index(iter->seg))
|
|
iter->seg++;
|
|
}
|
|
|
|
static void mtrr_lookup_var_next(struct mtrr_iter *iter)
|
|
{
|
|
__mtrr_lookup_var_next(iter);
|
|
}
|
|
|
|
static void mtrr_lookup_start(struct mtrr_iter *iter)
|
|
{
|
|
if (!mtrr_is_enabled(iter->mtrr_state)) {
|
|
iter->mtrr_disabled = true;
|
|
return;
|
|
}
|
|
|
|
if (!mtrr_lookup_fixed_start(iter))
|
|
mtrr_lookup_var_start(iter);
|
|
}
|
|
|
|
static void mtrr_lookup_init(struct mtrr_iter *iter,
|
|
struct kvm_mtrr *mtrr_state, u64 start, u64 end)
|
|
{
|
|
iter->mtrr_state = mtrr_state;
|
|
iter->start = start;
|
|
iter->end = end;
|
|
iter->mtrr_disabled = false;
|
|
iter->partial_map = false;
|
|
iter->fixed = false;
|
|
iter->range = NULL;
|
|
|
|
mtrr_lookup_start(iter);
|
|
}
|
|
|
|
static bool mtrr_lookup_okay(struct mtrr_iter *iter)
|
|
{
|
|
if (iter->fixed) {
|
|
iter->mem_type = iter->mtrr_state->fixed_ranges[iter->index];
|
|
return true;
|
|
}
|
|
|
|
if (iter->range) {
|
|
iter->mem_type = iter->range->base & 0xff;
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static void mtrr_lookup_next(struct mtrr_iter *iter)
|
|
{
|
|
if (iter->fixed)
|
|
mtrr_lookup_fixed_next(iter);
|
|
else
|
|
mtrr_lookup_var_next(iter);
|
|
}
|
|
|
|
#define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \
|
|
for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \
|
|
mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_))
|
|
|
|
u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
|
|
{
|
|
struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
|
|
struct mtrr_iter iter;
|
|
u64 start, end;
|
|
int type = -1;
|
|
const int wt_wb_mask = (1 << MTRR_TYPE_WRBACK)
|
|
| (1 << MTRR_TYPE_WRTHROUGH);
|
|
|
|
start = gfn_to_gpa(gfn);
|
|
end = start + PAGE_SIZE;
|
|
|
|
mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
|
|
int curr_type = iter.mem_type;
|
|
|
|
/*
|
|
* Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR
|
|
* Precedences.
|
|
*/
|
|
|
|
if (type == -1) {
|
|
type = curr_type;
|
|
continue;
|
|
}
|
|
|
|
/*
|
|
* If two or more variable memory ranges match and the
|
|
* memory types are identical, then that memory type is
|
|
* used.
|
|
*/
|
|
if (type == curr_type)
|
|
continue;
|
|
|
|
/*
|
|
* If two or more variable memory ranges match and one of
|
|
* the memory types is UC, the UC memory type used.
|
|
*/
|
|
if (curr_type == MTRR_TYPE_UNCACHABLE)
|
|
return MTRR_TYPE_UNCACHABLE;
|
|
|
|
/*
|
|
* If two or more variable memory ranges match and the
|
|
* memory types are WT and WB, the WT memory type is used.
|
|
*/
|
|
if (((1 << type) & wt_wb_mask) &&
|
|
((1 << curr_type) & wt_wb_mask)) {
|
|
type = MTRR_TYPE_WRTHROUGH;
|
|
continue;
|
|
}
|
|
|
|
/*
|
|
* For overlaps not defined by the above rules, processor
|
|
* behavior is undefined.
|
|
*/
|
|
|
|
/* We use WB for this undefined behavior. :( */
|
|
return MTRR_TYPE_WRBACK;
|
|
}
|
|
|
|
if (iter.mtrr_disabled)
|
|
return mtrr_disabled_type(vcpu);
|
|
|
|
/* not contained in any MTRRs. */
|
|
if (type == -1)
|
|
return mtrr_default_type(mtrr_state);
|
|
|
|
/*
|
|
* We just check one page, partially covered by MTRRs is
|
|
* impossible.
|
|
*/
|
|
WARN_ON(iter.partial_map);
|
|
|
|
return type;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
|
|
|
|
bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
|
|
int page_num)
|
|
{
|
|
struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
|
|
struct mtrr_iter iter;
|
|
u64 start, end;
|
|
int type = -1;
|
|
|
|
start = gfn_to_gpa(gfn);
|
|
end = gfn_to_gpa(gfn + page_num);
|
|
mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
|
|
if (type == -1) {
|
|
type = iter.mem_type;
|
|
continue;
|
|
}
|
|
|
|
if (type != iter.mem_type)
|
|
return false;
|
|
}
|
|
|
|
if (iter.mtrr_disabled)
|
|
return true;
|
|
|
|
if (!iter.partial_map)
|
|
return true;
|
|
|
|
if (type == -1)
|
|
return true;
|
|
|
|
return type == mtrr_default_type(mtrr_state);
|
|
}
|