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![Kees Cook](/assets/img/avatar_default.png)
In preparation for Clang supporting randstruct, reorganize the Kconfigs, move the attribute macros, and generalize the feature to be named CONFIG_RANDSTRUCT for on/off, CONFIG_RANDSTRUCT_FULL for the full randomization mode, and CONFIG_RANDSTRUCT_PERFORMANCE for the cache-line sized mode. Cc: linux-hardening@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20220503205503.3054173-4-keescook@chromium.org
666 lines
17 KiB
C
666 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright(c) 2017 Intel Corporation. All rights reserved.
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*
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* This code is based in part on work published here:
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*
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* https://github.com/IAIK/KAISER
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*
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* The original work was written by and and signed off by for the Linux
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* kernel by:
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*
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* Signed-off-by: Richard Fellner <richard.fellner@student.tugraz.at>
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* Signed-off-by: Moritz Lipp <moritz.lipp@iaik.tugraz.at>
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* Signed-off-by: Daniel Gruss <daniel.gruss@iaik.tugraz.at>
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* Signed-off-by: Michael Schwarz <michael.schwarz@iaik.tugraz.at>
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*
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* Major changes to the original code by: Dave Hansen <dave.hansen@intel.com>
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* Mostly rewritten by Thomas Gleixner <tglx@linutronix.de> and
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* Andy Lutomirsky <luto@amacapital.net>
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/bug.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/uaccess.h>
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#include <linux/cpu.h>
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#include <asm/cpufeature.h>
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#include <asm/hypervisor.h>
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#include <asm/vsyscall.h>
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#include <asm/cmdline.h>
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#include <asm/pti.h>
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#include <asm/tlbflush.h>
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#include <asm/desc.h>
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#include <asm/sections.h>
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#include <asm/set_memory.h>
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#undef pr_fmt
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#define pr_fmt(fmt) "Kernel/User page tables isolation: " fmt
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/* Backporting helper */
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#ifndef __GFP_NOTRACK
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#define __GFP_NOTRACK 0
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#endif
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/*
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* Define the page-table levels we clone for user-space on 32
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* and 64 bit.
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*/
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#ifdef CONFIG_X86_64
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#define PTI_LEVEL_KERNEL_IMAGE PTI_CLONE_PMD
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#else
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#define PTI_LEVEL_KERNEL_IMAGE PTI_CLONE_PTE
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#endif
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static void __init pti_print_if_insecure(const char *reason)
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{
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if (boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
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pr_info("%s\n", reason);
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}
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static void __init pti_print_if_secure(const char *reason)
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{
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if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
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pr_info("%s\n", reason);
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}
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static enum pti_mode {
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PTI_AUTO = 0,
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PTI_FORCE_OFF,
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PTI_FORCE_ON
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} pti_mode;
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void __init pti_check_boottime_disable(void)
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{
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char arg[5];
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int ret;
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/* Assume mode is auto unless overridden. */
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pti_mode = PTI_AUTO;
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if (hypervisor_is_type(X86_HYPER_XEN_PV)) {
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pti_mode = PTI_FORCE_OFF;
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pti_print_if_insecure("disabled on XEN PV.");
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return;
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}
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ret = cmdline_find_option(boot_command_line, "pti", arg, sizeof(arg));
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if (ret > 0) {
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if (ret == 3 && !strncmp(arg, "off", 3)) {
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pti_mode = PTI_FORCE_OFF;
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pti_print_if_insecure("disabled on command line.");
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return;
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}
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if (ret == 2 && !strncmp(arg, "on", 2)) {
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pti_mode = PTI_FORCE_ON;
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pti_print_if_secure("force enabled on command line.");
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goto enable;
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}
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if (ret == 4 && !strncmp(arg, "auto", 4)) {
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pti_mode = PTI_AUTO;
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goto autosel;
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}
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}
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if (cmdline_find_option_bool(boot_command_line, "nopti") ||
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cpu_mitigations_off()) {
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pti_mode = PTI_FORCE_OFF;
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pti_print_if_insecure("disabled on command line.");
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return;
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}
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autosel:
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if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
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return;
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enable:
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setup_force_cpu_cap(X86_FEATURE_PTI);
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}
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pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
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{
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/*
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* Changes to the high (kernel) portion of the kernelmode page
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* tables are not automatically propagated to the usermode tables.
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*
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* Users should keep in mind that, unlike the kernelmode tables,
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* there is no vmalloc_fault equivalent for the usermode tables.
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* Top-level entries added to init_mm's usermode pgd after boot
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* will not be automatically propagated to other mms.
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*/
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if (!pgdp_maps_userspace(pgdp))
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return pgd;
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/*
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* The user page tables get the full PGD, accessible from
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* userspace:
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*/
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kernel_to_user_pgdp(pgdp)->pgd = pgd.pgd;
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/*
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* If this is normal user memory, make it NX in the kernel
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* pagetables so that, if we somehow screw up and return to
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* usermode with the kernel CR3 loaded, we'll get a page fault
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* instead of allowing user code to execute with the wrong CR3.
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*
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* As exceptions, we don't set NX if:
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* - _PAGE_USER is not set. This could be an executable
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* EFI runtime mapping or something similar, and the kernel
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* may execute from it
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* - we don't have NX support
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* - we're clearing the PGD (i.e. the new pgd is not present).
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*/
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if ((pgd.pgd & (_PAGE_USER|_PAGE_PRESENT)) == (_PAGE_USER|_PAGE_PRESENT) &&
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(__supported_pte_mask & _PAGE_NX))
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pgd.pgd |= _PAGE_NX;
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/* return the copy of the PGD we want the kernel to use: */
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return pgd;
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}
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/*
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* Walk the user copy of the page tables (optionally) trying to allocate
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* page table pages on the way down.
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*
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* Returns a pointer to a P4D on success, or NULL on failure.
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*/
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static p4d_t *pti_user_pagetable_walk_p4d(unsigned long address)
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{
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pgd_t *pgd = kernel_to_user_pgdp(pgd_offset_k(address));
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gfp_t gfp = (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO);
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if (address < PAGE_OFFSET) {
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WARN_ONCE(1, "attempt to walk user address\n");
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return NULL;
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}
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if (pgd_none(*pgd)) {
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unsigned long new_p4d_page = __get_free_page(gfp);
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if (WARN_ON_ONCE(!new_p4d_page))
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return NULL;
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set_pgd(pgd, __pgd(_KERNPG_TABLE | __pa(new_p4d_page)));
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}
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BUILD_BUG_ON(pgd_large(*pgd) != 0);
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return p4d_offset(pgd, address);
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}
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/*
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* Walk the user copy of the page tables (optionally) trying to allocate
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* page table pages on the way down.
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*
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* Returns a pointer to a PMD on success, or NULL on failure.
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*/
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static pmd_t *pti_user_pagetable_walk_pmd(unsigned long address)
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{
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gfp_t gfp = (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO);
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p4d_t *p4d;
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pud_t *pud;
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p4d = pti_user_pagetable_walk_p4d(address);
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if (!p4d)
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return NULL;
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BUILD_BUG_ON(p4d_large(*p4d) != 0);
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if (p4d_none(*p4d)) {
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unsigned long new_pud_page = __get_free_page(gfp);
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if (WARN_ON_ONCE(!new_pud_page))
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return NULL;
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set_p4d(p4d, __p4d(_KERNPG_TABLE | __pa(new_pud_page)));
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}
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pud = pud_offset(p4d, address);
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/* The user page tables do not use large mappings: */
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if (pud_large(*pud)) {
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WARN_ON(1);
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return NULL;
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}
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if (pud_none(*pud)) {
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unsigned long new_pmd_page = __get_free_page(gfp);
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if (WARN_ON_ONCE(!new_pmd_page))
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return NULL;
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set_pud(pud, __pud(_KERNPG_TABLE | __pa(new_pmd_page)));
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}
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return pmd_offset(pud, address);
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}
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/*
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* Walk the shadow copy of the page tables (optionally) trying to allocate
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* page table pages on the way down. Does not support large pages.
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*
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* Note: this is only used when mapping *new* kernel data into the
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* user/shadow page tables. It is never used for userspace data.
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*
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* Returns a pointer to a PTE on success, or NULL on failure.
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*/
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static pte_t *pti_user_pagetable_walk_pte(unsigned long address)
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{
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gfp_t gfp = (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO);
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pmd_t *pmd;
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pte_t *pte;
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pmd = pti_user_pagetable_walk_pmd(address);
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if (!pmd)
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return NULL;
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/* We can't do anything sensible if we hit a large mapping. */
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if (pmd_large(*pmd)) {
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WARN_ON(1);
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return NULL;
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}
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if (pmd_none(*pmd)) {
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unsigned long new_pte_page = __get_free_page(gfp);
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if (!new_pte_page)
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return NULL;
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set_pmd(pmd, __pmd(_KERNPG_TABLE | __pa(new_pte_page)));
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}
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pte = pte_offset_kernel(pmd, address);
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if (pte_flags(*pte) & _PAGE_USER) {
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WARN_ONCE(1, "attempt to walk to user pte\n");
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return NULL;
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}
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return pte;
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}
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#ifdef CONFIG_X86_VSYSCALL_EMULATION
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static void __init pti_setup_vsyscall(void)
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{
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pte_t *pte, *target_pte;
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unsigned int level;
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pte = lookup_address(VSYSCALL_ADDR, &level);
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if (!pte || WARN_ON(level != PG_LEVEL_4K) || pte_none(*pte))
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return;
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target_pte = pti_user_pagetable_walk_pte(VSYSCALL_ADDR);
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if (WARN_ON(!target_pte))
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return;
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*target_pte = *pte;
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set_vsyscall_pgtable_user_bits(kernel_to_user_pgdp(swapper_pg_dir));
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}
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#else
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static void __init pti_setup_vsyscall(void) { }
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#endif
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enum pti_clone_level {
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PTI_CLONE_PMD,
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PTI_CLONE_PTE,
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};
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static void
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pti_clone_pgtable(unsigned long start, unsigned long end,
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enum pti_clone_level level)
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{
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unsigned long addr;
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/*
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* Clone the populated PMDs which cover start to end. These PMD areas
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* can have holes.
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*/
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for (addr = start; addr < end;) {
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pte_t *pte, *target_pte;
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pmd_t *pmd, *target_pmd;
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pgd_t *pgd;
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p4d_t *p4d;
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pud_t *pud;
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/* Overflow check */
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if (addr < start)
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break;
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pgd = pgd_offset_k(addr);
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if (WARN_ON(pgd_none(*pgd)))
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return;
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p4d = p4d_offset(pgd, addr);
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if (WARN_ON(p4d_none(*p4d)))
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return;
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pud = pud_offset(p4d, addr);
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if (pud_none(*pud)) {
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WARN_ON_ONCE(addr & ~PUD_MASK);
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addr = round_up(addr + 1, PUD_SIZE);
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continue;
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}
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd)) {
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WARN_ON_ONCE(addr & ~PMD_MASK);
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addr = round_up(addr + 1, PMD_SIZE);
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continue;
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}
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if (pmd_large(*pmd) || level == PTI_CLONE_PMD) {
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target_pmd = pti_user_pagetable_walk_pmd(addr);
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if (WARN_ON(!target_pmd))
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return;
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/*
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* Only clone present PMDs. This ensures only setting
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* _PAGE_GLOBAL on present PMDs. This should only be
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* called on well-known addresses anyway, so a non-
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* present PMD would be a surprise.
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*/
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if (WARN_ON(!(pmd_flags(*pmd) & _PAGE_PRESENT)))
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return;
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/*
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* Setting 'target_pmd' below creates a mapping in both
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* the user and kernel page tables. It is effectively
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* global, so set it as global in both copies. Note:
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* the X86_FEATURE_PGE check is not _required_ because
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* the CPU ignores _PAGE_GLOBAL when PGE is not
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* supported. The check keeps consistency with
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* code that only set this bit when supported.
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*/
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if (boot_cpu_has(X86_FEATURE_PGE))
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*pmd = pmd_set_flags(*pmd, _PAGE_GLOBAL);
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/*
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* Copy the PMD. That is, the kernelmode and usermode
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* tables will share the last-level page tables of this
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* address range
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*/
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*target_pmd = *pmd;
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addr += PMD_SIZE;
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} else if (level == PTI_CLONE_PTE) {
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/* Walk the page-table down to the pte level */
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pte = pte_offset_kernel(pmd, addr);
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if (pte_none(*pte)) {
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addr += PAGE_SIZE;
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continue;
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}
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/* Only clone present PTEs */
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if (WARN_ON(!(pte_flags(*pte) & _PAGE_PRESENT)))
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return;
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/* Allocate PTE in the user page-table */
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target_pte = pti_user_pagetable_walk_pte(addr);
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if (WARN_ON(!target_pte))
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return;
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/* Set GLOBAL bit in both PTEs */
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if (boot_cpu_has(X86_FEATURE_PGE))
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*pte = pte_set_flags(*pte, _PAGE_GLOBAL);
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/* Clone the PTE */
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*target_pte = *pte;
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addr += PAGE_SIZE;
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} else {
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BUG();
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}
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}
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}
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#ifdef CONFIG_X86_64
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/*
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* Clone a single p4d (i.e. a top-level entry on 4-level systems and a
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* next-level entry on 5-level systems.
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*/
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static void __init pti_clone_p4d(unsigned long addr)
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{
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p4d_t *kernel_p4d, *user_p4d;
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pgd_t *kernel_pgd;
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user_p4d = pti_user_pagetable_walk_p4d(addr);
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if (!user_p4d)
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return;
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kernel_pgd = pgd_offset_k(addr);
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kernel_p4d = p4d_offset(kernel_pgd, addr);
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*user_p4d = *kernel_p4d;
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}
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/*
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* Clone the CPU_ENTRY_AREA and associated data into the user space visible
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* page table.
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*/
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static void __init pti_clone_user_shared(void)
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{
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unsigned int cpu;
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pti_clone_p4d(CPU_ENTRY_AREA_BASE);
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for_each_possible_cpu(cpu) {
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/*
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* The SYSCALL64 entry code needs one word of scratch space
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* in which to spill a register. It lives in the sp2 slot
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* of the CPU's TSS.
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*
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* This is done for all possible CPUs during boot to ensure
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* that it's propagated to all mms.
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*/
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unsigned long va = (unsigned long)&per_cpu(cpu_tss_rw, cpu);
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phys_addr_t pa = per_cpu_ptr_to_phys((void *)va);
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pte_t *target_pte;
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target_pte = pti_user_pagetable_walk_pte(va);
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if (WARN_ON(!target_pte))
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return;
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*target_pte = pfn_pte(pa >> PAGE_SHIFT, PAGE_KERNEL);
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}
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}
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#else /* CONFIG_X86_64 */
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/*
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* On 32 bit PAE systems with 1GB of Kernel address space there is only
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* one pgd/p4d for the whole kernel. Cloning that would map the whole
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* address space into the user page-tables, making PTI useless. So clone
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* the page-table on the PMD level to prevent that.
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*/
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static void __init pti_clone_user_shared(void)
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{
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unsigned long start, end;
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start = CPU_ENTRY_AREA_BASE;
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end = start + (PAGE_SIZE * CPU_ENTRY_AREA_PAGES);
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pti_clone_pgtable(start, end, PTI_CLONE_PMD);
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}
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#endif /* CONFIG_X86_64 */
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/*
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* Clone the ESPFIX P4D into the user space visible page table
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*/
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static void __init pti_setup_espfix64(void)
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{
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#ifdef CONFIG_X86_ESPFIX64
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pti_clone_p4d(ESPFIX_BASE_ADDR);
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#endif
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}
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/*
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* Clone the populated PMDs of the entry text and force it RO.
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*/
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static void pti_clone_entry_text(void)
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{
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pti_clone_pgtable((unsigned long) __entry_text_start,
|
|
(unsigned long) __entry_text_end,
|
|
PTI_CLONE_PMD);
|
|
}
|
|
|
|
/*
|
|
* Global pages and PCIDs are both ways to make kernel TLB entries
|
|
* live longer, reduce TLB misses and improve kernel performance.
|
|
* But, leaving all kernel text Global makes it potentially accessible
|
|
* to Meltdown-style attacks which make it trivial to find gadgets or
|
|
* defeat KASLR.
|
|
*
|
|
* Only use global pages when it is really worth it.
|
|
*/
|
|
static inline bool pti_kernel_image_global_ok(void)
|
|
{
|
|
/*
|
|
* Systems with PCIDs get little benefit from global
|
|
* kernel text and are not worth the downsides.
|
|
*/
|
|
if (cpu_feature_enabled(X86_FEATURE_PCID))
|
|
return false;
|
|
|
|
/*
|
|
* Only do global kernel image for pti=auto. Do the most
|
|
* secure thing (not global) if pti=on specified.
|
|
*/
|
|
if (pti_mode != PTI_AUTO)
|
|
return false;
|
|
|
|
/*
|
|
* K8 may not tolerate the cleared _PAGE_RW on the userspace
|
|
* global kernel image pages. Do the safe thing (disable
|
|
* global kernel image). This is unlikely to ever be
|
|
* noticed because PTI is disabled by default on AMD CPUs.
|
|
*/
|
|
if (boot_cpu_has(X86_FEATURE_K8))
|
|
return false;
|
|
|
|
/*
|
|
* RANDSTRUCT derives its hardening benefits from the
|
|
* attacker's lack of knowledge about the layout of kernel
|
|
* data structures. Keep the kernel image non-global in
|
|
* cases where RANDSTRUCT is in use to help keep the layout a
|
|
* secret.
|
|
*/
|
|
if (IS_ENABLED(CONFIG_RANDSTRUCT))
|
|
return false;
|
|
|
|
return true;
|
|
}
|
|
|
|
/*
|
|
* For some configurations, map all of kernel text into the user page
|
|
* tables. This reduces TLB misses, especially on non-PCID systems.
|
|
*/
|
|
static void pti_clone_kernel_text(void)
|
|
{
|
|
/*
|
|
* rodata is part of the kernel image and is normally
|
|
* readable on the filesystem or on the web. But, do not
|
|
* clone the areas past rodata, they might contain secrets.
|
|
*/
|
|
unsigned long start = PFN_ALIGN(_text);
|
|
unsigned long end_clone = (unsigned long)__end_rodata_aligned;
|
|
unsigned long end_global = PFN_ALIGN((unsigned long)_etext);
|
|
|
|
if (!pti_kernel_image_global_ok())
|
|
return;
|
|
|
|
pr_debug("mapping partial kernel image into user address space\n");
|
|
|
|
/*
|
|
* Note that this will undo _some_ of the work that
|
|
* pti_set_kernel_image_nonglobal() did to clear the
|
|
* global bit.
|
|
*/
|
|
pti_clone_pgtable(start, end_clone, PTI_LEVEL_KERNEL_IMAGE);
|
|
|
|
/*
|
|
* pti_clone_pgtable() will set the global bit in any PMDs
|
|
* that it clones, but we also need to get any PTEs in
|
|
* the last level for areas that are not huge-page-aligned.
|
|
*/
|
|
|
|
/* Set the global bit for normal non-__init kernel text: */
|
|
set_memory_global(start, (end_global - start) >> PAGE_SHIFT);
|
|
}
|
|
|
|
static void pti_set_kernel_image_nonglobal(void)
|
|
{
|
|
/*
|
|
* The identity map is created with PMDs, regardless of the
|
|
* actual length of the kernel. We need to clear
|
|
* _PAGE_GLOBAL up to a PMD boundary, not just to the end
|
|
* of the image.
|
|
*/
|
|
unsigned long start = PFN_ALIGN(_text);
|
|
unsigned long end = ALIGN((unsigned long)_end, PMD_PAGE_SIZE);
|
|
|
|
/*
|
|
* This clears _PAGE_GLOBAL from the entire kernel image.
|
|
* pti_clone_kernel_text() map put _PAGE_GLOBAL back for
|
|
* areas that are mapped to userspace.
|
|
*/
|
|
set_memory_nonglobal(start, (end - start) >> PAGE_SHIFT);
|
|
}
|
|
|
|
/*
|
|
* Initialize kernel page table isolation
|
|
*/
|
|
void __init pti_init(void)
|
|
{
|
|
if (!boot_cpu_has(X86_FEATURE_PTI))
|
|
return;
|
|
|
|
pr_info("enabled\n");
|
|
|
|
#ifdef CONFIG_X86_32
|
|
/*
|
|
* We check for X86_FEATURE_PCID here. But the init-code will
|
|
* clear the feature flag on 32 bit because the feature is not
|
|
* supported on 32 bit anyway. To print the warning we need to
|
|
* check with cpuid directly again.
|
|
*/
|
|
if (cpuid_ecx(0x1) & BIT(17)) {
|
|
/* Use printk to work around pr_fmt() */
|
|
printk(KERN_WARNING "\n");
|
|
printk(KERN_WARNING "************************************************************\n");
|
|
printk(KERN_WARNING "** WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! **\n");
|
|
printk(KERN_WARNING "** **\n");
|
|
printk(KERN_WARNING "** You are using 32-bit PTI on a 64-bit PCID-capable CPU. **\n");
|
|
printk(KERN_WARNING "** Your performance will increase dramatically if you **\n");
|
|
printk(KERN_WARNING "** switch to a 64-bit kernel! **\n");
|
|
printk(KERN_WARNING "** **\n");
|
|
printk(KERN_WARNING "** WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! **\n");
|
|
printk(KERN_WARNING "************************************************************\n");
|
|
}
|
|
#endif
|
|
|
|
pti_clone_user_shared();
|
|
|
|
/* Undo all global bits from the init pagetables in head_64.S: */
|
|
pti_set_kernel_image_nonglobal();
|
|
/* Replace some of the global bits just for shared entry text: */
|
|
pti_clone_entry_text();
|
|
pti_setup_espfix64();
|
|
pti_setup_vsyscall();
|
|
}
|
|
|
|
/*
|
|
* Finalize the kernel mappings in the userspace page-table. Some of the
|
|
* mappings for the kernel image might have changed since pti_init()
|
|
* cloned them. This is because parts of the kernel image have been
|
|
* mapped RO and/or NX. These changes need to be cloned again to the
|
|
* userspace page-table.
|
|
*/
|
|
void pti_finalize(void)
|
|
{
|
|
if (!boot_cpu_has(X86_FEATURE_PTI))
|
|
return;
|
|
/*
|
|
* We need to clone everything (again) that maps parts of the
|
|
* kernel image.
|
|
*/
|
|
pti_clone_entry_text();
|
|
pti_clone_kernel_text();
|
|
|
|
debug_checkwx_user();
|
|
}
|