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![Mark Bloch](/assets/img/avatar_default.png)
Current code uses many different types when dealing with a port of a RDMA device: u8, unsigned int and u32. Switch to u32 to clean up the logic. This allows us to make (at least) the core view consistent and use the same type. Unfortunately not all places can be converted. Many uverbs functions expect port to be u8 so keep those places in order not to break UAPIs. HW/Spec defined values must also not be changed. With the switch to u32 we now can support devices with more than 255 ports. U32_MAX is reserved to make control logic a bit easier to deal with. As a device with U32_MAX ports probably isn't going to happen any time soon this seems like a non issue. When a device with more than 255 ports is created uverbs will report the RDMA device as having 255 ports as this is the max currently supported. The verbs interface is not changed yet because the IBTA spec limits the port size in too many places to be u8 and all applications that relies in verbs won't be able to cope with this change. At this stage, we are extending the interfaces that are using vendor channel solely Once the limitation is lifted mlx5 in switchdev mode will be able to have thousands of SFs created by the device. As the only instance of an RDMA device that reports more than 255 ports will be a representor device and it exposes itself as a RAW Ethernet only device CM/MAD/IPoIB and other ULPs aren't effected by this change and their sysfs/interfaces that are exposes to userspace can remain unchanged. While here cleanup some alignment issues and remove unneeded sanity checks (mainly in rdmavt), Link: https://lore.kernel.org/r/20210301070420.439400-1-leon@kernel.org Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
402 lines
12 KiB
C
402 lines
12 KiB
C
/*
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* Copyright (c) 2012 - 2018 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
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* Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef QIB_VERBS_H
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#define QIB_VERBS_H
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/kref.h>
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#include <linux/workqueue.h>
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#include <linux/kthread.h>
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#include <linux/completion.h>
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#include <rdma/ib_pack.h>
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#include <rdma/ib_user_verbs.h>
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#include <rdma/ib_hdrs.h>
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#include <rdma/rdmavt_qp.h>
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#include <rdma/rdmavt_cq.h>
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struct qib_ctxtdata;
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struct qib_pportdata;
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struct qib_devdata;
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struct qib_verbs_txreq;
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#define QIB_MAX_RDMA_ATOMIC 16
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#define QIB_GUIDS_PER_PORT 5
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#define QIB_PSN_SHIFT 8
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/*
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* Increment this value if any changes that break userspace ABI
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* compatibility are made.
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*/
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#define QIB_UVERBS_ABI_VERSION 2
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/* IB Performance Manager status values */
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#define IB_PMA_SAMPLE_STATUS_DONE 0x00
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#define IB_PMA_SAMPLE_STATUS_STARTED 0x01
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#define IB_PMA_SAMPLE_STATUS_RUNNING 0x02
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/* Mandatory IB performance counter select values. */
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#define IB_PMA_PORT_XMIT_DATA cpu_to_be16(0x0001)
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#define IB_PMA_PORT_RCV_DATA cpu_to_be16(0x0002)
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#define IB_PMA_PORT_XMIT_PKTS cpu_to_be16(0x0003)
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#define IB_PMA_PORT_RCV_PKTS cpu_to_be16(0x0004)
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#define IB_PMA_PORT_XMIT_WAIT cpu_to_be16(0x0005)
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#define QIB_VENDOR_IPG cpu_to_be16(0xFFA0)
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#define IB_DEFAULT_GID_PREFIX cpu_to_be64(0xfe80000000000000ULL)
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/* Values for set/get portinfo VLCap OperationalVLs */
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#define IB_VL_VL0 1
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#define IB_VL_VL0_1 2
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#define IB_VL_VL0_3 3
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#define IB_VL_VL0_7 4
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#define IB_VL_VL0_14 5
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static inline int qib_num_vls(int vls)
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{
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switch (vls) {
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default:
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case IB_VL_VL0:
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return 1;
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case IB_VL_VL0_1:
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return 2;
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case IB_VL_VL0_3:
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return 4;
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case IB_VL_VL0_7:
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return 8;
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case IB_VL_VL0_14:
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return 15;
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}
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}
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struct qib_pio_header {
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__le32 pbc[2];
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struct ib_header hdr;
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} __packed;
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/*
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* qib specific data structure that will be hidden from rvt after the queue pair
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* is made common.
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*/
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struct qib_qp_priv {
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struct ib_header *s_hdr; /* next packet header to send */
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struct list_head iowait; /* link for wait PIO buf */
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atomic_t s_dma_busy;
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struct qib_verbs_txreq *s_tx;
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struct work_struct s_work;
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wait_queue_head_t wait_dma;
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struct rvt_qp *owner;
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};
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#define QIB_PSN_CREDIT 16
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struct qib_opcode_stats {
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u64 n_packets; /* number of packets */
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u64 n_bytes; /* total number of bytes */
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};
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struct qib_opcode_stats_perctx {
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struct qib_opcode_stats stats[128];
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};
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struct qib_pma_counters {
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u64 n_unicast_xmit; /* total unicast packets sent */
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u64 n_unicast_rcv; /* total unicast packets received */
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u64 n_multicast_xmit; /* total multicast packets sent */
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u64 n_multicast_rcv; /* total multicast packets received */
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};
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struct qib_ibport {
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struct rvt_ibport rvp;
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struct rvt_ah *smi_ah;
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__be64 guids[QIB_GUIDS_PER_PORT - 1]; /* writable GUIDs */
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struct qib_pma_counters __percpu *pmastats;
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u64 z_unicast_xmit; /* starting count for PMA */
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u64 z_unicast_rcv; /* starting count for PMA */
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u64 z_multicast_xmit; /* starting count for PMA */
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u64 z_multicast_rcv; /* starting count for PMA */
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u64 z_symbol_error_counter; /* starting count for PMA */
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u64 z_link_error_recovery_counter; /* starting count for PMA */
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u64 z_link_downed_counter; /* starting count for PMA */
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u64 z_port_rcv_errors; /* starting count for PMA */
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u64 z_port_rcv_remphys_errors; /* starting count for PMA */
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u64 z_port_xmit_discards; /* starting count for PMA */
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u64 z_port_xmit_data; /* starting count for PMA */
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u64 z_port_rcv_data; /* starting count for PMA */
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u64 z_port_xmit_packets; /* starting count for PMA */
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u64 z_port_rcv_packets; /* starting count for PMA */
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u32 z_local_link_integrity_errors; /* starting count for PMA */
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u32 z_excessive_buffer_overrun_errors; /* starting count for PMA */
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u32 z_vl15_dropped; /* starting count for PMA */
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u8 sl_to_vl[16];
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};
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struct qib_ibdev {
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struct rvt_dev_info rdi;
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struct list_head piowait; /* list for wait PIO buf */
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struct list_head dmawait; /* list for wait DMA */
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struct list_head txwait; /* list for wait qib_verbs_txreq */
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struct list_head memwait; /* list for wait kernel memory */
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struct list_head txreq_free;
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struct timer_list mem_timer;
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struct qib_pio_header *pio_hdrs;
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dma_addr_t pio_hdrs_phys;
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u32 n_piowait;
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u32 n_txwait;
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#ifdef CONFIG_DEBUG_FS
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/* per HCA debugfs */
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struct dentry *qib_ibdev_dbg;
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#endif
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};
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struct qib_verbs_counters {
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u64 symbol_error_counter;
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u64 link_error_recovery_counter;
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u64 link_downed_counter;
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u64 port_rcv_errors;
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u64 port_rcv_remphys_errors;
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u64 port_xmit_discards;
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u64 port_xmit_data;
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u64 port_rcv_data;
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u64 port_xmit_packets;
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u64 port_rcv_packets;
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u32 local_link_integrity_errors;
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u32 excessive_buffer_overrun_errors;
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u32 vl15_dropped;
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};
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static inline struct qib_ibdev *to_idev(struct ib_device *ibdev)
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{
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struct rvt_dev_info *rdi;
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rdi = container_of(ibdev, struct rvt_dev_info, ibdev);
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return container_of(rdi, struct qib_ibdev, rdi);
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}
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/*
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* Send if not busy or waiting for I/O and either
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* a RC response is pending or we can process send work requests.
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*/
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static inline int qib_send_ok(struct rvt_qp *qp)
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{
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return !(qp->s_flags & (RVT_S_BUSY | RVT_S_ANY_WAIT_IO)) &&
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(qp->s_hdrwords || (qp->s_flags & RVT_S_RESP_PENDING) ||
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!(qp->s_flags & RVT_S_ANY_WAIT_SEND));
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}
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bool _qib_schedule_send(struct rvt_qp *qp);
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bool qib_schedule_send(struct rvt_qp *qp);
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static inline int qib_pkey_ok(u16 pkey1, u16 pkey2)
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{
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u16 p1 = pkey1 & 0x7FFF;
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u16 p2 = pkey2 & 0x7FFF;
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/*
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* Low 15 bits must be non-zero and match, and
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* one of the two must be a full member.
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*/
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return p1 && p1 == p2 && ((__s16)pkey1 < 0 || (__s16)pkey2 < 0);
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}
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void qib_bad_pkey(struct qib_ibport *ibp, u32 key, u32 sl,
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u32 qp1, u32 qp2, __be16 lid1, __be16 lid2);
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void qib_cap_mask_chg(struct rvt_dev_info *rdi, u32 port_num);
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void qib_sys_guid_chg(struct qib_ibport *ibp);
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void qib_node_desc_chg(struct qib_ibport *ibp);
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int qib_process_mad(struct ib_device *ibdev, int mad_flags, u32 port_num,
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const struct ib_wc *in_wc, const struct ib_grh *in_grh,
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const struct ib_mad *in, struct ib_mad *out,
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size_t *out_mad_size, u16 *out_mad_pkey_index);
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void qib_notify_create_mad_agent(struct rvt_dev_info *rdi, int port_idx);
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void qib_notify_free_mad_agent(struct rvt_dev_info *rdi, int port_idx);
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/*
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* Compare the lower 24 bits of the two values.
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* Returns an integer <, ==, or > than zero.
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*/
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static inline int qib_cmp24(u32 a, u32 b)
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{
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return (((int) a) - ((int) b)) << 8;
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}
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int qib_snapshot_counters(struct qib_pportdata *ppd, u64 *swords,
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u64 *rwords, u64 *spkts, u64 *rpkts,
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u64 *xmit_wait);
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int qib_get_counters(struct qib_pportdata *ppd,
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struct qib_verbs_counters *cntrs);
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/*
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* Functions provided by qib driver for rdmavt to use
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*/
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unsigned qib_free_all_qps(struct rvt_dev_info *rdi);
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void *qib_qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp);
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void qib_qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp);
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void qib_notify_qp_reset(struct rvt_qp *qp);
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int qib_alloc_qpn(struct rvt_dev_info *rdi, struct rvt_qpn_table *qpt,
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enum ib_qp_type type, u32 port);
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void qib_restart_rc(struct rvt_qp *qp, u32 psn, int wait);
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#ifdef CONFIG_DEBUG_FS
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void qib_qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter);
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#endif
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unsigned qib_pkt_delay(u32 plen, u8 snd_mult, u8 rcv_mult);
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void qib_verbs_sdma_desc_avail(struct qib_pportdata *ppd, unsigned avail);
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void qib_put_txreq(struct qib_verbs_txreq *tx);
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int qib_verbs_send(struct rvt_qp *qp, struct ib_header *hdr,
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u32 hdrwords, struct rvt_sge_state *ss, u32 len);
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void qib_uc_rcv(struct qib_ibport *ibp, struct ib_header *hdr,
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int has_grh, void *data, u32 tlen, struct rvt_qp *qp);
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void qib_rc_rcv(struct qib_ctxtdata *rcd, struct ib_header *hdr,
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int has_grh, void *data, u32 tlen, struct rvt_qp *qp);
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int qib_check_ah(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr);
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int qib_check_send_wqe(struct rvt_qp *qp, struct rvt_swqe *wqe,
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bool *call_send);
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struct ib_ah *qib_create_qp0_ah(struct qib_ibport *ibp, u16 dlid);
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void qib_rc_rnr_retry(unsigned long arg);
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void qib_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr);
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int qib_post_ud_send(struct rvt_qp *qp, const struct ib_send_wr *wr);
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void qib_ud_rcv(struct qib_ibport *ibp, struct ib_header *hdr,
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int has_grh, void *data, u32 tlen, struct rvt_qp *qp);
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void mr_rcu_callback(struct rcu_head *list);
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void qib_migrate_qp(struct rvt_qp *qp);
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int qib_ruc_check_hdr(struct qib_ibport *ibp, struct ib_header *hdr,
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int has_grh, struct rvt_qp *qp, u32 bth0);
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u32 qib_make_grh(struct qib_ibport *ibp, struct ib_grh *hdr,
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const struct ib_global_route *grh, u32 hwords, u32 nwords);
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void qib_make_ruc_header(struct rvt_qp *qp, struct ib_other_headers *ohdr,
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u32 bth0, u32 bth2);
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void _qib_do_send(struct work_struct *work);
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void qib_do_send(struct rvt_qp *qp);
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void qib_send_rc_ack(struct rvt_qp *qp);
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int qib_make_rc_req(struct rvt_qp *qp, unsigned long *flags);
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int qib_make_uc_req(struct rvt_qp *qp, unsigned long *flags);
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int qib_make_ud_req(struct rvt_qp *qp, unsigned long *flags);
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int qib_register_ib_device(struct qib_devdata *);
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void qib_unregister_ib_device(struct qib_devdata *);
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void qib_ib_rcv(struct qib_ctxtdata *, void *, void *, u32);
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void qib_ib_piobufavail(struct qib_devdata *);
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unsigned qib_get_npkeys(struct qib_devdata *);
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unsigned qib_get_pkey(struct qib_ibport *, unsigned);
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extern const enum ib_wc_opcode ib_qib_wc_opcode[];
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/*
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* Below HCA-independent IB PhysPortState values, returned
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* by the f_ibphys_portstate() routine.
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*/
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#define IB_PHYSPORTSTATE_SLEEP 1
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#define IB_PHYSPORTSTATE_POLL 2
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#define IB_PHYSPORTSTATE_DISABLED 3
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#define IB_PHYSPORTSTATE_CFG_TRAIN 4
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#define IB_PHYSPORTSTATE_LINKUP 5
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#define IB_PHYSPORTSTATE_LINK_ERR_RECOVER 6
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#define IB_PHYSPORTSTATE_CFG_DEBOUNCE 8
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#define IB_PHYSPORTSTATE_CFG_IDLE 0xB
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#define IB_PHYSPORTSTATE_RECOVERY_RETRAIN 0xC
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#define IB_PHYSPORTSTATE_RECOVERY_WAITRMT 0xE
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#define IB_PHYSPORTSTATE_RECOVERY_IDLE 0xF
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#define IB_PHYSPORTSTATE_CFG_ENH 0x10
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#define IB_PHYSPORTSTATE_CFG_WAIT_ENH 0x13
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extern const int ib_rvt_state_ops[];
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extern __be64 ib_qib_sys_image_guid; /* in network order */
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extern unsigned int ib_rvt_lkey_table_size;
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extern unsigned int ib_qib_max_cqes;
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extern unsigned int ib_qib_max_cqs;
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extern unsigned int ib_qib_max_qp_wrs;
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extern unsigned int ib_qib_max_qps;
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extern unsigned int ib_qib_max_sges;
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extern unsigned int ib_qib_max_mcast_grps;
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extern unsigned int ib_qib_max_mcast_qp_attached;
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extern unsigned int ib_qib_max_srqs;
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extern unsigned int ib_qib_max_srq_sges;
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extern unsigned int ib_qib_max_srq_wrs;
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extern const u32 ib_qib_rnr_table[];
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extern const struct rvt_operation_params qib_post_parms[];
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#endif /* QIB_VERBS_H */
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