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![David Howells](/assets/img/avatar_default.png)
Fix a number of miscellanous items: (1) Declare lock sections in the linker script. (2) Recurse in the correct manner in the arch makefile. (3) asm/bug.h requires asm/linkage.h to be included first. One C file puts asm/bug.h first. (4) Add an empty RTC header file to avoid missing header file errors. (5) sg_dma_address() should use the dma_address member of a scatter list. (6) Add trivial pci_unmap support. (7) Add pgprot_noncached() (8) Discard u_quad_t. (9) Use ~0UL rather than ULONG_MAX in unistd.h in case the latter isn't declared. (10) Add an empty VGA header file to avoid missing header file errors. (11) Add an XOR header file to use the generic XOR stuff. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
184 lines
5.1 KiB
C
184 lines
5.1 KiB
C
#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#include <linux/device.h>
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#include <asm/cache.h>
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#include <asm/cacheflush.h>
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#include <asm/scatterlist.h>
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#include <asm/io.h>
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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extern unsigned long __nongprelbss dma_coherent_mem_start;
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extern unsigned long __nongprelbss dma_coherent_mem_end;
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void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
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void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
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/*
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* These macros should be used after a pci_map_sg call has been done
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* to get bus addresses of each of the SG entries and their lengths.
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* You should only work with the number of sg entries pci_map_sg
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* returns, or alternatively stop on the first sg_dma_len(sg) which
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* is 0.
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*/
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#define sg_dma_address(sg) ((sg)->dma_address)
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#define sg_dma_len(sg) ((sg)->length)
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/*
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* Map a single buffer of the indicated size for DMA in streaming mode.
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* The 32-bit bus address to use is returned.
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*
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* Once the device is given the dma address, the device owns this memory
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* until either pci_unmap_single or pci_dma_sync_single is performed.
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*/
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extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction);
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/*
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* Unmap a single streaming mode DMA translation. The dma_addr and size
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* must match what was provided for in a previous pci_map_single call. All
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* other usages are undefined.
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*
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* After this call, reads by the cpu to the buffer are guarenteed to see
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* whatever the device wrote there.
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*/
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static inline
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void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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/*
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* Map a set of buffers described by scatterlist in streaming
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* mode for DMA. This is the scather-gather version of the
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* above pci_map_single interface. Here the scatter gather list
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* elements are each tagged with the appropriate dma address
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* and length. They are obtained via sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for pci_map_single are
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* the same here.
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*/
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extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction);
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/*
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* Unmap a set of streaming mode DMA translations.
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* Again, cpu read rules concerning calls here are the same as for
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* pci_unmap_single() above.
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*/
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static inline
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void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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extern
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dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
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size_t size, enum dma_data_direction direction);
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static inline
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void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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static inline
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void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline
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void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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flush_write_buffers();
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}
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static inline
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void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline
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void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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flush_write_buffers();
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}
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static inline
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void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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}
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static inline
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void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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flush_write_buffers();
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}
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static inline
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int dma_mapping_error(dma_addr_t dma_addr)
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{
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return 0;
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}
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static inline
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int dma_supported(struct device *dev, u64 mask)
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{
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/*
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* we fall back to GFP_DMA when the mask isn't all 1s,
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* so we can't guarantee allocations that must be
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* within a tighter range than GFP_DMA..
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*/
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if (mask < 0x00ffffff)
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return 0;
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return 1;
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}
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static inline
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int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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static inline
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int dma_get_cache_alignment(void)
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{
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return 1 << L1_CACHE_SHIFT;
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}
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#define dma_is_consistent(d) (1)
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static inline
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void dma_cache_sync(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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flush_write_buffers();
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}
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#endif /* _ASM_DMA_MAPPING_H */
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