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![Bill Pemberton](/assets/img/avatar_default.png)
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Eric Piel <eric.piel@tremplin-utc.net> Cc: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
502 lines
14 KiB
C
502 lines
14 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
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*/
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/* This file contains the master driver module for use by SGI IOC4 subdrivers.
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*
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* It allocates any resources shared between multiple subdevices, and
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* provides accessor functions (where needed) and the like for those
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* resources. It also provides a mechanism for the subdevice modules
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* to support loading and unloading.
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*
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* Non-shared resources (e.g. external interrupt A_INT_OUT register page
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* alias, serial port and UART registers) are handled by the subdevice
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* modules themselves.
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*
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* This is all necessary because IOC4 is not implemented as a multi-function
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* PCI device, but an amalgamation of disparate registers for several
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* types of device (ATA, serial, external interrupts). The normal
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* resource management in the kernel doesn't have quite the right interfaces
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* to handle this situation (e.g. multiple modules can't claim the same
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* PCI ID), thus this IOC4 master module.
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/ioc4.h>
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#include <linux/ktime.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <linux/time.h>
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#include <asm/io.h>
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/***************
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* Definitions *
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***************/
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/* Tweakable values */
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/* PCI bus speed detection/calibration */
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#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
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#define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
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#define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
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#define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
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#define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
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#define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
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/************************
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* Submodule management *
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************************/
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static DEFINE_MUTEX(ioc4_mutex);
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static LIST_HEAD(ioc4_devices);
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static LIST_HEAD(ioc4_submodules);
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/* Register an IOC4 submodule */
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int
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ioc4_register_submodule(struct ioc4_submodule *is)
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{
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struct ioc4_driver_data *idd;
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mutex_lock(&ioc4_mutex);
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list_add(&is->is_list, &ioc4_submodules);
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/* Initialize submodule for each IOC4 */
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if (!is->is_probe)
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goto out;
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list_for_each_entry(idd, &ioc4_devices, idd_list) {
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if (is->is_probe(idd)) {
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printk(KERN_WARNING
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"%s: IOC4 submodule %s probe failed "
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"for pci_dev %s",
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__func__, module_name(is->is_owner),
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pci_name(idd->idd_pdev));
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}
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}
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out:
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mutex_unlock(&ioc4_mutex);
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return 0;
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}
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/* Unregister an IOC4 submodule */
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void
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ioc4_unregister_submodule(struct ioc4_submodule *is)
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{
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struct ioc4_driver_data *idd;
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mutex_lock(&ioc4_mutex);
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list_del(&is->is_list);
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/* Remove submodule for each IOC4 */
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if (!is->is_remove)
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goto out;
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list_for_each_entry(idd, &ioc4_devices, idd_list) {
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if (is->is_remove(idd)) {
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printk(KERN_WARNING
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"%s: IOC4 submodule %s remove failed "
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"for pci_dev %s.\n",
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__func__, module_name(is->is_owner),
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pci_name(idd->idd_pdev));
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}
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}
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out:
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mutex_unlock(&ioc4_mutex);
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}
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/*********************
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* Device management *
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*********************/
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#define IOC4_CALIBRATE_LOW_LIMIT \
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(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
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#define IOC4_CALIBRATE_HIGH_LIMIT \
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(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
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#define IOC4_CALIBRATE_DEFAULT \
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(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
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#define IOC4_CALIBRATE_END \
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(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
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#define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
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/* Determines external interrupt output clock period of the PCI bus an
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* IOC4 is attached to. This value can be used to determine the PCI
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* bus speed.
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*
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* IOC4 has a design feature that various internal timers are derived from
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* the PCI bus clock. This causes IOC4 device drivers to need to take the
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* bus speed into account when setting various register values (e.g. INT_OUT
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* register COUNT field, UART divisors, etc). Since this information is
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* needed by several subdrivers, it is determined by the main IOC4 driver,
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* even though the following code utilizes external interrupt registers
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* to perform the speed calculation.
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*/
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static void
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ioc4_clock_calibrate(struct ioc4_driver_data *idd)
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{
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union ioc4_int_out int_out;
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union ioc4_gpcr gpcr;
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unsigned int state, last_state = 1;
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struct timespec start_ts, end_ts;
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uint64_t start, end, period;
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unsigned int count = 0;
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/* Enable output */
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gpcr.raw = 0;
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gpcr.fields.dir = IOC4_GPCR_DIR_0;
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gpcr.fields.int_out_en = 1;
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writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
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/* Reset to power-on state */
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writel(0, &idd->idd_misc_regs->int_out.raw);
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mmiowb();
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/* Set up square wave */
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int_out.raw = 0;
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int_out.fields.count = IOC4_CALIBRATE_COUNT;
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int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
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int_out.fields.diag = 0;
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writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
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mmiowb();
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/* Check square wave period averaged over some number of cycles */
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do {
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int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
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state = int_out.fields.int_out;
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if (!last_state && state) {
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count++;
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if (count == IOC4_CALIBRATE_END) {
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ktime_get_ts(&end_ts);
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break;
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} else if (count == IOC4_CALIBRATE_DISCARD)
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ktime_get_ts(&start_ts);
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}
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last_state = state;
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} while (1);
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/* Calculation rearranged to preserve intermediate precision.
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* Logically:
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* 1. "end - start" gives us the measurement period over all
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* the square wave cycles.
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* 2. Divide by number of square wave cycles to get the period
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* of a square wave cycle.
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* 3. Divide by 2*(int_out.fields.count+1), which is the formula
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* by which the IOC4 generates the square wave, to get the
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* period of an IOC4 INT_OUT count.
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*/
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end = end_ts.tv_sec * NSEC_PER_SEC + end_ts.tv_nsec;
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start = start_ts.tv_sec * NSEC_PER_SEC + start_ts.tv_nsec;
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period = (end - start) /
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(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));
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/* Bounds check the result. */
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if (period > IOC4_CALIBRATE_LOW_LIMIT ||
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period < IOC4_CALIBRATE_HIGH_LIMIT) {
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printk(KERN_INFO
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"IOC4 %s: Clock calibration failed. Assuming"
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"PCI clock is %d ns.\n",
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pci_name(idd->idd_pdev),
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IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
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period = IOC4_CALIBRATE_DEFAULT;
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} else {
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u64 ns = period;
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do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
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printk(KERN_DEBUG
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"IOC4 %s: PCI clock is %llu ns.\n",
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pci_name(idd->idd_pdev), (unsigned long long)ns);
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}
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/* Remember results. We store the extint clock period rather
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* than the PCI clock period so that greater precision is
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* retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
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* PCI clock period.
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*/
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idd->count_period = period;
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}
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/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
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* Each brings out different combinations of IOC4 signals, thus.
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* the IOC4 subdrivers need to know to which we're attached.
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*
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* We look for the presence of a SCSI (IO9) or SATA (IO10) controller
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* on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
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* If neither is present, it's a PCI-RT.
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*/
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static unsigned int
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ioc4_variant(struct ioc4_driver_data *idd)
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{
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struct pci_dev *pdev = NULL;
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int found = 0;
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/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
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do {
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pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
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PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
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if (pdev &&
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idd->idd_pdev->bus->number == pdev->bus->number &&
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3 == PCI_SLOT(pdev->devfn))
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found = 1;
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} while (pdev && !found);
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if (NULL != pdev) {
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pci_dev_put(pdev);
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return IOC4_VARIANT_IO9;
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}
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/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
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pdev = NULL;
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do {
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pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
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PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
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if (pdev &&
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idd->idd_pdev->bus->number == pdev->bus->number &&
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3 == PCI_SLOT(pdev->devfn))
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found = 1;
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} while (pdev && !found);
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if (NULL != pdev) {
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pci_dev_put(pdev);
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return IOC4_VARIANT_IO10;
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}
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/* PCI-RT: No SCSI/SATA controller will be present */
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return IOC4_VARIANT_PCI_RT;
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}
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static void
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ioc4_load_modules(struct work_struct *work)
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{
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request_module("sgiioc4");
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}
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static DECLARE_WORK(ioc4_load_modules_work, ioc4_load_modules);
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/* Adds a new instance of an IOC4 card */
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static int
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ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
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{
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struct ioc4_driver_data *idd;
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struct ioc4_submodule *is;
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uint32_t pcmd;
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int ret;
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/* Enable IOC4 and take ownership of it */
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if ((ret = pci_enable_device(pdev))) {
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printk(KERN_WARNING
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"%s: Failed to enable IOC4 device for pci_dev %s.\n",
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__func__, pci_name(pdev));
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goto out;
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}
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pci_set_master(pdev);
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/* Set up per-IOC4 data */
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idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
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if (!idd) {
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printk(KERN_WARNING
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"%s: Failed to allocate IOC4 data for pci_dev %s.\n",
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__func__, pci_name(pdev));
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ret = -ENODEV;
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goto out_idd;
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}
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idd->idd_pdev = pdev;
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idd->idd_pci_id = pci_id;
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/* Map IOC4 misc registers. These are shared between subdevices
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* so the main IOC4 module manages them.
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*/
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idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
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if (!idd->idd_bar0) {
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printk(KERN_WARNING
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"%s: Unable to find IOC4 misc resource "
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"for pci_dev %s.\n",
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__func__, pci_name(idd->idd_pdev));
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ret = -ENODEV;
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goto out_pci;
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}
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if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
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"ioc4_misc")) {
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printk(KERN_WARNING
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"%s: Unable to request IOC4 misc region "
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"for pci_dev %s.\n",
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__func__, pci_name(idd->idd_pdev));
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ret = -ENODEV;
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goto out_pci;
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}
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idd->idd_misc_regs = ioremap(idd->idd_bar0,
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sizeof(struct ioc4_misc_regs));
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if (!idd->idd_misc_regs) {
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printk(KERN_WARNING
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"%s: Unable to remap IOC4 misc region "
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"for pci_dev %s.\n",
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__func__, pci_name(idd->idd_pdev));
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ret = -ENODEV;
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goto out_misc_region;
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}
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/* Failsafe portion of per-IOC4 initialization */
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/* Detect card variant */
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idd->idd_variant = ioc4_variant(idd);
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printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
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idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
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idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
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idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
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/* Initialize IOC4 */
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pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
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pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
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pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
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/* Determine PCI clock */
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ioc4_clock_calibrate(idd);
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/* Disable/clear all interrupts. Need to do this here lest
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* one submodule request the shared IOC4 IRQ, but interrupt
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* is generated by a different subdevice.
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*/
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/* Disable */
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writel(~0, &idd->idd_misc_regs->other_iec.raw);
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writel(~0, &idd->idd_misc_regs->sio_iec);
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/* Clear (i.e. acknowledge) */
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writel(~0, &idd->idd_misc_regs->other_ir.raw);
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writel(~0, &idd->idd_misc_regs->sio_ir);
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/* Track PCI-device specific data */
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idd->idd_serial_data = NULL;
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pci_set_drvdata(idd->idd_pdev, idd);
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mutex_lock(&ioc4_mutex);
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list_add_tail(&idd->idd_list, &ioc4_devices);
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/* Add this IOC4 to all submodules */
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list_for_each_entry(is, &ioc4_submodules, is_list) {
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if (is->is_probe && is->is_probe(idd)) {
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printk(KERN_WARNING
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"%s: IOC4 submodule 0x%s probe failed "
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"for pci_dev %s.\n",
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__func__, module_name(is->is_owner),
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pci_name(idd->idd_pdev));
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}
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}
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mutex_unlock(&ioc4_mutex);
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/* Request sgiioc4 IDE driver on boards that bring that functionality
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* off of IOC4. The root filesystem may be hosted on a drive connected
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* to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
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* won't be picked up by modprobes due to the ioc4 module owning the
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* PCI device.
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*/
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if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
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/* Request the module from a work procedure as the modprobe
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* goes out to a userland helper and that will hang if done
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* directly from ioc4_probe().
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*/
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printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
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schedule_work(&ioc4_load_modules_work);
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}
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return 0;
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out_misc_region:
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release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
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out_pci:
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kfree(idd);
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out_idd:
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pci_disable_device(pdev);
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out:
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return ret;
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}
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/* Removes a particular instance of an IOC4 card. */
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static void
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ioc4_remove(struct pci_dev *pdev)
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{
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struct ioc4_submodule *is;
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struct ioc4_driver_data *idd;
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idd = pci_get_drvdata(pdev);
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/* Remove this IOC4 from all submodules */
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mutex_lock(&ioc4_mutex);
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list_for_each_entry(is, &ioc4_submodules, is_list) {
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if (is->is_remove && is->is_remove(idd)) {
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printk(KERN_WARNING
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"%s: IOC4 submodule 0x%s remove failed "
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"for pci_dev %s.\n",
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__func__, module_name(is->is_owner),
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pci_name(idd->idd_pdev));
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}
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}
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mutex_unlock(&ioc4_mutex);
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/* Release resources */
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iounmap(idd->idd_misc_regs);
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if (!idd->idd_bar0) {
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printk(KERN_WARNING
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"%s: Unable to get IOC4 misc mapping for pci_dev %s. "
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"Device removal may be incomplete.\n",
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__func__, pci_name(idd->idd_pdev));
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}
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release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
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/* Disable IOC4 and relinquish */
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pci_disable_device(pdev);
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/* Remove and free driver data */
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mutex_lock(&ioc4_mutex);
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list_del(&idd->idd_list);
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mutex_unlock(&ioc4_mutex);
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kfree(idd);
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}
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static struct pci_device_id ioc4_id_table[] = {
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{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
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PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
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{0}
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|
};
|
|
|
|
static struct pci_driver ioc4_driver = {
|
|
.name = "IOC4",
|
|
.id_table = ioc4_id_table,
|
|
.probe = ioc4_probe,
|
|
.remove = ioc4_remove,
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, ioc4_id_table);
|
|
|
|
/*********************
|
|
* Module management *
|
|
*********************/
|
|
|
|
/* Module load */
|
|
static int __init
|
|
ioc4_init(void)
|
|
{
|
|
return pci_register_driver(&ioc4_driver);
|
|
}
|
|
|
|
/* Module unload */
|
|
static void __exit
|
|
ioc4_exit(void)
|
|
{
|
|
/* Ensure ioc4_load_modules() has completed before exiting */
|
|
flush_work(&ioc4_load_modules_work);
|
|
pci_unregister_driver(&ioc4_driver);
|
|
}
|
|
|
|
module_init(ioc4_init);
|
|
module_exit(ioc4_exit);
|
|
|
|
MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
|
|
MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL(ioc4_register_submodule);
|
|
EXPORT_SYMBOL(ioc4_unregister_submodule);
|