Claudiu Beznea 7efca37d31 ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh ... [ Upstream commit 7a94b83a7d ] On SAMA7G5, when resuming from backup and self-refresh, the bootloader performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored in RAM by Linux before going to backup and self-refresh). It has been discovered that the current procedure doesn't work for all possible values that might go to ZQ0SR0 due to hardware bug. The workaround to this is to avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0 register and cache its value in RAM after processing it (using modified_gray_code array). The bootloader will restore the processed value. Fixes: d2d4716d83 ("ARM: at91: pm: save ddr phy calibration data to securam") Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-09-15 10:47:14 +02:00
..
arc	clocksource/drivers/arc_timer: Eliminate redefined macro error	2021-10-16 22:15:01 +02:00
at91	ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh	2022-09-15 10:47:14 +02:00
bcm2835	firmware: raspberrypi: Add RPI_FIRMWARE_NOTIFY_DISPLAY_DONE	2022-01-11 13:16:10 +01:00
canaan	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
fsl	crypto: caam - add in-kernel interface for blob generator	2022-05-23 18:47:50 +03:00
imx	ARM: imx: Initialize SoC ID on i.MX50	2021-05-13 15:42:21 +08:00
mediatek	media: memory: mtk-smi: Get rid of mtk_smi_larb_get/put	2022-01-28 15:30:21 +01:00
microchip	soc: add microchip polarfire soc system controller	2022-02-25 12:50:59 +01:00
mscc	net: mscc: ocelot: make struct ocelot_stat_layout array indexable	2022-08-25 11:45:39 +02:00
qcom	soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS	2021-09-21 17:41:48 -05:00
rockchip	soc: rockchip: power-domain: Manage resource conflicts with firmware	2022-05-09 03:36:52 +09:00
sa1100
sifive	riscv: move sifive_l2_cache.h to include/soc	2020-01-12 10:12:44 -08:00
tegra	memory: tegra: Add MC error logging on Tegra186 onward	2022-05-09 10:46:14 +02:00