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52e6676ef5
Based on the normalized pattern:
this program is free software you can redistribute it and/or modify it
under the terms of the gnu general public license as published by the
free software foundation version 2 this program is distributed as is
without any warranty of any kind whether express or implied without
even the implied warranty of merchantability or fitness for a
particular purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
44 lines
1.8 KiB
C
44 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AM33XX PRM_XXX register bits
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#include "prm.h"
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#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17)
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#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6)
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#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
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#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
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#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
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#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
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#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
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#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
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#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24
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#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24)
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#define AM33XX_LOGICRETSTATE_MASK (1 << 2)
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#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3)
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#define AM33XX_LOGICSTATEST_SHIFT 2
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#define AM33XX_LOGICSTATEST_MASK (1 << 2)
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#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4
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#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4)
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#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18)
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#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22)
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#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6)
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#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20)
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#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23)
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#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8)
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#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16)
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#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24)
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#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4)
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#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25)
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#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29)
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#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17)
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#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30)
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#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27)
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#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21)
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#endif
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