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7c8de080d4
The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).
Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because:
1) Currently, only __kvm_riscv_hfence_gvma_all() and SBI
HFENCE calls are used to invalidate TLB.
2) All H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) that we tried till now were
conservatively flushing everything upon any HFENCE.GVMA
instruction.
This patch fixes GPA passed to __kvm_riscv_hfence_gvma_vmid_gpa()
and __kvm_riscv_hfence_gvma_gpa() functions.
Fixes: fd7bb4a251 ("RISC-V: KVM: Implement VMID allocator")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Message-Id: <20211026170136.2147619-4-anup.patel@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
74 lines
1.5 KiB
ArmAsm
74 lines
1.5 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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.text
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.altmacro
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.option norelax
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/*
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* Instruction encoding of hfence.gvma is:
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* HFENCE.GVMA rs1, rs2
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* HFENCE.GVMA zero, rs2
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* HFENCE.GVMA rs1
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* HFENCE.GVMA
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*
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* rs1!=zero and rs2!=zero ==> HFENCE.GVMA rs1, rs2
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* rs1==zero and rs2!=zero ==> HFENCE.GVMA zero, rs2
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* rs1!=zero and rs2==zero ==> HFENCE.GVMA rs1
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* rs1==zero and rs2==zero ==> HFENCE.GVMA
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*
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* Instruction encoding of HFENCE.GVMA is:
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* 0110001 rs2(5) rs1(5) 000 00000 1110011
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*/
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ENTRY(__kvm_riscv_hfence_gvma_vmid_gpa)
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/*
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* rs1 = a0 (GPA >> 2)
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* rs2 = a1 (VMID)
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* HFENCE.GVMA a0, a1
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* 0110001 01011 01010 000 00000 1110011
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*/
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.word 0x62b50073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_vmid_gpa)
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ENTRY(__kvm_riscv_hfence_gvma_vmid)
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/*
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* rs1 = zero
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* rs2 = a0 (VMID)
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* HFENCE.GVMA zero, a0
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* 0110001 01010 00000 000 00000 1110011
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*/
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.word 0x62a00073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_vmid)
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ENTRY(__kvm_riscv_hfence_gvma_gpa)
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/*
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* rs1 = a0 (GPA >> 2)
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* rs2 = zero
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* HFENCE.GVMA a0
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* 0110001 00000 01010 000 00000 1110011
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*/
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.word 0x62050073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_gpa)
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ENTRY(__kvm_riscv_hfence_gvma_all)
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/*
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* rs1 = zero
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* rs2 = zero
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* HFENCE.GVMA
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* 0110001 00000 00000 000 00000 1110011
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*/
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.word 0x62000073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_all)
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