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2bcd1c0cfc
Add support for the msi-address-64 property of a PCI node. This property
specifies the PCI address of MSIIR (message signaled interrupt index
register).
In commit 3da34aae ("powerpc/fsl: Support unique MSI addresses per PCIe Root
Complex"), the msi_addr_hi/msi_addr_lo fields of struct fsl_msi were redefined
from an actual address to just an offset, but the fields were not renamed
accordingly. These fields are replace with a single field, msiir_offset,
to reflect the new meaning.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
42 lines
1 KiB
C
42 lines
1 KiB
C
/*
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* Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Tony Li <tony.li@freescale.com>
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* Jason Jin <Jason.jin@freescale.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the
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* License.
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*
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*/
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#ifndef _POWERPC_SYSDEV_FSL_MSI_H
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#define _POWERPC_SYSDEV_FSL_MSI_H
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#include <asm/msi_bitmap.h>
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#define NR_MSI_REG 8
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#define IRQS_PER_MSI_REG 32
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#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG)
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#define FSL_PIC_IP_MASK 0x0000000F
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#define FSL_PIC_IP_MPIC 0x00000001
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#define FSL_PIC_IP_IPIC 0x00000002
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struct fsl_msi {
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struct irq_host *irqhost;
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unsigned long cascade_irq;
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u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
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void __iomem *msi_regs;
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u32 feature;
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int msi_virqs[NR_MSI_REG];
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struct msi_bitmap bitmap;
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struct list_head list; /* support multiple MSI banks */
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};
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#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
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