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![Anshuman Khandual](/assets/img/avatar_default.png)
Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is accessible via the system registers. The TRBE supports different addressing modes including CPU virtual address and buffer modes including the circular buffer mode. The TRBE buffer is addressed by a base pointer (TRBBASER_EL1), an write pointer (TRBPTR_EL1) and a limit pointer (TRBLIMITR_EL1). But the access to the trace buffer could be prohibited by a higher exception level (EL3 or EL2), indicated by TRBIDR_EL1.P. The TRBE can also generate a CPU private interrupt (PPI) on address translation errors and when the buffer is full. Overall implementation here is inspired from the Arm SPE driver. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> [ Mark the buffer truncated on WRAP event, error code cleanup ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-18-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
190 lines
7.5 KiB
Text
190 lines
7.5 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Coresight configuration
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#
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menuconfig CORESIGHT
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tristate "CoreSight Tracing Support"
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depends on ARM || ARM64
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depends on OF || ACPI
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select ARM_AMBA
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select PERF_EVENTS
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help
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This framework provides a kernel interface for the CoreSight debug
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and trace drivers to register themselves with. It's intended to build
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a topological view of the CoreSight components based on a DT
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specification and configure the right series of components when a
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trace source gets enabled.
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To compile this driver as a module, choose M here: the
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module will be called coresight.
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if CORESIGHT
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config CORESIGHT_LINKS_AND_SINKS
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tristate "CoreSight Link and Sink drivers"
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help
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This enables support for CoreSight link and sink drivers that are
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responsible for transporting and collecting the trace data
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respectively. Link and sinks are dynamically aggregated with a trace
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entity at run time to form a complete trace path.
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To compile these drivers as modules, choose M here: the
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modules will be called coresight-funnel and coresight-replicator.
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config CORESIGHT_LINK_AND_SINK_TMC
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tristate "Coresight generic TMC driver"
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depends on CORESIGHT_LINKS_AND_SINKS
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help
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This enables support for the Trace Memory Controller driver.
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Depending on its configuration the device can act as a link (embedded
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trace router - ETR) or sink (embedded trace FIFO). The driver
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complies with the generic implementation of the component without
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special enhancement or added features.
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To compile this driver as a module, choose M here: the
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module will be called coresight-tmc.
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config CORESIGHT_CATU
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tristate "Coresight Address Translation Unit (CATU) driver"
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depends on CORESIGHT_LINK_AND_SINK_TMC
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help
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Enable support for the Coresight Address Translation Unit (CATU).
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CATU supports a scatter gather table of 4K pages, with forward/backward
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lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
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buffer by translating the addresses used by ETR to the physical address
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by looking up the provided table. CATU can also be used in pass-through
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mode where the address is not translated.
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To compile this driver as a module, choose M here: the
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module will be called coresight-catu.
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config CORESIGHT_SINK_TPIU
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tristate "Coresight generic TPIU driver"
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depends on CORESIGHT_LINKS_AND_SINKS
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help
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This enables support for the Trace Port Interface Unit driver,
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responsible for bridging the gap between the on-chip coresight
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components and a trace for bridging the gap between the on-chip
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coresight components and a trace port collection engine, typically
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connected to an external host for use case capturing more traces than
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the on-board coresight memory can handle.
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To compile this driver as a module, choose M here: the
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module will be called coresight-tpiu.
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config CORESIGHT_SINK_ETBV10
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tristate "Coresight ETBv1.0 driver"
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depends on CORESIGHT_LINKS_AND_SINKS
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help
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This enables support for the Embedded Trace Buffer version 1.0 driver
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that complies with the generic implementation of the component without
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special enhancement or added features.
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To compile this driver as a module, choose M here: the
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module will be called coresight-etb10.
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config CORESIGHT_SOURCE_ETM3X
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tristate "CoreSight Embedded Trace Macrocell 3.x driver"
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depends on !ARM64
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select CORESIGHT_LINKS_AND_SINKS
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help
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This driver provides support for processor ETM3.x and PTM1.x modules,
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which allows tracing the instructions that a processor is executing
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This is primarily useful for instruction level tracing. Depending
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the ETM version data tracing may also be available.
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To compile this driver as a module, choose M here: the
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module will be called coresight-etm3x.
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config CORESIGHT_SOURCE_ETM4X
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tristate "CoreSight ETMv4.x / ETE driver"
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depends on ARM64
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select CORESIGHT_LINKS_AND_SINKS
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select PID_IN_CONTEXTIDR
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help
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This driver provides support for the CoreSight Embedded Trace Macrocell
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version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
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modules, tracing the instructions that a processor is executing. This is
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primarily useful for instruction level tracing.
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To compile this driver as a module, choose M here: the
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module will be called coresight-etm4x.
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config ETM4X_IMPDEF_FEATURE
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bool "Control implementation defined overflow support in ETM 4.x driver"
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depends on CORESIGHT_SOURCE_ETM4X
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help
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This control provides implementation define control for CoreSight
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ETM 4.x tracer module that can't reduce commit rate automatically.
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This avoids overflow between the ETM tracer module and the cpu core.
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config CORESIGHT_STM
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tristate "CoreSight System Trace Macrocell driver"
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depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
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select CORESIGHT_LINKS_AND_SINKS
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select STM
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help
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This driver provides support for hardware assisted software
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instrumentation based tracing. This is primarily used for
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logging useful software events or data coming from various entities
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in the system, possibly running different OSs
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To compile this driver as a module, choose M here: the
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module will be called coresight-stm.
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config CORESIGHT_CPU_DEBUG
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tristate "CoreSight CPU Debug driver"
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depends on ARM || ARM64
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depends on DEBUG_FS
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help
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This driver provides support for coresight debugging module. This
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is primarily used to dump sample-based profiling registers when
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system triggers panic, the driver will parse context registers so
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can quickly get to know program counter (PC), secure state,
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exception level, etc. Before use debugging functionality, platform
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needs to ensure the clock domain and power domain are enabled
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properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst
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for detailed description and the example for usage.
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To compile this driver as a module, choose M here: the
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module will be called coresight-cpu-debug.
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config CORESIGHT_CTI
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tristate "CoreSight Cross Trigger Interface (CTI) driver"
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depends on ARM || ARM64
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help
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This driver provides support for CoreSight CTI and CTM components.
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These provide hardware triggering events between CoreSight trace
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source and sink components. These can be used to halt trace or
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inject events into the trace stream. CTI also provides a software
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control to trigger the same halt events. This can provide fast trace
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halt compared to disabling sources and sinks normally in driver
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software.
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To compile this driver as a module, choose M here: the
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module will be called coresight-cti.
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config CORESIGHT_CTI_INTEGRATION_REGS
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bool "Access CTI CoreSight Integration Registers"
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depends on CORESIGHT_CTI
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help
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This option adds support for the CoreSight integration registers on
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this device. The integration registers allow the exploration of the
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CTI trigger connections between this and other devices.These
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registers are not used in normal operation and can leave devices in
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an inconsistent state.
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config CORESIGHT_TRBE
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tristate "Trace Buffer Extension (TRBE) driver"
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depends on ARM64 && CORESIGHT_SOURCE_ETM4X
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help
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This driver provides support for percpu Trace Buffer Extension (TRBE).
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TRBE always needs to be used along with it's corresponding percpu ETE
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component. ETE generates trace data which is then captured with TRBE.
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Unlike traditional sink devices, TRBE is a CPU feature accessible via
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system registers. But it's explicit dependency with trace unit (ETE)
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requires it to be plugged in as a coresight sink device.
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To compile this driver as a module, choose M here: the module will be
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called coresight-trbe.
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endif
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