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![Markus Elfring](/assets/img/avatar_default.png)
A local variable was used only within an else branch. Thus move the definition for the variable “cs_fwnode” into the corresponding code block. This issue was detected by using the Coccinelle software. Link: https://lore.kernel.org/r/c1b09b27-9012-324f-28d0-ba820dc468a5@web.de Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
490 lines
13 KiB
C
490 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019, The Linaro Limited. All rights reserved.
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*/
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#include <linux/coresight.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/property.h>
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#include <linux/slab.h>
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#include <dt-bindings/arm/coresight-cti-dt.h>
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#include "coresight-cti.h"
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#include "coresight-priv.h"
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/* Number of CTI signals in the v8 architecturally defined connection */
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#define NR_V8PE_IN_SIGS 2
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#define NR_V8PE_OUT_SIGS 3
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#define NR_V8ETM_INOUT_SIGS 4
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/* CTI device tree trigger connection node keyword */
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#define CTI_DT_CONNS "trig-conns"
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/* CTI device tree connection property keywords */
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#define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch"
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#define CTI_DT_CSDEV_ASSOC "arm,cs-dev-assoc"
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#define CTI_DT_TRIGIN_SIGS "arm,trig-in-sigs"
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#define CTI_DT_TRIGOUT_SIGS "arm,trig-out-sigs"
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#define CTI_DT_TRIGIN_TYPES "arm,trig-in-types"
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#define CTI_DT_TRIGOUT_TYPES "arm,trig-out-types"
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#define CTI_DT_FILTER_OUT_SIGS "arm,trig-filters"
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#define CTI_DT_CONN_NAME "arm,trig-conn-name"
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#define CTI_DT_CTM_ID "arm,cti-ctm-id"
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#ifdef CONFIG_OF
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/*
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* CTI can be bound to a CPU, or a system device.
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* CPU can be declared at the device top level or in a connections node
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* so need to check relative to node not device.
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*/
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static int of_cti_get_cpu_at_node(const struct device_node *node)
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{
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int cpu;
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struct device_node *dn;
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if (node == NULL)
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return -1;
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dn = of_parse_phandle(node, "cpu", 0);
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/* CTI affinity defaults to no cpu */
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if (!dn)
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return -1;
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cpu = of_cpu_node_to_id(dn);
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of_node_put(dn);
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/* No Affinity if no cpu nodes are found */
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return (cpu < 0) ? -1 : cpu;
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}
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#else
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static int of_cti_get_cpu_at_node(const struct device_node *node)
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{
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return -1;
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}
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#endif
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/*
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* CTI can be bound to a CPU, or a system device.
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* CPU can be declared at the device top level or in a connections node
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* so need to check relative to node not device.
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*/
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static int cti_plat_get_cpu_at_node(struct fwnode_handle *fwnode)
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{
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if (is_of_node(fwnode))
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return of_cti_get_cpu_at_node(to_of_node(fwnode));
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return -1;
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}
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const char *cti_plat_get_node_name(struct fwnode_handle *fwnode)
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{
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if (is_of_node(fwnode))
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return of_node_full_name(to_of_node(fwnode));
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return "unknown";
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}
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/*
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* Extract a name from the fwnode.
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* If the device associated with the node is a coresight_device, then return
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* that name and the coresight_device pointer, otherwise return the node name.
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*/
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static const char *
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cti_plat_get_csdev_or_node_name(struct fwnode_handle *fwnode,
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struct coresight_device **csdev)
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{
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const char *name = NULL;
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*csdev = coresight_find_csdev_by_fwnode(fwnode);
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if (*csdev)
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name = dev_name(&(*csdev)->dev);
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else
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name = cti_plat_get_node_name(fwnode);
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return name;
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}
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static bool cti_plat_node_name_eq(struct fwnode_handle *fwnode,
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const char *name)
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{
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if (is_of_node(fwnode))
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return of_node_name_eq(to_of_node(fwnode), name);
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return false;
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}
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static int cti_plat_create_v8_etm_connection(struct device *dev,
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struct cti_drvdata *drvdata)
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{
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int ret = -ENOMEM, i;
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struct fwnode_handle *root_fwnode, *cs_fwnode;
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const char *assoc_name = NULL;
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struct coresight_device *csdev;
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struct cti_trig_con *tc = NULL;
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root_fwnode = dev_fwnode(dev);
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if (IS_ERR_OR_NULL(root_fwnode))
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return -EINVAL;
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/* Can optionally have an etm node - return if not */
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cs_fwnode = fwnode_find_reference(root_fwnode, CTI_DT_CSDEV_ASSOC, 0);
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if (IS_ERR(cs_fwnode))
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return 0;
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/* allocate memory */
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tc = cti_allocate_trig_con(dev, NR_V8ETM_INOUT_SIGS,
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NR_V8ETM_INOUT_SIGS);
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if (!tc)
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goto create_v8_etm_out;
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/* build connection data */
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tc->con_in->used_mask = 0xF0; /* sigs <4,5,6,7> */
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tc->con_out->used_mask = 0xF0; /* sigs <4,5,6,7> */
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/*
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* The EXTOUT type signals from the ETM are connected to a set of input
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* triggers on the CTI, the EXTIN being connected to output triggers.
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*/
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for (i = 0; i < NR_V8ETM_INOUT_SIGS; i++) {
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tc->con_in->sig_types[i] = ETM_EXTOUT;
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tc->con_out->sig_types[i] = ETM_EXTIN;
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}
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/*
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* We look to see if the ETM coresight device associated with this
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* handle has been registered with the system - i.e. probed before
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* this CTI. If so csdev will be non NULL and we can use the device
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* name and pass the csdev to the connection entry function where
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* the association will be recorded.
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* If not, then simply record the name in the connection data, the
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* probing of the ETM will call into the CTI driver API to update the
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* association then.
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*/
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assoc_name = cti_plat_get_csdev_or_node_name(cs_fwnode, &csdev);
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ret = cti_add_connection_entry(dev, drvdata, tc, csdev, assoc_name);
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create_v8_etm_out:
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fwnode_handle_put(cs_fwnode);
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return ret;
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}
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/*
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* Create an architecturally defined v8 connection
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* must have a cpu, can have an ETM.
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*/
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static int cti_plat_create_v8_connections(struct device *dev,
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struct cti_drvdata *drvdata)
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{
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struct cti_device *cti_dev = &drvdata->ctidev;
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struct cti_trig_con *tc = NULL;
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int cpuid = 0;
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char cpu_name_str[16];
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int ret = -ENOMEM;
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/* Must have a cpu node */
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cpuid = cti_plat_get_cpu_at_node(dev_fwnode(dev));
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if (cpuid < 0) {
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dev_warn(dev,
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"ARM v8 architectural CTI connection: missing cpu\n");
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return -EINVAL;
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}
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cti_dev->cpu = cpuid;
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/* Allocate the v8 cpu connection memory */
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tc = cti_allocate_trig_con(dev, NR_V8PE_IN_SIGS, NR_V8PE_OUT_SIGS);
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if (!tc)
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goto of_create_v8_out;
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/* Set the v8 PE CTI connection data */
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tc->con_in->used_mask = 0x3; /* sigs <0 1> */
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tc->con_in->sig_types[0] = PE_DBGTRIGGER;
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tc->con_in->sig_types[1] = PE_PMUIRQ;
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tc->con_out->used_mask = 0x7; /* sigs <0 1 2 > */
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tc->con_out->sig_types[0] = PE_EDBGREQ;
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tc->con_out->sig_types[1] = PE_DBGRESTART;
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tc->con_out->sig_types[2] = PE_CTIIRQ;
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scnprintf(cpu_name_str, sizeof(cpu_name_str), "cpu%d", cpuid);
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ret = cti_add_connection_entry(dev, drvdata, tc, NULL, cpu_name_str);
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if (ret)
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goto of_create_v8_out;
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/* Create the v8 ETM associated connection */
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ret = cti_plat_create_v8_etm_connection(dev, drvdata);
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if (ret)
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goto of_create_v8_out;
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/* filter pe_edbgreq - PE trigout sig <0> */
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drvdata->config.trig_out_filter |= 0x1;
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of_create_v8_out:
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return ret;
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}
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static int cti_plat_check_v8_arch_compatible(struct device *dev)
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{
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struct fwnode_handle *fwnode = dev_fwnode(dev);
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if (is_of_node(fwnode))
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return of_device_is_compatible(to_of_node(fwnode),
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CTI_DT_V8ARCH_COMPAT);
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return 0;
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}
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static int cti_plat_count_sig_elements(const struct fwnode_handle *fwnode,
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const char *name)
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{
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int nr_elem = fwnode_property_count_u32(fwnode, name);
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return (nr_elem < 0 ? 0 : nr_elem);
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}
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static int cti_plat_read_trig_group(struct cti_trig_grp *tgrp,
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const struct fwnode_handle *fwnode,
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const char *grp_name)
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{
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int idx, err = 0;
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u32 *values;
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if (!tgrp->nr_sigs)
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return 0;
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values = kcalloc(tgrp->nr_sigs, sizeof(u32), GFP_KERNEL);
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if (!values)
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return -ENOMEM;
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err = fwnode_property_read_u32_array(fwnode, grp_name,
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values, tgrp->nr_sigs);
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if (!err) {
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/* set the signal usage mask */
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for (idx = 0; idx < tgrp->nr_sigs; idx++)
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tgrp->used_mask |= BIT(values[idx]);
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}
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kfree(values);
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return err;
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}
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static int cti_plat_read_trig_types(struct cti_trig_grp *tgrp,
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const struct fwnode_handle *fwnode,
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const char *type_name)
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{
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int items, err = 0, nr_sigs;
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u32 *values = NULL, i;
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/* allocate an array according to number of signals in connection */
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nr_sigs = tgrp->nr_sigs;
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if (!nr_sigs)
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return 0;
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/* see if any types have been included in the device description */
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items = cti_plat_count_sig_elements(fwnode, type_name);
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if (items > nr_sigs)
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return -EINVAL;
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/* need an array to store the values iff there are any */
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if (items) {
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values = kcalloc(items, sizeof(u32), GFP_KERNEL);
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if (!values)
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return -ENOMEM;
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err = fwnode_property_read_u32_array(fwnode, type_name,
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values, items);
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if (err)
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goto read_trig_types_out;
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}
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/*
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* Match type id to signal index, 1st type to 1st index etc.
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* If fewer types than signals default remainder to GEN_IO.
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*/
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for (i = 0; i < nr_sigs; i++) {
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if (i < items) {
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tgrp->sig_types[i] =
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values[i] < CTI_TRIG_MAX ? values[i] : GEN_IO;
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} else {
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tgrp->sig_types[i] = GEN_IO;
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}
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}
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read_trig_types_out:
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kfree(values);
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return err;
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}
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static int cti_plat_process_filter_sigs(struct cti_drvdata *drvdata,
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const struct fwnode_handle *fwnode)
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{
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struct cti_trig_grp *tg = NULL;
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int err = 0, nr_filter_sigs;
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nr_filter_sigs = cti_plat_count_sig_elements(fwnode,
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CTI_DT_FILTER_OUT_SIGS);
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if (nr_filter_sigs == 0)
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return 0;
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if (nr_filter_sigs > drvdata->config.nr_trig_max)
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return -EINVAL;
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tg = kzalloc(sizeof(*tg), GFP_KERNEL);
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if (!tg)
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return -ENOMEM;
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err = cti_plat_read_trig_group(tg, fwnode, CTI_DT_FILTER_OUT_SIGS);
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if (!err)
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drvdata->config.trig_out_filter |= tg->used_mask;
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kfree(tg);
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return err;
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}
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static int cti_plat_create_connection(struct device *dev,
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struct cti_drvdata *drvdata,
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struct fwnode_handle *fwnode)
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{
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struct cti_trig_con *tc = NULL;
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int cpuid = -1, err = 0;
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struct coresight_device *csdev = NULL;
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const char *assoc_name = "unknown";
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char cpu_name_str[16];
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int nr_sigs_in, nr_sigs_out;
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/* look to see how many in and out signals we have */
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nr_sigs_in = cti_plat_count_sig_elements(fwnode, CTI_DT_TRIGIN_SIGS);
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nr_sigs_out = cti_plat_count_sig_elements(fwnode, CTI_DT_TRIGOUT_SIGS);
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if ((nr_sigs_in > drvdata->config.nr_trig_max) ||
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(nr_sigs_out > drvdata->config.nr_trig_max))
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return -EINVAL;
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tc = cti_allocate_trig_con(dev, nr_sigs_in, nr_sigs_out);
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if (!tc)
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return -ENOMEM;
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/* look for the signals properties. */
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err = cti_plat_read_trig_group(tc->con_in, fwnode,
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CTI_DT_TRIGIN_SIGS);
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if (err)
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goto create_con_err;
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err = cti_plat_read_trig_types(tc->con_in, fwnode,
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CTI_DT_TRIGIN_TYPES);
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if (err)
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goto create_con_err;
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err = cti_plat_read_trig_group(tc->con_out, fwnode,
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CTI_DT_TRIGOUT_SIGS);
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if (err)
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goto create_con_err;
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err = cti_plat_read_trig_types(tc->con_out, fwnode,
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CTI_DT_TRIGOUT_TYPES);
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if (err)
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goto create_con_err;
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err = cti_plat_process_filter_sigs(drvdata, fwnode);
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if (err)
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goto create_con_err;
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/* read the connection name if set - may be overridden by later */
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fwnode_property_read_string(fwnode, CTI_DT_CONN_NAME, &assoc_name);
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/* associated cpu ? */
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cpuid = cti_plat_get_cpu_at_node(fwnode);
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if (cpuid >= 0) {
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drvdata->ctidev.cpu = cpuid;
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scnprintf(cpu_name_str, sizeof(cpu_name_str), "cpu%d", cpuid);
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assoc_name = cpu_name_str;
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} else {
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/* associated device ? */
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struct fwnode_handle *cs_fwnode = fwnode_find_reference(fwnode,
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CTI_DT_CSDEV_ASSOC,
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0);
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if (!IS_ERR(cs_fwnode)) {
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assoc_name = cti_plat_get_csdev_or_node_name(cs_fwnode,
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&csdev);
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fwnode_handle_put(cs_fwnode);
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}
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}
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/* set up a connection */
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err = cti_add_connection_entry(dev, drvdata, tc, csdev, assoc_name);
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create_con_err:
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return err;
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}
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static int cti_plat_create_impdef_connections(struct device *dev,
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struct cti_drvdata *drvdata)
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{
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int rc = 0;
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struct fwnode_handle *fwnode = dev_fwnode(dev);
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struct fwnode_handle *child = NULL;
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if (IS_ERR_OR_NULL(fwnode))
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return -EINVAL;
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fwnode_for_each_child_node(fwnode, child) {
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if (cti_plat_node_name_eq(child, CTI_DT_CONNS))
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rc = cti_plat_create_connection(dev, drvdata,
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child);
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if (rc != 0)
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break;
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}
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fwnode_handle_put(child);
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return rc;
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}
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/* get the hardware configuration & connection data. */
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static int cti_plat_get_hw_data(struct device *dev, struct cti_drvdata *drvdata)
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{
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int rc = 0;
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struct cti_device *cti_dev = &drvdata->ctidev;
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/* get any CTM ID - defaults to 0 */
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device_property_read_u32(dev, CTI_DT_CTM_ID, &cti_dev->ctm_id);
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/* check for a v8 architectural CTI device */
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if (cti_plat_check_v8_arch_compatible(dev))
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rc = cti_plat_create_v8_connections(dev, drvdata);
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else
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rc = cti_plat_create_impdef_connections(dev, drvdata);
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if (rc)
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return rc;
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/* if no connections, just add a single default based on max IN-OUT */
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if (cti_dev->nr_trig_con == 0)
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rc = cti_add_default_connection(dev, drvdata);
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return rc;
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}
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struct coresight_platform_data *
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coresight_cti_get_platform_data(struct device *dev)
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{
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int ret = -ENOENT;
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struct coresight_platform_data *pdata = NULL;
|
|
struct fwnode_handle *fwnode = dev_fwnode(dev);
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev);
|
|
|
|
if (IS_ERR_OR_NULL(fwnode))
|
|
goto error;
|
|
|
|
/*
|
|
* Alloc platform data but leave it zero init. CTI does not use the
|
|
* same connection infrastructuree as trace path components but an
|
|
* empty struct enables us to use the standard coresight component
|
|
* registration code.
|
|
*/
|
|
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
|
|
if (!pdata) {
|
|
ret = -ENOMEM;
|
|
goto error;
|
|
}
|
|
|
|
/* get some CTI specifics */
|
|
ret = cti_plat_get_hw_data(dev, drvdata);
|
|
|
|
if (!ret)
|
|
return pdata;
|
|
error:
|
|
return ERR_PTR(ret);
|
|
}
|