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![Jonathan Cameron](/assets/img/avatar_default.png)
The timestamp control has been a function implemented in the core of IIO for a long time, so this comment is incorrect and has clearly been cut and paste into all these drivers. The remainder of the comment added nothing and was confusing so dropped that as well. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Michael Hennerich <Michael.Hennerich@analog.com> Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com> Link: https://lore.kernel.org/r/20210401145410.226917-1-jic23@kernel.org
350 lines
8.4 KiB
C
350 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AD7887 SPI ADC driver
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*
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* Copyright 2010-2011 Analog Devices Inc.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/bitops.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/platform_data/ad7887.h>
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#define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
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#define AD7887_DUAL BIT(4) /* dual-channel mode */
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#define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
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#define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
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#define AD7887_PM_MODE1 0 /* CS based shutdown */
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#define AD7887_PM_MODE2 1 /* full on */
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#define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
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#define AD7887_PM_MODE4 3 /* standby mode */
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enum ad7887_channels {
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AD7887_CH0,
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AD7887_CH0_CH1,
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AD7887_CH1,
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};
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/**
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* struct ad7887_chip_info - chip specifc information
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* @int_vref_mv: the internal reference voltage
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* @channels: channels specification
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* @num_channels: number of channels
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* @dual_channels: channels specification in dual mode
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* @num_dual_channels: number of channels in dual mode
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*/
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struct ad7887_chip_info {
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u16 int_vref_mv;
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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const struct iio_chan_spec *dual_channels;
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unsigned int num_dual_channels;
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};
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struct ad7887_state {
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struct spi_device *spi;
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const struct ad7887_chip_info *chip_info;
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struct regulator *reg;
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struct spi_transfer xfer[4];
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struct spi_message msg[3];
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struct spi_message *ring_msg;
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unsigned char tx_cmd_buf[4];
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* Buffer needs to be large enough to hold two 16 bit samples and a
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* 64 bit aligned 64 bit timestamp.
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*/
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unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
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____cacheline_aligned;
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};
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enum ad7887_supported_device_ids {
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ID_AD7887
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};
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static int ad7887_ring_preenable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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/* We know this is a single long so can 'cheat' */
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switch (*indio_dev->active_scan_mask) {
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case (1 << 0):
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st->ring_msg = &st->msg[AD7887_CH0];
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break;
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case (1 << 1):
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st->ring_msg = &st->msg[AD7887_CH1];
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/* Dummy read: push CH1 setting down to hardware */
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spi_sync(st->spi, st->ring_msg);
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break;
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case ((1 << 1) | (1 << 0)):
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st->ring_msg = &st->msg[AD7887_CH0_CH1];
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break;
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}
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return 0;
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}
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static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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/* dummy read: restore default CH0 settin */
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return spi_sync(st->spi, &st->msg[AD7887_CH0]);
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}
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static irqreturn_t ad7887_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7887_state *st = iio_priv(indio_dev);
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int b_sent;
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b_sent = spi_sync(st->spi, st->ring_msg);
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if (b_sent)
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goto done;
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iio_push_to_buffers_with_timestamp(indio_dev, st->data,
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iio_get_time_ns(indio_dev));
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
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.preenable = &ad7887_ring_preenable,
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.postdisable = &ad7887_ring_postdisable,
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};
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static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
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{
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int ret = spi_sync(st->spi, &st->msg[ch]);
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if (ret)
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return ret;
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return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
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}
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static int ad7887_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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int ret;
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struct ad7887_state *st = iio_priv(indio_dev);
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = ad7887_scan_direct(st, chan->address);
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iio_device_release_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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*val = ret >> chan->scan_type.shift;
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*val &= GENMASK(chan->scan_type.realbits - 1, 0);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (st->reg) {
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*val = regulator_get_voltage(st->reg);
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if (*val < 0)
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return *val;
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*val /= 1000;
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} else {
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*val = st->chip_info->int_vref_mv;
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}
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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#define AD7887_CHANNEL(x) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (x), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.address = (x), \
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.scan_index = (x), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 12, \
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.storagebits = 16, \
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.shift = 0, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec ad7887_channels[] = {
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AD7887_CHANNEL(0),
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IIO_CHAN_SOFT_TIMESTAMP(1),
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};
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static const struct iio_chan_spec ad7887_dual_channels[] = {
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AD7887_CHANNEL(0),
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AD7887_CHANNEL(1),
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IIO_CHAN_SOFT_TIMESTAMP(2),
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};
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static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
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/*
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* More devices added in future
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*/
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[ID_AD7887] = {
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.channels = ad7887_channels,
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.num_channels = ARRAY_SIZE(ad7887_channels),
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.dual_channels = ad7887_dual_channels,
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.num_dual_channels = ARRAY_SIZE(ad7887_dual_channels),
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.int_vref_mv = 2500,
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},
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};
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static const struct iio_info ad7887_info = {
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.read_raw = &ad7887_read_raw,
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};
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static void ad7887_reg_disable(void *data)
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{
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struct regulator *reg = data;
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regulator_disable(reg);
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}
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static int ad7887_probe(struct spi_device *spi)
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{
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struct ad7887_platform_data *pdata = spi->dev.platform_data;
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struct ad7887_state *st;
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struct iio_dev *indio_dev;
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uint8_t mode;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->reg = devm_regulator_get_optional(&spi->dev, "vref");
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if (IS_ERR(st->reg)) {
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if (PTR_ERR(st->reg) != -ENODEV)
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return PTR_ERR(st->reg);
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st->reg = NULL;
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}
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if (st->reg) {
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ret = regulator_enable(st->reg);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(&spi->dev, ad7887_reg_disable, st->reg);
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if (ret)
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return ret;
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}
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st->chip_info =
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&ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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spi_set_drvdata(spi, indio_dev);
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st->spi = spi;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->info = &ad7887_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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/* Setup default message */
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mode = AD7887_PM_MODE4;
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if (!st->reg)
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mode |= AD7887_REF_DIS;
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if (pdata && pdata->en_dual)
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mode |= AD7887_DUAL;
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st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
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st->xfer[0].rx_buf = &st->data[0];
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st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
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st->xfer[0].len = 2;
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spi_message_init(&st->msg[AD7887_CH0]);
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spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
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if (pdata && pdata->en_dual) {
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st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
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st->xfer[1].rx_buf = &st->data[0];
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st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
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st->xfer[1].len = 2;
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st->xfer[2].rx_buf = &st->data[2];
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st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
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st->xfer[2].len = 2;
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spi_message_init(&st->msg[AD7887_CH0_CH1]);
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spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
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spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
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st->xfer[3].rx_buf = &st->data[2];
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st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
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st->xfer[3].len = 2;
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spi_message_init(&st->msg[AD7887_CH1]);
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spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
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indio_dev->channels = st->chip_info->dual_channels;
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indio_dev->num_channels = st->chip_info->num_dual_channels;
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} else {
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indio_dev->channels = st->chip_info->channels;
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indio_dev->num_channels = st->chip_info->num_channels;
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}
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ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
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&iio_pollfunc_store_time,
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&ad7887_trigger_handler, &ad7887_ring_setup_ops);
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if (ret)
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return ret;
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct spi_device_id ad7887_id[] = {
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{"ad7887", ID_AD7887},
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{}
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};
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MODULE_DEVICE_TABLE(spi, ad7887_id);
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static struct spi_driver ad7887_driver = {
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.driver = {
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.name = "ad7887",
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},
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.probe = ad7887_probe,
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.id_table = ad7887_id,
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};
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module_spi_driver(ad7887_driver);
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MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
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MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
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MODULE_LICENSE("GPL v2");
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