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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
Usual mixed bag of new drivers / device support + cleanups etc with the addition of a fairly big set of yaml conversions. Txt to yaml format conversions. In some cases dropped separate binding and moved to trivial devices (drop). Listed by manufacturer - dht11 temperature(drop) - adi,ad2s90 adi,ad5272 adi,ad5592r adi,ad5758 adi,ad5933 adi,ad7303 adi,adis16480 adi,adf4350 - ams,as3935 - asahi-kasei,ak8974 - atmel,sama5d2-adc - avago,apds9300 avago,apds9960 - bosch,bma180 bosch,bmc150_magn bosch,bme680 bosch,bmg180 - brcm,iproc-static-adc - capella,cm36651 - domintech,dmard06(drop) - fsl,mag3110 fsl,mma8452 fsl,vf610-dac - hoperf,hp03 - honeywell,hmc5843 - kionix,kxcjk1013 - maxim,ds1803(drop) maxim,ds4424 maxim,max30100 maxim,max30102 maxim,max31856 maxim,max31855k maxim,max44009 maxim,max5481 maxim,max5821 - meas,htu21(drop) meas,ms5367(drop) meas,ms5611 meas,tsys01(drop) - mediatek,mt2701-auxadc - melexis,mlx90614 melexis,mlx90632 - memsic,mmc35240(drop) - microchip,mcp41010 microchip,mcp4131 microchip,mcp4725 - murata,zap2326 - nxp,fxas21002c nxp,lpc1850-dac - pni,rm3100 - qcom,pm8018-adc qcom,spmi-iadc - renesas,isl29501 renesas,rcar-gyroadc - samsung,sensorhub-rinato - sensiron,sgp30 - sentech,sx9500 - sharp,gp2ap020a00f - st,hts221 st,lsm6dsx st,st-sensors(many!) st,uvis25 st,vcl53l0x st,vl6180 - ti,adc084s021 ti,ads124s08 ti,dac5571 ti,dac7311 ti,dac7512 ti,dac7612 ti,hdc1000(drop) ti,palmas-gpadc ti,opt3001 ti,tmp07 - upisemi,us51882 - vishay,vcnl4035 - x-powers,axp209 New device support * adi,ad5685 - Add support for AD5338R dual output 10-bit DAC - Add DT-binding doc. * mediatek,mt6360 - New driver for this SoC ADC with bindings and using new channel label support in the IIO core. * st,lsm6dsx - Add support for LSM6DST Core: * Add "label" to device channels, provided via a new core callback. Including DT docs for when that is the source, and ABI docs. * Add devm_iio_triggered_buffer_setup_ext to take extra attributes. * dmaengine, unwrap use of iio_buffer_set_attrs() * Drop iio_buffer_set_attrs() * Centralize ioctl call handling. Later fix to ensure -EINVAL returned if no handler has run. * Fix an issue with IIO_VAL_FRACTIONAL and negative values - doesn't affect any known existing drivers, but will impact a future one. * kernel-doc fix in trigger.h * file-ops ordering cleanup Features * semtech,sx9310 - Add control of hardware gain, proximity thresholds, hysteresis and debounce. - Increase what information on hardware configuration can be provided via DT. Cleanup and minor features * adi,ad5685 - Add of_match_table * adi,ad7292 - Drop pointless spi_set_drvdata() call * adi,ad7298 - Drop platform data and tidy up external reference config. * adi,ad7303 - Drop platform data handling as unused. * adi,ad7768 - Add new label attribute for channels provided from dt. * adi,ad7887 - devm_ usage in probe simplifying remove and error handling. * adi,adis16201 - Drop pointless spi_set_drvdata() call * adi,adis16209 - Drop pointless spi_set_drvdata() call * adi,adis16240 - White space fixup * adi,adxl372 - use new devm_iio_triggered-buffer_setup_ext() * amlogic,meson-saradc - Drop pointless semicolon. * amstaos,tsl2563 - Put back i2c_device_id table as needed for greybus probing. * atmel,at91_adc - Use of_device_get_match_data() instead of open coding it. - Constify some driver data - Add KCONFIG dep on CONFIG_OF and drop of_match_ptr() - Drop platform data as mostly dead code. - Tidy up reference voltage logic * atmel-sama5d2 - Drop a pointless semicolon - Merge buffer and trigger init into a separate function - Use new devm_iio_triggered_buff_setup_ext() * avago,apds9960 - Drop a pointless semicolon * bosch,bmc150 - Drop a pointless semicolon - Use new iio_triggered_buffer_setup_ext() * bosch,bmp280 - Drop a pointless semicolon * fsl,mma8452 - Constification * (google),cros_ec - Use new devm_iio_triggered_buffer_setup_ext() * hid-sensors - Use new iio_triggered_buffer_setup_ext() * ingenic,adc - Drop a pointless semicolon * invensense,icm426xx - Fix MAINTAINERS entry missing : * mediatek,mt6577_audxac - Add binding doc for mt8516 compatible with mt8173 * motorola,cpcap-adc - Fix an implicit fallthrough marking that clang needs to avoid warning. * samsung,exynos-adc - Stop relying on users counter form input device in ISR. * st,lsm6dsx - add vdd and vddio regulator control (including binding update) * st,stm32-adc - Tidy up code for dma transfers. - Adapt clock duty cycle for proper functioning. Note no known problems with existing boards. * st,vl53l0x-i2c - Put back i2c_device_id table as needed for greybus probing. * vishay,vcnl4035 - Put back i2c_device_id table as needed for greybus probing. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAl+8H3IRHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FogLLA//cE+rUI0ztkE5KD1DY5mu8dy3GotLJe2y kVlYao/8H4n3qL9Sm+i47v7pZZfB6UH5jaPa3BqXcGU3HaBaTSza5VhP/hDyfpgD Nt46UyE0FxcNEpwqiiyVuVFFx9ifUOayzKwL9ckyPs7n1X6ecZA+sPdmSQLmFzoZ IYDR148UxlAr33j7DVF1DLiIdObCIpNc3pn7YDflT/NnXvRY2XgIjqeOiPbldVgm 8nGgeSQXTyYBKaSyv6seE2qaxyDAhjkz7SVOidWZxPgMjiJJmpRdL3yCn2wVCCCy eLh9Ez0zPhywOhsRImICZ9ds0+Wq1Ke2kVqo0N8FJtB+JVZig+R1ElTaUKhES7B2 zKW1PR3nknP2oo3LWoXL6QR4vm0RcasRYnE2Qmtv6y04Hv3vbdyx6ZW+WCwrlsM8 fCxHV/m/NN4piTHEFFFkW912GMZM4XqnJ/H4bLd4oA+HP/2vzMuzdBLKZPZRdYYf Xd2YTF+iyNYlbN+ZLDd9840cAcKabPsd+ptaJh7lb0MUPPcv5qukhwIBs1/vqrE6 9/AnJ/Wj/oQZoDbcrgnMVoRn8dxqnQkd883sxiHZAvztEn1CQ9dDyUfKlHHB5BOD GhtrEyMn87VWM19yqArW/3ZU7dPBbXHkzlw6FQ67gIYbqaCRwfRi26FCJh0C6Kzi auCmjubaALo= =kkcj -----END PGP SIGNATURE----- Merge tag 'iio-for-5.11a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: First set of new device support, features and cleanups for IIO in the 5.11 cycle Usual mixed bag of new drivers / device support + cleanups etc with the addition of a fairly big set of yaml conversions. Txt to yaml format conversions. In some cases dropped separate binding and moved to trivial devices (drop). Listed by manufacturer - dht11 temperature(drop) - adi,ad2s90 adi,ad5272 adi,ad5592r adi,ad5758 adi,ad5933 adi,ad7303 adi,adis16480 adi,adf4350 - ams,as3935 - asahi-kasei,ak8974 - atmel,sama5d2-adc - avago,apds9300 avago,apds9960 - bosch,bma180 bosch,bmc150_magn bosch,bme680 bosch,bmg180 - brcm,iproc-static-adc - capella,cm36651 - domintech,dmard06(drop) - fsl,mag3110 fsl,mma8452 fsl,vf610-dac - hoperf,hp03 - honeywell,hmc5843 - kionix,kxcjk1013 - maxim,ds1803(drop) maxim,ds4424 maxim,max30100 maxim,max30102 maxim,max31856 maxim,max31855k maxim,max44009 maxim,max5481 maxim,max5821 - meas,htu21(drop) meas,ms5367(drop) meas,ms5611 meas,tsys01(drop) - mediatek,mt2701-auxadc - melexis,mlx90614 melexis,mlx90632 - memsic,mmc35240(drop) - microchip,mcp41010 microchip,mcp4131 microchip,mcp4725 - murata,zap2326 - nxp,fxas21002c nxp,lpc1850-dac - pni,rm3100 - qcom,pm8018-adc qcom,spmi-iadc - renesas,isl29501 renesas,rcar-gyroadc - samsung,sensorhub-rinato - sensiron,sgp30 - sentech,sx9500 - sharp,gp2ap020a00f - st,hts221 st,lsm6dsx st,st-sensors(many!) st,uvis25 st,vcl53l0x st,vl6180 - ti,adc084s021 ti,ads124s08 ti,dac5571 ti,dac7311 ti,dac7512 ti,dac7612 ti,hdc1000(drop) ti,palmas-gpadc ti,opt3001 ti,tmp07 - upisemi,us51882 - vishay,vcnl4035 - x-powers,axp209 New device support * adi,ad5685 - Add support for AD5338R dual output 10-bit DAC - Add DT-binding doc. * mediatek,mt6360 - New driver for this SoC ADC with bindings and using new channel label support in the IIO core. * st,lsm6dsx - Add support for LSM6DST Core: * Add "label" to device channels, provided via a new core callback. Including DT docs for when that is the source, and ABI docs. * Add devm_iio_triggered_buffer_setup_ext to take extra attributes. * dmaengine, unwrap use of iio_buffer_set_attrs() * Drop iio_buffer_set_attrs() * Centralize ioctl call handling. Later fix to ensure -EINVAL returned if no handler has run. * Fix an issue with IIO_VAL_FRACTIONAL and negative values - doesn't affect any known existing drivers, but will impact a future one. * kernel-doc fix in trigger.h * file-ops ordering cleanup Features * semtech,sx9310 - Add control of hardware gain, proximity thresholds, hysteresis and debounce. - Increase what information on hardware configuration can be provided via DT. Cleanup and minor features * adi,ad5685 - Add of_match_table * adi,ad7292 - Drop pointless spi_set_drvdata() call * adi,ad7298 - Drop platform data and tidy up external reference config. * adi,ad7303 - Drop platform data handling as unused. * adi,ad7768 - Add new label attribute for channels provided from dt. * adi,ad7887 - devm_ usage in probe simplifying remove and error handling. * adi,adis16201 - Drop pointless spi_set_drvdata() call * adi,adis16209 - Drop pointless spi_set_drvdata() call * adi,adis16240 - White space fixup * adi,adxl372 - use new devm_iio_triggered-buffer_setup_ext() * amlogic,meson-saradc - Drop pointless semicolon. * amstaos,tsl2563 - Put back i2c_device_id table as needed for greybus probing. * atmel,at91_adc - Use of_device_get_match_data() instead of open coding it. - Constify some driver data - Add KCONFIG dep on CONFIG_OF and drop of_match_ptr() - Drop platform data as mostly dead code. - Tidy up reference voltage logic * atmel-sama5d2 - Drop a pointless semicolon - Merge buffer and trigger init into a separate function - Use new devm_iio_triggered_buff_setup_ext() * avago,apds9960 - Drop a pointless semicolon * bosch,bmc150 - Drop a pointless semicolon - Use new iio_triggered_buffer_setup_ext() * bosch,bmp280 - Drop a pointless semicolon * fsl,mma8452 - Constification * (google),cros_ec - Use new devm_iio_triggered_buffer_setup_ext() * hid-sensors - Use new iio_triggered_buffer_setup_ext() * ingenic,adc - Drop a pointless semicolon * invensense,icm426xx - Fix MAINTAINERS entry missing : * mediatek,mt6577_audxac - Add binding doc for mt8516 compatible with mt8173 * motorola,cpcap-adc - Fix an implicit fallthrough marking that clang needs to avoid warning. * samsung,exynos-adc - Stop relying on users counter form input device in ISR. * st,lsm6dsx - add vdd and vddio regulator control (including binding update) * st,stm32-adc - Tidy up code for dma transfers. - Adapt clock duty cycle for proper functioning. Note no known problems with existing boards. * st,vl53l0x-i2c - Put back i2c_device_id table as needed for greybus probing. * vishay,vcnl4035 - Put back i2c_device_id table as needed for greybus probing. * tag 'iio-for-5.11a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (126 commits) dt-bindings:iio:adc:x-powers,axp209-adc: txt to yaml conversion dt-bindings:iio:adc:renesas,rcar-gyroadc: txt to yaml conversion. dt-bindings:iio:adc:atmel,sama5d2-adc: txt to yaml conversion dt-bindings:iio:magnetometer:pni,rm3100: txt to yaml conversion. dt-bindings:iio:magnetometer:honeywell,hmc5843: txt to yaml format conversion dt-bindings:iio:magnetometer:bosch,bmc150_magn: txt to yaml conversion. dt-bindings:iio:magnetometer:asahi-kasei,ak8974: txt to yaml format conversion dt-bindings:iio:magnetometer:fsl,mag3110: txt to yaml conversion dt-bindings:iio:light:st,vl6180: txt to yaml format conversion. dt-bindings:iio:light:vishay,vcnl4035: txt to yaml conversion dt-bindings:iio:light:st,uvis25: txt to yaml conversion for this UV sensor dt-bindings:iio:light:upisemi,us51882: txt to yaml conversion. dt-bindings:iio:light:ti,opt3001: txt to yaml conversion dt-bindings:iio:light:maxim,max44009: txt to yaml conversion. dt-bindings:iio:light:sharp,gp2ap020a00f: txt to yaml conversion. dt-bindings:iio:light:capella,cm36651: txt to yaml conversion. dt-bindings:iio:light:avago,apds9960: txt to yaml conversion dt-bindings:iio:light:avago,apds9300: txt to yaml conversion. dt-bindings:iio:imu:st,lsm6dsx: txt to yaml conversion dt-bindings:iio:imu:adi,adis16480: txt to yaml conversion ...
848 lines
22 KiB
C
848 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ADC driver for the Ingenic JZ47xx SoCs
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* Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
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*
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* based on drivers/mfd/jz4740-adc.c
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*/
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#include <dt-bindings/iio/adc/ingenic,adc.h>
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#include <linux/clk.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#define JZ_ADC_REG_ENABLE 0x00
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#define JZ_ADC_REG_CFG 0x04
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#define JZ_ADC_REG_CTRL 0x08
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#define JZ_ADC_REG_STATUS 0x0c
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#define JZ_ADC_REG_ADSAME 0x10
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#define JZ_ADC_REG_ADWAIT 0x14
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#define JZ_ADC_REG_ADTCH 0x18
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#define JZ_ADC_REG_ADBDAT 0x1c
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#define JZ_ADC_REG_ADSDAT 0x20
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#define JZ_ADC_REG_ADCMD 0x24
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#define JZ_ADC_REG_ADCLK 0x28
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#define JZ_ADC_REG_ENABLE_PD BIT(7)
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#define JZ_ADC_REG_CFG_AUX_MD (BIT(0) | BIT(1))
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#define JZ_ADC_REG_CFG_BAT_MD BIT(4)
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#define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10)
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#define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16)
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#define JZ_ADC_REG_CFG_CMD_SEL BIT(22)
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#define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10))
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#define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0
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#define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16
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#define JZ4770_ADC_REG_ADCLK_CLKDIV10US_LSB 8
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#define JZ4770_ADC_REG_ADCLK_CLKDIVMS_LSB 16
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#define JZ_ADC_REG_ADCMD_YNADC BIT(7)
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#define JZ_ADC_REG_ADCMD_YPADC BIT(8)
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#define JZ_ADC_REG_ADCMD_XNADC BIT(9)
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#define JZ_ADC_REG_ADCMD_XPADC BIT(10)
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#define JZ_ADC_REG_ADCMD_VREFPYP BIT(11)
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#define JZ_ADC_REG_ADCMD_VREFPXP BIT(12)
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#define JZ_ADC_REG_ADCMD_VREFPXN BIT(13)
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#define JZ_ADC_REG_ADCMD_VREFPAUX BIT(14)
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#define JZ_ADC_REG_ADCMD_VREFPVDD33 BIT(15)
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#define JZ_ADC_REG_ADCMD_VREFNYN BIT(16)
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#define JZ_ADC_REG_ADCMD_VREFNXP BIT(17)
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#define JZ_ADC_REG_ADCMD_VREFNXN BIT(18)
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#define JZ_ADC_REG_ADCMD_VREFAUX BIT(19)
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#define JZ_ADC_REG_ADCMD_YNGRU BIT(20)
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#define JZ_ADC_REG_ADCMD_XNGRU BIT(21)
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#define JZ_ADC_REG_ADCMD_XPGRU BIT(22)
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#define JZ_ADC_REG_ADCMD_YPSUP BIT(23)
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#define JZ_ADC_REG_ADCMD_XNSUP BIT(24)
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#define JZ_ADC_REG_ADCMD_XPSUP BIT(25)
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#define JZ_ADC_AUX_VREF 3300
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#define JZ_ADC_AUX_VREF_BITS 12
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#define JZ_ADC_BATTERY_LOW_VREF 2500
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#define JZ_ADC_BATTERY_LOW_VREF_BITS 12
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#define JZ4725B_ADC_BATTERY_HIGH_VREF 7500
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#define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10
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#define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986)
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#define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12
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#define JZ4770_ADC_BATTERY_VREF 1200
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#define JZ4770_ADC_BATTERY_VREF_BITS 12
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#define JZ_ADC_IRQ_AUX BIT(0)
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#define JZ_ADC_IRQ_BATTERY BIT(1)
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#define JZ_ADC_IRQ_TOUCH BIT(2)
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#define JZ_ADC_IRQ_PEN_DOWN BIT(3)
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#define JZ_ADC_IRQ_PEN_UP BIT(4)
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#define JZ_ADC_IRQ_PEN_DOWN_SLEEP BIT(5)
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#define JZ_ADC_IRQ_SLEEP BIT(7)
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struct ingenic_adc;
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struct ingenic_adc_soc_data {
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unsigned int battery_high_vref;
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unsigned int battery_high_vref_bits;
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const int *battery_raw_avail;
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size_t battery_raw_avail_size;
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const int *battery_scale_avail;
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size_t battery_scale_avail_size;
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unsigned int battery_vref_mode: 1;
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unsigned int has_aux2: 1;
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
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};
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struct ingenic_adc {
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void __iomem *base;
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struct clk *clk;
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struct mutex lock;
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struct mutex aux_lock;
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const struct ingenic_adc_soc_data *soc_data;
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bool low_vref_mode;
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};
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static void ingenic_adc_set_adcmd(struct iio_dev *iio_dev, unsigned long mask)
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{
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struct ingenic_adc *adc = iio_priv(iio_dev);
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mutex_lock(&adc->lock);
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/* Init ADCMD */
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readl(adc->base + JZ_ADC_REG_ADCMD);
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if (mask & 0x3) {
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/* Second channel (INGENIC_ADC_TOUCH_YP): sample YP vs. GND */
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writel(JZ_ADC_REG_ADCMD_XNGRU
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| JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_YPADC,
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adc->base + JZ_ADC_REG_ADCMD);
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/* First channel (INGENIC_ADC_TOUCH_XP): sample XP vs. GND */
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writel(JZ_ADC_REG_ADCMD_YNGRU
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| JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_XPADC,
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adc->base + JZ_ADC_REG_ADCMD);
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}
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if (mask & 0xc) {
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/* Fourth channel (INGENIC_ADC_TOUCH_YN): sample YN vs. GND */
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writel(JZ_ADC_REG_ADCMD_XNGRU
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| JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_YNADC,
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adc->base + JZ_ADC_REG_ADCMD);
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/* Third channel (INGENIC_ADC_TOUCH_XN): sample XN vs. GND */
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writel(JZ_ADC_REG_ADCMD_YNGRU
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| JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_XNADC,
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adc->base + JZ_ADC_REG_ADCMD);
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}
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if (mask & 0x30) {
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/* Sixth channel (INGENIC_ADC_TOUCH_YD): sample YP vs. YN */
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writel(JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_YPADC,
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adc->base + JZ_ADC_REG_ADCMD);
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/* Fifth channel (INGENIC_ADC_TOUCH_XD): sample XP vs. XN */
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writel(JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
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| JZ_ADC_REG_ADCMD_XPADC,
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adc->base + JZ_ADC_REG_ADCMD);
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}
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/* We're done */
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writel(0, adc->base + JZ_ADC_REG_ADCMD);
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mutex_unlock(&adc->lock);
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}
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static void ingenic_adc_set_config(struct ingenic_adc *adc,
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uint32_t mask,
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uint32_t val)
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{
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uint32_t cfg;
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mutex_lock(&adc->lock);
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cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
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cfg |= val;
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writel(cfg, adc->base + JZ_ADC_REG_CFG);
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mutex_unlock(&adc->lock);
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}
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static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
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int engine,
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bool enabled)
|
|
{
|
|
u8 val;
|
|
|
|
val = readb(adc->base + JZ_ADC_REG_ENABLE);
|
|
|
|
if (enabled)
|
|
val |= BIT(engine);
|
|
else
|
|
val &= ~BIT(engine);
|
|
|
|
writeb(val, adc->base + JZ_ADC_REG_ENABLE);
|
|
}
|
|
|
|
static void ingenic_adc_enable(struct ingenic_adc *adc,
|
|
int engine,
|
|
bool enabled)
|
|
{
|
|
mutex_lock(&adc->lock);
|
|
ingenic_adc_enable_unlocked(adc, engine, enabled);
|
|
mutex_unlock(&adc->lock);
|
|
}
|
|
|
|
static int ingenic_adc_capture(struct ingenic_adc *adc,
|
|
int engine)
|
|
{
|
|
u32 cfg;
|
|
u8 val;
|
|
int ret;
|
|
|
|
/*
|
|
* Disable CMD_SEL temporarily, because it causes wrong VBAT readings,
|
|
* probably due to the switch of VREF. We must keep the lock here to
|
|
* avoid races with the buffer enable/disable functions.
|
|
*/
|
|
mutex_lock(&adc->lock);
|
|
cfg = readl(adc->base + JZ_ADC_REG_CFG);
|
|
writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
|
|
|
|
ingenic_adc_enable_unlocked(adc, engine, true);
|
|
ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,
|
|
!(val & BIT(engine)), 250, 1000);
|
|
if (ret)
|
|
ingenic_adc_enable_unlocked(adc, engine, false);
|
|
|
|
writel(cfg, adc->base + JZ_ADC_REG_CFG);
|
|
mutex_unlock(&adc->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
int val,
|
|
int val2,
|
|
long m)
|
|
{
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
struct device *dev = iio_dev->dev.parent;
|
|
int ret;
|
|
|
|
switch (m) {
|
|
case IIO_CHAN_INFO_SCALE:
|
|
switch (chan->channel) {
|
|
case INGENIC_ADC_BATTERY:
|
|
if (!adc->soc_data->battery_vref_mode)
|
|
return -EINVAL;
|
|
|
|
ret = clk_enable(adc->clk);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable clock: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
if (val > JZ_ADC_BATTERY_LOW_VREF) {
|
|
ingenic_adc_set_config(adc,
|
|
JZ_ADC_REG_CFG_BAT_MD,
|
|
0);
|
|
adc->low_vref_mode = false;
|
|
} else {
|
|
ingenic_adc_set_config(adc,
|
|
JZ_ADC_REG_CFG_BAT_MD,
|
|
JZ_ADC_REG_CFG_BAT_MD);
|
|
adc->low_vref_mode = true;
|
|
}
|
|
|
|
clk_disable(adc->clk);
|
|
|
|
return 0;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static const int jz4725b_adc_battery_raw_avail[] = {
|
|
0, 1, (1 << JZ_ADC_BATTERY_LOW_VREF_BITS) - 1,
|
|
};
|
|
|
|
static const int jz4725b_adc_battery_scale_avail[] = {
|
|
JZ4725B_ADC_BATTERY_HIGH_VREF, JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,
|
|
JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS,
|
|
};
|
|
|
|
static const int jz4740_adc_battery_raw_avail[] = {
|
|
0, 1, (1 << JZ_ADC_BATTERY_LOW_VREF_BITS) - 1,
|
|
};
|
|
|
|
static const int jz4740_adc_battery_scale_avail[] = {
|
|
JZ4740_ADC_BATTERY_HIGH_VREF, JZ4740_ADC_BATTERY_HIGH_VREF_BITS,
|
|
JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS,
|
|
};
|
|
|
|
static const int jz4770_adc_battery_raw_avail[] = {
|
|
0, 1, (1 << JZ4770_ADC_BATTERY_VREF_BITS) - 1,
|
|
};
|
|
|
|
static const int jz4770_adc_battery_scale_avail[] = {
|
|
JZ4770_ADC_BATTERY_VREF, JZ4770_ADC_BATTERY_VREF_BITS,
|
|
};
|
|
|
|
static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
|
|
{
|
|
struct clk *parent_clk;
|
|
unsigned long parent_rate, rate;
|
|
unsigned int div_main, div_10us;
|
|
|
|
parent_clk = clk_get_parent(adc->clk);
|
|
if (!parent_clk) {
|
|
dev_err(dev, "ADC clock has no parent\n");
|
|
return -ENODEV;
|
|
}
|
|
parent_rate = clk_get_rate(parent_clk);
|
|
|
|
/*
|
|
* The JZ4725B ADC works at 500 kHz to 8 MHz.
|
|
* We pick the highest rate possible.
|
|
* In practice we typically get 6 MHz, half of the 12 MHz EXT clock.
|
|
*/
|
|
div_main = DIV_ROUND_UP(parent_rate, 8000000);
|
|
div_main = clamp(div_main, 1u, 64u);
|
|
rate = parent_rate / div_main;
|
|
if (rate < 500000 || rate > 8000000) {
|
|
dev_err(dev, "No valid divider for ADC main clock\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* We also need a divider that produces a 10us clock. */
|
|
div_10us = DIV_ROUND_UP(rate, 100000);
|
|
|
|
writel(((div_10us - 1) << JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB) |
|
|
(div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB,
|
|
adc->base + JZ_ADC_REG_ADCLK);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
|
|
{
|
|
struct clk *parent_clk;
|
|
unsigned long parent_rate, rate;
|
|
unsigned int div_main, div_ms, div_10us;
|
|
|
|
parent_clk = clk_get_parent(adc->clk);
|
|
if (!parent_clk) {
|
|
dev_err(dev, "ADC clock has no parent\n");
|
|
return -ENODEV;
|
|
}
|
|
parent_rate = clk_get_rate(parent_clk);
|
|
|
|
/*
|
|
* The JZ4770 ADC works at 20 kHz to 200 kHz.
|
|
* We pick the highest rate possible.
|
|
*/
|
|
div_main = DIV_ROUND_UP(parent_rate, 200000);
|
|
div_main = clamp(div_main, 1u, 256u);
|
|
rate = parent_rate / div_main;
|
|
if (rate < 20000 || rate > 200000) {
|
|
dev_err(dev, "No valid divider for ADC main clock\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* We also need a divider that produces a 10us clock. */
|
|
div_10us = DIV_ROUND_UP(rate, 10000);
|
|
/* And another, which produces a 1ms clock. */
|
|
div_ms = DIV_ROUND_UP(rate, 1000);
|
|
|
|
writel(((div_ms - 1) << JZ4770_ADC_REG_ADCLK_CLKDIVMS_LSB) |
|
|
((div_10us - 1) << JZ4770_ADC_REG_ADCLK_CLKDIV10US_LSB) |
|
|
(div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB,
|
|
adc->base + JZ_ADC_REG_ADCLK);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct iio_chan_spec jz4740_channels[] = {
|
|
{
|
|
.extend_name = "aux",
|
|
.type = IIO_VOLTAGE,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_AUX,
|
|
.scan_index = -1,
|
|
},
|
|
{
|
|
.extend_name = "battery",
|
|
.type = IIO_VOLTAGE,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_BATTERY,
|
|
.scan_index = -1,
|
|
},
|
|
};
|
|
|
|
static const struct iio_chan_spec jz4770_channels[] = {
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_XP,
|
|
.scan_index = 0,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_YP,
|
|
.scan_index = 1,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_XN,
|
|
.scan_index = 2,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_YN,
|
|
.scan_index = 3,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_XD,
|
|
.scan_index = 4,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.type = IIO_VOLTAGE,
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_TOUCH_YD,
|
|
.scan_index = 5,
|
|
.scan_type = {
|
|
.sign = 'u',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
},
|
|
},
|
|
{
|
|
.extend_name = "aux",
|
|
.type = IIO_VOLTAGE,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_AUX,
|
|
.scan_index = -1,
|
|
},
|
|
{
|
|
.extend_name = "battery",
|
|
.type = IIO_VOLTAGE,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_BATTERY,
|
|
.scan_index = -1,
|
|
},
|
|
{
|
|
.extend_name = "aux2",
|
|
.type = IIO_VOLTAGE,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.indexed = 1,
|
|
.channel = INGENIC_ADC_AUX2,
|
|
.scan_index = -1,
|
|
},
|
|
};
|
|
|
|
static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
|
|
.battery_high_vref = JZ4725B_ADC_BATTERY_HIGH_VREF,
|
|
.battery_high_vref_bits = JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,
|
|
.battery_raw_avail = jz4725b_adc_battery_raw_avail,
|
|
.battery_raw_avail_size = ARRAY_SIZE(jz4725b_adc_battery_raw_avail),
|
|
.battery_scale_avail = jz4725b_adc_battery_scale_avail,
|
|
.battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail),
|
|
.battery_vref_mode = true,
|
|
.has_aux2 = false,
|
|
.channels = jz4740_channels,
|
|
.num_channels = ARRAY_SIZE(jz4740_channels),
|
|
.init_clk_div = jz4725b_adc_init_clk_div,
|
|
};
|
|
|
|
static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {
|
|
.battery_high_vref = JZ4740_ADC_BATTERY_HIGH_VREF,
|
|
.battery_high_vref_bits = JZ4740_ADC_BATTERY_HIGH_VREF_BITS,
|
|
.battery_raw_avail = jz4740_adc_battery_raw_avail,
|
|
.battery_raw_avail_size = ARRAY_SIZE(jz4740_adc_battery_raw_avail),
|
|
.battery_scale_avail = jz4740_adc_battery_scale_avail,
|
|
.battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail),
|
|
.battery_vref_mode = true,
|
|
.has_aux2 = false,
|
|
.channels = jz4740_channels,
|
|
.num_channels = ARRAY_SIZE(jz4740_channels),
|
|
.init_clk_div = NULL, /* no ADCLK register on JZ4740 */
|
|
};
|
|
|
|
static const struct ingenic_adc_soc_data jz4770_adc_soc_data = {
|
|
.battery_high_vref = JZ4770_ADC_BATTERY_VREF,
|
|
.battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS,
|
|
.battery_raw_avail = jz4770_adc_battery_raw_avail,
|
|
.battery_raw_avail_size = ARRAY_SIZE(jz4770_adc_battery_raw_avail),
|
|
.battery_scale_avail = jz4770_adc_battery_scale_avail,
|
|
.battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail),
|
|
.battery_vref_mode = false,
|
|
.has_aux2 = true,
|
|
.channels = jz4770_channels,
|
|
.num_channels = ARRAY_SIZE(jz4770_channels),
|
|
.init_clk_div = jz4770_adc_init_clk_div,
|
|
};
|
|
|
|
static int ingenic_adc_read_avail(struct iio_dev *iio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
const int **vals,
|
|
int *type,
|
|
int *length,
|
|
long m)
|
|
{
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
|
|
switch (m) {
|
|
case IIO_CHAN_INFO_RAW:
|
|
*type = IIO_VAL_INT;
|
|
*length = adc->soc_data->battery_raw_avail_size;
|
|
*vals = adc->soc_data->battery_raw_avail;
|
|
return IIO_AVAIL_RANGE;
|
|
case IIO_CHAN_INFO_SCALE:
|
|
*type = IIO_VAL_FRACTIONAL_LOG2;
|
|
*length = adc->soc_data->battery_scale_avail_size;
|
|
*vals = adc->soc_data->battery_scale_avail;
|
|
return IIO_AVAIL_LIST;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
int *val)
|
|
{
|
|
int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY);
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
|
|
ret = clk_enable(adc->clk);
|
|
if (ret) {
|
|
dev_err(iio_dev->dev.parent, "Failed to enable clock: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
/* We cannot sample AUX/AUX2 in parallel. */
|
|
mutex_lock(&adc->aux_lock);
|
|
if (adc->soc_data->has_aux2 && engine == 0) {
|
|
bit = BIT(chan->channel == INGENIC_ADC_AUX2);
|
|
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit);
|
|
}
|
|
|
|
ret = ingenic_adc_capture(adc, engine);
|
|
if (ret)
|
|
goto out;
|
|
|
|
switch (chan->channel) {
|
|
case INGENIC_ADC_AUX:
|
|
case INGENIC_ADC_AUX2:
|
|
*val = readw(adc->base + JZ_ADC_REG_ADSDAT);
|
|
break;
|
|
case INGENIC_ADC_BATTERY:
|
|
*val = readw(adc->base + JZ_ADC_REG_ADBDAT);
|
|
break;
|
|
}
|
|
|
|
ret = IIO_VAL_INT;
|
|
out:
|
|
mutex_unlock(&adc->aux_lock);
|
|
clk_disable(adc->clk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ingenic_adc_read_raw(struct iio_dev *iio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
int *val,
|
|
int *val2,
|
|
long m)
|
|
{
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
|
|
switch (m) {
|
|
case IIO_CHAN_INFO_RAW:
|
|
return ingenic_adc_read_chan_info_raw(iio_dev, chan, val);
|
|
case IIO_CHAN_INFO_SCALE:
|
|
switch (chan->channel) {
|
|
case INGENIC_ADC_AUX:
|
|
case INGENIC_ADC_AUX2:
|
|
*val = JZ_ADC_AUX_VREF;
|
|
*val2 = JZ_ADC_AUX_VREF_BITS;
|
|
break;
|
|
case INGENIC_ADC_BATTERY:
|
|
if (adc->low_vref_mode) {
|
|
*val = JZ_ADC_BATTERY_LOW_VREF;
|
|
*val2 = JZ_ADC_BATTERY_LOW_VREF_BITS;
|
|
} else {
|
|
*val = adc->soc_data->battery_high_vref;
|
|
*val2 = adc->soc_data->battery_high_vref_bits;
|
|
}
|
|
break;
|
|
}
|
|
|
|
return IIO_VAL_FRACTIONAL_LOG2;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int ingenic_adc_of_xlate(struct iio_dev *iio_dev,
|
|
const struct of_phandle_args *iiospec)
|
|
{
|
|
int i;
|
|
|
|
if (!iiospec->args_count)
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < iio_dev->num_channels; ++i)
|
|
if (iio_dev->channels[i].channel == iiospec->args[0])
|
|
return i;
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static void ingenic_adc_clk_cleanup(void *data)
|
|
{
|
|
clk_unprepare(data);
|
|
}
|
|
|
|
static const struct iio_info ingenic_adc_info = {
|
|
.write_raw = ingenic_adc_write_raw,
|
|
.read_raw = ingenic_adc_read_raw,
|
|
.read_avail = ingenic_adc_read_avail,
|
|
.of_xlate = ingenic_adc_of_xlate,
|
|
};
|
|
|
|
static int ingenic_adc_buffer_enable(struct iio_dev *iio_dev)
|
|
{
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
int ret;
|
|
|
|
ret = clk_enable(adc->clk);
|
|
if (ret) {
|
|
dev_err(iio_dev->dev.parent, "Failed to enable clock: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
/* It takes significant time for the touchscreen hw to stabilize. */
|
|
msleep(50);
|
|
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK,
|
|
JZ_ADC_REG_CFG_SAMPLE_NUM(4) |
|
|
JZ_ADC_REG_CFG_PULL_UP(4));
|
|
|
|
writew(80, adc->base + JZ_ADC_REG_ADWAIT);
|
|
writew(2, adc->base + JZ_ADC_REG_ADSAME);
|
|
writeb((u8)~JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_CTRL);
|
|
writel(0, adc->base + JZ_ADC_REG_ADTCH);
|
|
|
|
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL,
|
|
JZ_ADC_REG_CFG_CMD_SEL);
|
|
ingenic_adc_set_adcmd(iio_dev, iio_dev->active_scan_mask[0]);
|
|
|
|
ingenic_adc_enable(adc, 2, true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ingenic_adc_buffer_disable(struct iio_dev *iio_dev)
|
|
{
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
|
|
ingenic_adc_enable(adc, 2, false);
|
|
|
|
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL, 0);
|
|
|
|
writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
|
|
writeb(0xff, adc->base + JZ_ADC_REG_STATUS);
|
|
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK, 0);
|
|
writew(0, adc->base + JZ_ADC_REG_ADSAME);
|
|
writew(0, adc->base + JZ_ADC_REG_ADWAIT);
|
|
clk_disable(adc->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct iio_buffer_setup_ops ingenic_buffer_setup_ops = {
|
|
.postenable = &ingenic_adc_buffer_enable,
|
|
.predisable = &ingenic_adc_buffer_disable
|
|
};
|
|
|
|
static irqreturn_t ingenic_adc_irq(int irq, void *data)
|
|
{
|
|
struct iio_dev *iio_dev = data;
|
|
struct ingenic_adc *adc = iio_priv(iio_dev);
|
|
unsigned long mask = iio_dev->active_scan_mask[0];
|
|
unsigned int i;
|
|
u32 tdat[3];
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tdat); mask >>= 2, i++) {
|
|
if (mask & 0x3)
|
|
tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);
|
|
else
|
|
tdat[i] = 0;
|
|
}
|
|
|
|
iio_push_to_buffers(iio_dev, tdat);
|
|
writeb(JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_STATUS);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int ingenic_adc_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct iio_dev *iio_dev;
|
|
struct ingenic_adc *adc;
|
|
const struct ingenic_adc_soc_data *soc_data;
|
|
int irq, ret;
|
|
|
|
soc_data = device_get_match_data(dev);
|
|
if (!soc_data)
|
|
return -EINVAL;
|
|
|
|
iio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
|
|
if (!iio_dev)
|
|
return -ENOMEM;
|
|
|
|
adc = iio_priv(iio_dev);
|
|
mutex_init(&adc->lock);
|
|
mutex_init(&adc->aux_lock);
|
|
adc->soc_data = soc_data;
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
ret = devm_request_irq(dev, irq, ingenic_adc_irq, 0,
|
|
dev_name(dev), iio_dev);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to request irq: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
adc->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(adc->base))
|
|
return PTR_ERR(adc->base);
|
|
|
|
adc->clk = devm_clk_get(dev, "adc");
|
|
if (IS_ERR(adc->clk)) {
|
|
dev_err(dev, "Unable to get clock\n");
|
|
return PTR_ERR(adc->clk);
|
|
}
|
|
|
|
ret = clk_prepare_enable(adc->clk);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable clock\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Set clock dividers. */
|
|
if (soc_data->init_clk_div) {
|
|
ret = soc_data->init_clk_div(dev, adc);
|
|
if (ret) {
|
|
clk_disable_unprepare(adc->clk);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
/* Put hardware in a known passive state. */
|
|
writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
|
|
writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
|
|
usleep_range(2000, 3000); /* Must wait at least 2ms. */
|
|
clk_disable(adc->clk);
|
|
|
|
ret = devm_add_action_or_reset(dev, ingenic_adc_clk_cleanup, adc->clk);
|
|
if (ret) {
|
|
dev_err(dev, "Unable to add action\n");
|
|
return ret;
|
|
}
|
|
|
|
iio_dev->name = "jz-adc";
|
|
iio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
|
|
iio_dev->setup_ops = &ingenic_buffer_setup_ops;
|
|
iio_dev->channels = soc_data->channels;
|
|
iio_dev->num_channels = soc_data->num_channels;
|
|
iio_dev->info = &ingenic_adc_info;
|
|
|
|
ret = devm_iio_device_register(dev, iio_dev);
|
|
if (ret)
|
|
dev_err(dev, "Unable to register IIO device\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct of_device_id ingenic_adc_of_match[] = {
|
|
{ .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, },
|
|
{ .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, },
|
|
{ .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ingenic_adc_of_match);
|
|
|
|
static struct platform_driver ingenic_adc_driver = {
|
|
.driver = {
|
|
.name = "ingenic-adc",
|
|
.of_match_table = ingenic_adc_of_match,
|
|
},
|
|
.probe = ingenic_adc_probe,
|
|
};
|
|
module_platform_driver(ingenic_adc_driver);
|
|
MODULE_LICENSE("GPL v2");
|