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![Lars-Peter Clausen](/assets/img/avatar_default.png)
If a driver does not assign an of_node to a IIO device to IIO core will automatically assign the of_node of the parent device. This automatic assignment is done in the iio_device_register() function. There is a fair amount of drivers that currently manually assign the of_node of the IIO device. All but 4 of them can make use of the automatic assignment though. The exceptions are: * mxs-lradc-adc: Which uses the of_node of the parent of the parent. * stm32-dfsdm-adc, stm32-adc and stm32-dac: Which reference the of_node assigned to the IIO device before iio_device_register() is called. All other drivers are updated to use automatic assignment. This reduces the amount of boilerplate code involved in setting up the IIO device. The patch has mostly been auto-generated with the following semantic patch // <smpl> @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(&parent, ...) ... -indio_dev->dev.of_node = parent.of_node; @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(parent, ...) ... -indio_dev->dev.of_node = parent->of_node; // </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
361 lines
8 KiB
C
361 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for Microchip MCP3911, Two-channel Analog Front End
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*
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* Copyright (C) 2018 Marcus Folkesson <marcus.folkesson@gmail.com>
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* Copyright (C) 2018 Kent Gustavsson <kent@minoris.se>
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#define MCP3911_REG_CHANNEL0 0x00
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#define MCP3911_REG_CHANNEL1 0x03
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#define MCP3911_REG_MOD 0x06
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#define MCP3911_REG_PHASE 0x07
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#define MCP3911_REG_GAIN 0x09
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#define MCP3911_REG_STATUSCOM 0x0a
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#define MCP3911_STATUSCOM_CH1_24WIDTH BIT(4)
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#define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3)
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#define MCP3911_STATUSCOM_EN_OFFCAL BIT(2)
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#define MCP3911_STATUSCOM_EN_GAINCAL BIT(1)
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#define MCP3911_REG_CONFIG 0x0c
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#define MCP3911_CONFIG_CLKEXT BIT(1)
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#define MCP3911_CONFIG_VREFEXT BIT(2)
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#define MCP3911_REG_OFFCAL_CH0 0x0e
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#define MCP3911_REG_GAINCAL_CH0 0x11
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#define MCP3911_REG_OFFCAL_CH1 0x14
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#define MCP3911_REG_GAINCAL_CH1 0x17
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#define MCP3911_REG_VREFCAL 0x1a
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#define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3)
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#define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6)
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/* Internal voltage reference in uV */
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#define MCP3911_INT_VREF_UV 1200000
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#define MCP3911_REG_READ(reg, id) ((((reg) << 1) | ((id) << 5) | (1 << 0)) & 0xff)
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#define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 5) | (0 << 0)) & 0xff)
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#define MCP3911_NUM_CHANNELS 2
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struct mcp3911 {
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struct spi_device *spi;
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struct mutex lock;
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struct regulator *vref;
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struct clk *clki;
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u32 dev_addr;
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};
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static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len)
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{
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int ret;
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reg = MCP3911_REG_READ(reg, adc->dev_addr);
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ret = spi_write_then_read(adc->spi, ®, 1, val, len);
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if (ret < 0)
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return ret;
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be32_to_cpus(val);
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*val >>= ((4 - len) * 8);
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dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%x\n", *val,
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reg >> 1);
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return ret;
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}
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static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len)
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{
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dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg);
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val <<= (3 - len) * 8;
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cpu_to_be32s(&val);
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val |= MCP3911_REG_WRITE(reg, adc->dev_addr);
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return spi_write(adc->spi, &val, len + 1);
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}
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static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask,
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u32 val, u8 len)
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{
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u32 tmp;
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int ret;
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ret = mcp3911_read(adc, reg, &tmp, len);
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if (ret)
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return ret;
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val &= mask;
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val |= tmp & ~mask;
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return mcp3911_write(adc, reg, val, len);
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}
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static int mcp3911_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *channel, int *val,
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int *val2, long mask)
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{
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struct mcp3911 *adc = iio_priv(indio_dev);
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int ret = -EINVAL;
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mutex_lock(&adc->lock);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = mcp3911_read(adc,
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MCP3911_CHANNEL(channel->channel), val, 3);
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if (ret)
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goto out;
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ret = IIO_VAL_INT;
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break;
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case IIO_CHAN_INFO_OFFSET:
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ret = mcp3911_read(adc,
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MCP3911_OFFCAL(channel->channel), val, 3);
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if (ret)
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goto out;
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ret = IIO_VAL_INT;
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break;
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case IIO_CHAN_INFO_SCALE:
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if (adc->vref) {
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ret = regulator_get_voltage(adc->vref);
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if (ret < 0) {
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dev_err(indio_dev->dev.parent,
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"failed to get vref voltage: %d\n",
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ret);
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goto out;
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}
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*val = ret / 1000;
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} else {
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*val = MCP3911_INT_VREF_UV;
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}
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*val2 = 24;
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ret = IIO_VAL_FRACTIONAL_LOG2;
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break;
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}
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out:
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mutex_unlock(&adc->lock);
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return ret;
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}
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static int mcp3911_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *channel, int val,
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int val2, long mask)
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{
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struct mcp3911 *adc = iio_priv(indio_dev);
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int ret = -EINVAL;
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mutex_lock(&adc->lock);
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switch (mask) {
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case IIO_CHAN_INFO_OFFSET:
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if (val2 != 0) {
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ret = -EINVAL;
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goto out;
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}
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/* Write offset */
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ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val,
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3);
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if (ret)
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goto out;
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/* Enable offset*/
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ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM,
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MCP3911_STATUSCOM_EN_OFFCAL,
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MCP3911_STATUSCOM_EN_OFFCAL, 2);
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break;
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}
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out:
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mutex_unlock(&adc->lock);
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return ret;
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}
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#define MCP3911_CHAN(idx) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = idx, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_OFFSET) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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}
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static const struct iio_chan_spec mcp3911_channels[] = {
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MCP3911_CHAN(0),
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MCP3911_CHAN(1),
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};
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static const struct iio_info mcp3911_info = {
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.read_raw = mcp3911_read_raw,
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.write_raw = mcp3911_write_raw,
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};
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static int mcp3911_config(struct mcp3911 *adc, struct device_node *of_node)
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{
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u32 configreg;
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int ret;
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of_property_read_u32(of_node, "device-addr", &adc->dev_addr);
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if (adc->dev_addr > 3) {
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dev_err(&adc->spi->dev,
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"invalid device address (%i). Must be in range 0-3.\n",
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adc->dev_addr);
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return -EINVAL;
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}
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dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr);
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ret = mcp3911_read(adc, MCP3911_REG_CONFIG, &configreg, 2);
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if (ret)
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return ret;
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if (adc->vref) {
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dev_dbg(&adc->spi->dev, "use external voltage reference\n");
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configreg |= MCP3911_CONFIG_VREFEXT;
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} else {
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dev_dbg(&adc->spi->dev,
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"use internal voltage reference (1.2V)\n");
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configreg &= ~MCP3911_CONFIG_VREFEXT;
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}
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if (adc->clki) {
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dev_dbg(&adc->spi->dev, "use external clock as clocksource\n");
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configreg |= MCP3911_CONFIG_CLKEXT;
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} else {
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dev_dbg(&adc->spi->dev,
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"use crystal oscillator as clocksource\n");
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configreg &= ~MCP3911_CONFIG_CLKEXT;
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}
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return mcp3911_write(adc, MCP3911_REG_CONFIG, configreg, 2);
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}
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static int mcp3911_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct mcp3911 *adc;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
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if (!indio_dev)
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return -ENOMEM;
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adc = iio_priv(indio_dev);
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adc->spi = spi;
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adc->vref = devm_regulator_get_optional(&adc->spi->dev, "vref");
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if (IS_ERR(adc->vref)) {
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if (PTR_ERR(adc->vref) == -ENODEV) {
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adc->vref = NULL;
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} else {
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dev_err(&adc->spi->dev,
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"failed to get regulator (%ld)\n",
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PTR_ERR(adc->vref));
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return PTR_ERR(adc->vref);
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}
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} else {
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ret = regulator_enable(adc->vref);
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if (ret)
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return ret;
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}
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adc->clki = devm_clk_get(&adc->spi->dev, NULL);
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if (IS_ERR(adc->clki)) {
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if (PTR_ERR(adc->clki) == -ENOENT) {
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adc->clki = NULL;
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} else {
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dev_err(&adc->spi->dev,
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"failed to get adc clk (%ld)\n",
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PTR_ERR(adc->clki));
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ret = PTR_ERR(adc->clki);
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goto reg_disable;
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}
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} else {
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ret = clk_prepare_enable(adc->clki);
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if (ret < 0) {
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dev_err(&adc->spi->dev,
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"Failed to enable clki: %d\n", ret);
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goto reg_disable;
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}
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}
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ret = mcp3911_config(adc, spi->dev.of_node);
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if (ret)
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goto clk_disable;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &mcp3911_info;
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spi_set_drvdata(spi, indio_dev);
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indio_dev->channels = mcp3911_channels;
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indio_dev->num_channels = ARRAY_SIZE(mcp3911_channels);
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mutex_init(&adc->lock);
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ret = iio_device_register(indio_dev);
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if (ret)
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goto clk_disable;
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return ret;
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clk_disable:
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clk_disable_unprepare(adc->clki);
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reg_disable:
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if (adc->vref)
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regulator_disable(adc->vref);
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return ret;
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}
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static int mcp3911_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct mcp3911 *adc = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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clk_disable_unprepare(adc->clki);
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if (adc->vref)
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regulator_disable(adc->vref);
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return 0;
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}
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static const struct of_device_id mcp3911_dt_ids[] = {
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{ .compatible = "microchip,mcp3911" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mcp3911_dt_ids);
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static const struct spi_device_id mcp3911_id[] = {
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{ "mcp3911", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, mcp3911_id);
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static struct spi_driver mcp3911_driver = {
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.driver = {
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.name = "mcp3911",
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.of_match_table = mcp3911_dt_ids,
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},
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.probe = mcp3911_probe,
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.remove = mcp3911_remove,
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.id_table = mcp3911_id,
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};
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module_spi_driver(mcp3911_driver);
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MODULE_AUTHOR("Marcus Folkesson <marcus.folkesson@gmail.com>");
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MODULE_AUTHOR("Kent Gustavsson <kent@minoris.se>");
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MODULE_DESCRIPTION("Microchip Technology MCP3911");
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MODULE_LICENSE("GPL v2");
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