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![Angelo Dureghello](/assets/img/avatar_default.png)
Due to the use of sizeof(), command size set for the spi transfer
was wrong. Driver was sending and receiving always 1 byte less
and especially on write, it was hanging.
echo -n -e "\\x1\\x2\\x3\\x4" > /dev/mtd1
And read part too now works as expected.
hexdump -C -n16 /dev/mtd1
00000000 01 02 03 04 ab f3 ad c2 ab e3 f4 36 dd 38 04 15
00000010
Fixes: 4379075a87
("mtd: mchp23k256: Add support for mchp23lcv1024")
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
246 lines
5.5 KiB
C
246 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* mchp23k256.c
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*
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* Driver for Microchip 23k256 SPI RAM chips
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*
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* Copyright © 2016 Andrew Lunn <andrew@lunn.ch>
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mutex.h>
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#include <linux/sched.h>
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#include <linux/sizes.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/spi.h>
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#include <linux/of_device.h>
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#define MAX_CMD_SIZE 4
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struct mchp23_caps {
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u8 addr_width;
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unsigned int size;
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};
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struct mchp23k256_flash {
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struct spi_device *spi;
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struct mutex lock;
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struct mtd_info mtd;
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const struct mchp23_caps *caps;
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};
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#define MCHP23K256_CMD_WRITE_STATUS 0x01
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#define MCHP23K256_CMD_WRITE 0x02
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#define MCHP23K256_CMD_READ 0x03
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#define MCHP23K256_MODE_SEQ BIT(6)
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#define to_mchp23k256_flash(x) container_of(x, struct mchp23k256_flash, mtd)
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static void mchp23k256_addr2cmd(struct mchp23k256_flash *flash,
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unsigned int addr, u8 *cmd)
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{
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int i;
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/*
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* Address is sent in big endian (MSB first) and we skip
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* the first entry of the cmd array which contains the cmd
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* opcode.
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*/
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for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8)
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cmd[i] = addr;
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}
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static int mchp23k256_cmdsz(struct mchp23k256_flash *flash)
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{
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return 1 + flash->caps->addr_width;
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}
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static int mchp23k256_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const unsigned char *buf)
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{
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struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
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struct spi_transfer transfer[2] = {};
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struct spi_message message;
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unsigned char command[MAX_CMD_SIZE];
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int ret, cmd_len;
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spi_message_init(&message);
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cmd_len = mchp23k256_cmdsz(flash);
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command[0] = MCHP23K256_CMD_WRITE;
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mchp23k256_addr2cmd(flash, to, command);
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transfer[0].tx_buf = command;
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transfer[0].len = cmd_len;
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spi_message_add_tail(&transfer[0], &message);
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transfer[1].tx_buf = buf;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[1], &message);
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mutex_lock(&flash->lock);
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ret = spi_sync(flash->spi, &message);
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mutex_unlock(&flash->lock);
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if (ret)
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return ret;
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if (retlen && message.actual_length > cmd_len)
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*retlen += message.actual_length - cmd_len;
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return 0;
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}
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static int mchp23k256_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, unsigned char *buf)
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{
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struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
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struct spi_transfer transfer[2] = {};
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struct spi_message message;
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unsigned char command[MAX_CMD_SIZE];
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int ret, cmd_len;
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spi_message_init(&message);
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cmd_len = mchp23k256_cmdsz(flash);
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memset(&transfer, 0, sizeof(transfer));
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command[0] = MCHP23K256_CMD_READ;
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mchp23k256_addr2cmd(flash, from, command);
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transfer[0].tx_buf = command;
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transfer[0].len = cmd_len;
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spi_message_add_tail(&transfer[0], &message);
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transfer[1].rx_buf = buf;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[1], &message);
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mutex_lock(&flash->lock);
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ret = spi_sync(flash->spi, &message);
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mutex_unlock(&flash->lock);
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if (ret)
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return ret;
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if (retlen && message.actual_length > cmd_len)
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*retlen += message.actual_length - cmd_len;
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return 0;
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}
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/*
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* Set the device into sequential mode. This allows read/writes to the
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* entire SRAM in a single operation
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*/
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static int mchp23k256_set_mode(struct spi_device *spi)
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{
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struct spi_transfer transfer = {};
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struct spi_message message;
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unsigned char command[2];
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spi_message_init(&message);
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command[0] = MCHP23K256_CMD_WRITE_STATUS;
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command[1] = MCHP23K256_MODE_SEQ;
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transfer.tx_buf = command;
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transfer.len = sizeof(command);
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spi_message_add_tail(&transfer, &message);
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return spi_sync(spi, &message);
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}
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static const struct mchp23_caps mchp23k256_caps = {
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.size = SZ_32K,
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.addr_width = 2,
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};
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static const struct mchp23_caps mchp23lcv1024_caps = {
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.size = SZ_128K,
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.addr_width = 3,
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};
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static int mchp23k256_probe(struct spi_device *spi)
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{
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struct mchp23k256_flash *flash;
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struct flash_platform_data *data;
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int err;
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flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
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if (!flash)
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return -ENOMEM;
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flash->spi = spi;
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mutex_init(&flash->lock);
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spi_set_drvdata(spi, flash);
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err = mchp23k256_set_mode(spi);
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if (err)
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return err;
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data = dev_get_platdata(&spi->dev);
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flash->caps = of_device_get_match_data(&spi->dev);
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if (!flash->caps)
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flash->caps = &mchp23k256_caps;
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mtd_set_of_node(&flash->mtd, spi->dev.of_node);
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flash->mtd.dev.parent = &spi->dev;
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flash->mtd.type = MTD_RAM;
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flash->mtd.flags = MTD_CAP_RAM;
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flash->mtd.writesize = 1;
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flash->mtd.size = flash->caps->size;
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flash->mtd._read = mchp23k256_read;
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flash->mtd._write = mchp23k256_write;
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err = mtd_device_register(&flash->mtd, data ? data->parts : NULL,
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data ? data->nr_parts : 0);
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if (err)
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return err;
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return 0;
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}
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static int mchp23k256_remove(struct spi_device *spi)
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{
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struct mchp23k256_flash *flash = spi_get_drvdata(spi);
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return mtd_device_unregister(&flash->mtd);
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}
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static const struct of_device_id mchp23k256_of_table[] = {
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{
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.compatible = "microchip,mchp23k256",
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.data = &mchp23k256_caps,
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},
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{
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.compatible = "microchip,mchp23lcv1024",
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.data = &mchp23lcv1024_caps,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, mchp23k256_of_table);
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static struct spi_driver mchp23k256_driver = {
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.driver = {
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.name = "mchp23k256",
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.of_match_table = of_match_ptr(mchp23k256_of_table),
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},
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.probe = mchp23k256_probe,
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.remove = mchp23k256_remove,
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};
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module_spi_driver(mchp23k256_driver);
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MODULE_DESCRIPTION("MTD SPI driver for MCHP23K256 RAM chips");
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MODULE_AUTHOR("Andrew Lunn <andre@lunn.ch>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("spi:mchp23k256");
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