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![David Lechner](/assets/img/avatar_default.png)
This adds a new driver for the gate and multiplexer clocks in the CFGCHIPn syscon registers on TI DA8XX-type SoCs. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
21 lines
504 B
C
21 lines
504 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* clk-da8xx-cfgchip - TI DaVinci DA8xx CFGCHIP clock driver
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*
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* Copyright (C) 2018 David Lechner <david@lechnology.com>
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*/
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#ifndef __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__
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#define __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__
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#include <linux/regmap.h>
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/**
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* da8xx_cfgchip_clk_platform_data
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* @cfgchip: CFGCHIP syscon regmap
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*/
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struct da8xx_cfgchip_clk_platform_data {
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struct regmap *cfgchip;
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};
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#endif /* __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__ */
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