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![Maciej W. Rozycki](/assets/img/avatar_default.png)
This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at=<reg> feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 by Waldorf Electronics
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* Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2007 Maciej W. Rozycki
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*/
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#ifndef _ASM_DELAY_H
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#define _ASM_DELAY_H
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#include <linux/param.h>
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#include <linux/smp.h>
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#include <asm/compiler.h>
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#include <asm/war.h>
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static inline void __delay(unsigned long loops)
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{
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if (sizeof(long) == 4)
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__asm__ __volatile__ (
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" .set noreorder \n"
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" .align 3 \n"
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"1: bnez %0, 1b \n"
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" subu %0, 1 \n"
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" .set reorder \n"
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: "=r" (loops)
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: "0" (loops));
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else if (sizeof(long) == 8 && !DADDI_WAR)
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__asm__ __volatile__ (
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" .set noreorder \n"
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" .align 3 \n"
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"1: bnez %0, 1b \n"
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" dsubu %0, 1 \n"
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" .set reorder \n"
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: "=r" (loops)
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: "0" (loops));
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else if (sizeof(long) == 8 && DADDI_WAR)
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__asm__ __volatile__ (
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" .set noreorder \n"
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" .align 3 \n"
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"1: bnez %0, 1b \n"
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" dsubu %0, %2 \n"
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" .set reorder \n"
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: "=r" (loops)
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: "0" (loops), "r" (1));
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}
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/*
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* Division by multiplication: you don't have to worry about
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* loss of precision.
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*
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* Use only for very small delays ( < 1 msec). Should probably use a
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* lookup table, really, as the multiplications take much too long with
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* short delays. This is a "reasonable" implementation, though (and the
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* first constant multiplications gets optimized away if the delay is
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* a constant)
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*/
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static inline void __udelay(unsigned long usecs, unsigned long lpj)
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{
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unsigned long hi, lo;
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/*
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* The rates of 128 is rounded wrongly by the catchall case
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* for 64-bit. Excessive precission? Probably ...
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*/
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#if defined(CONFIG_64BIT) && (HZ == 128)
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usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
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#elif defined(CONFIG_64BIT)
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usecs *= (0x8000000000000000UL / (500000 / HZ));
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#else /* 32-bit junk follows here */
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usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
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0x80000000ULL) >> 32);
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#endif
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if (sizeof(long) == 4)
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__asm__("multu\t%2, %3"
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: "=h" (usecs), "=l" (lo)
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: "r" (usecs), "r" (lpj)
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: GCC_REG_ACCUM);
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else if (sizeof(long) == 8 && !R4000_WAR)
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__asm__("dmultu\t%2, %3"
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: "=h" (usecs), "=l" (lo)
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: "r" (usecs), "r" (lpj)
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: GCC_REG_ACCUM);
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else if (sizeof(long) == 8 && R4000_WAR)
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__asm__("dmultu\t%3, %4\n\tmfhi\t%0"
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: "=r" (usecs), "=h" (hi), "=l" (lo)
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: "r" (usecs), "r" (lpj)
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: GCC_REG_ACCUM);
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__delay(usecs);
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}
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#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
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#define udelay(usecs) __udelay((usecs), __udelay_val)
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/* make sure "usecs *= ..." in udelay do not overflow. */
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#if HZ >= 1000
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#define MAX_UDELAY_MS 1
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#elif HZ <= 200
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#define MAX_UDELAY_MS 5
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#else
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#define MAX_UDELAY_MS (1000 / HZ)
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#endif
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#endif /* _ASM_DELAY_H */
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