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![Wei Yang](/assets/img/avatar_default.png)
Per the SR-IOV spec r1.1, sec 3.3.14, the required alignment of a PF's IOV BAR is the size of an individual VF BAR, and the size consumed is the individual VF BAR size times NumVFs. The PowerNV platform has additional alignment requirements to help support its Partitionable Endpoint device isolation feature (see Documentation/powerpc/pci_iov_resource_on_powernv.txt). Add a pcibios_iov_resource_alignment() interface to allow platforms to request additional alignment. [bhelgaas: changelog, adapt to reworked pci_sriov_resource_alignment(), drop "align" parameter] Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
762 lines
18 KiB
C
762 lines
18 KiB
C
/*
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* drivers/pci/iov.c
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*
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* Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
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*
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* PCI Express I/O Virtualization (IOV) support.
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* Single Root IOV 1.0
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* Address Translation Service 1.0
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*/
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/pci-ats.h>
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#include "pci.h"
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#define VIRTFN_ID_LEN 16
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int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
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{
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if (!dev->is_physfn)
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return -EINVAL;
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return dev->bus->number + ((dev->devfn + dev->sriov->offset +
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dev->sriov->stride * vf_id) >> 8);
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}
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int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
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{
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if (!dev->is_physfn)
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return -EINVAL;
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return (dev->devfn + dev->sriov->offset +
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dev->sriov->stride * vf_id) & 0xff;
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}
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/*
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* Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
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* change when NumVFs changes.
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*
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* Update iov->offset and iov->stride when NumVFs is written.
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*/
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static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
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{
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struct pci_sriov *iov = dev->sriov;
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
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}
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/*
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* The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
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* determine how many additional bus numbers will be consumed by VFs.
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*
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* Iterate over all valid NumVFs and calculate the maximum number of bus
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* numbers that could ever be required.
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*/
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static inline u8 virtfn_max_buses(struct pci_dev *dev)
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{
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struct pci_sriov *iov = dev->sriov;
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int nr_virtfn;
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u8 max = 0;
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int busnr;
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for (nr_virtfn = 1; nr_virtfn <= iov->total_VFs; nr_virtfn++) {
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pci_iov_set_numvfs(dev, nr_virtfn);
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busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
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if (busnr > max)
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max = busnr;
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}
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return max;
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}
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static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
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{
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struct pci_bus *child;
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if (bus->number == busnr)
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return bus;
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child = pci_find_bus(pci_domain_nr(bus), busnr);
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if (child)
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return child;
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child = pci_add_new_bus(bus, NULL, busnr);
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if (!child)
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return NULL;
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pci_bus_insert_busn_res(child, busnr, busnr);
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return child;
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}
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static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
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{
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if (physbus != virtbus && list_empty(&virtbus->devices))
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pci_remove_bus(virtbus);
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}
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resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
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{
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if (!dev->is_physfn)
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return 0;
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return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
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}
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static int virtfn_add(struct pci_dev *dev, int id, int reset)
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{
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int i;
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int rc = -ENOMEM;
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u64 size;
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char buf[VIRTFN_ID_LEN];
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struct pci_dev *virtfn;
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struct resource *res;
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struct pci_sriov *iov = dev->sriov;
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struct pci_bus *bus;
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mutex_lock(&iov->dev->sriov->lock);
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bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
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if (!bus)
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goto failed;
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virtfn = pci_alloc_dev(bus);
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if (!virtfn)
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goto failed0;
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virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
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virtfn->vendor = dev->vendor;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
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pci_setup_device(virtfn);
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virtfn->dev.parent = dev->dev.parent;
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virtfn->physfn = pci_dev_get(dev);
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virtfn->is_virtfn = 1;
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virtfn->multifunction = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = &dev->resource[i + PCI_IOV_RESOURCES];
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if (!res->parent)
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continue;
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virtfn->resource[i].name = pci_name(virtfn);
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virtfn->resource[i].flags = res->flags;
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size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
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virtfn->resource[i].start = res->start + size * id;
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virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
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rc = request_resource(res, &virtfn->resource[i]);
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BUG_ON(rc);
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}
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if (reset)
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__pci_reset_function(virtfn);
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pci_device_add(virtfn, virtfn->bus);
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mutex_unlock(&iov->dev->sriov->lock);
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pci_bus_add_device(virtfn);
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sprintf(buf, "virtfn%u", id);
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rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
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if (rc)
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goto failed1;
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rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
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if (rc)
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goto failed2;
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kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
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return 0;
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failed2:
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sysfs_remove_link(&dev->dev.kobj, buf);
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failed1:
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pci_dev_put(dev);
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mutex_lock(&iov->dev->sriov->lock);
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pci_stop_and_remove_bus_device(virtfn);
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failed0:
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virtfn_remove_bus(dev->bus, bus);
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failed:
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mutex_unlock(&iov->dev->sriov->lock);
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return rc;
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}
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static void virtfn_remove(struct pci_dev *dev, int id, int reset)
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{
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char buf[VIRTFN_ID_LEN];
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struct pci_dev *virtfn;
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struct pci_sriov *iov = dev->sriov;
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virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
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pci_iov_virtfn_bus(dev, id),
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pci_iov_virtfn_devfn(dev, id));
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if (!virtfn)
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return;
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if (reset) {
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device_release_driver(&virtfn->dev);
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__pci_reset_function(virtfn);
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}
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sprintf(buf, "virtfn%u", id);
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sysfs_remove_link(&dev->dev.kobj, buf);
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/*
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* pci_stop_dev() could have been called for this virtfn already,
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* so the directory for the virtfn may have been removed before.
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* Double check to avoid spurious sysfs warnings.
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*/
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if (virtfn->dev.kobj.sd)
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sysfs_remove_link(&virtfn->dev.kobj, "physfn");
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mutex_lock(&iov->dev->sriov->lock);
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pci_stop_and_remove_bus_device(virtfn);
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virtfn_remove_bus(dev->bus, virtfn->bus);
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mutex_unlock(&iov->dev->sriov->lock);
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/* balance pci_get_domain_bus_and_slot() */
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pci_dev_put(virtfn);
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pci_dev_put(dev);
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}
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int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
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{
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return 0;
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}
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static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
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{
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int rc;
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int i, j;
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int nres;
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u16 offset, stride, initial;
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struct resource *res;
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struct pci_dev *pdev;
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struct pci_sriov *iov = dev->sriov;
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int bars = 0;
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int bus;
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int retval;
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if (!nr_virtfn)
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return 0;
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if (iov->num_VFs)
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return -EINVAL;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
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if (initial > iov->total_VFs ||
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(!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
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return -EIO;
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if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
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(!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
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return -EINVAL;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (nr_virtfn > 1 && !stride))
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return -EIO;
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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bars |= (1 << (i + PCI_IOV_RESOURCES));
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res = &dev->resource[i + PCI_IOV_RESOURCES];
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if (res->parent)
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nres++;
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}
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if (nres != iov->nres) {
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dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
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return -ENOMEM;
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}
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iov->offset = offset;
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iov->stride = stride;
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bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
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if (bus > dev->bus->busn_res.end) {
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dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
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nr_virtfn, bus, &dev->bus->busn_res);
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return -ENOMEM;
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}
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if (pci_enable_resources(dev, bars)) {
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dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
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return -ENOMEM;
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}
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if (iov->link != dev->devfn) {
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pdev = pci_get_slot(dev->bus, iov->link);
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if (!pdev)
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return -ENODEV;
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if (!pdev->is_physfn) {
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pci_dev_put(pdev);
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return -ENOSYS;
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}
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rc = sysfs_create_link(&dev->dev.kobj,
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&pdev->dev.kobj, "dep_link");
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pci_dev_put(pdev);
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if (rc)
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return rc;
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}
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pci_iov_set_numvfs(dev, nr_virtfn);
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iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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msleep(100);
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pci_cfg_access_unlock(dev);
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iov->initial_VFs = initial;
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if (nr_virtfn < initial)
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initial = nr_virtfn;
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if ((retval = pcibios_sriov_enable(dev, initial))) {
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dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n",
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retval);
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return retval;
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}
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for (i = 0; i < initial; i++) {
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rc = virtfn_add(dev, i, 0);
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if (rc)
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goto failed;
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}
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kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
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iov->num_VFs = nr_virtfn;
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return 0;
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failed:
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for (j = 0; j < i; j++)
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virtfn_remove(dev, j, 0);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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pci_iov_set_numvfs(dev, 0);
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ssleep(1);
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pci_cfg_access_unlock(dev);
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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return rc;
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}
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int __weak pcibios_sriov_disable(struct pci_dev *pdev)
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{
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return 0;
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}
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static void sriov_disable(struct pci_dev *dev)
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{
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int i;
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struct pci_sriov *iov = dev->sriov;
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if (!iov->num_VFs)
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return;
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for (i = 0; i < iov->num_VFs; i++)
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virtfn_remove(dev, i, 0);
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pcibios_sriov_disable(dev);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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ssleep(1);
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pci_cfg_access_unlock(dev);
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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iov->num_VFs = 0;
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pci_iov_set_numvfs(dev, 0);
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}
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static int sriov_init(struct pci_dev *dev, int pos)
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{
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int i, bar64;
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int rc;
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int nres;
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u32 pgsz;
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u16 ctrl, total, offset, stride;
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struct pci_sriov *iov;
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struct resource *res;
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struct pci_dev *pdev;
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if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
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pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
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return -ENODEV;
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pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
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if (ctrl & PCI_SRIOV_CTRL_VFE) {
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
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ssleep(1);
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}
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pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
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if (!total)
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return 0;
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ctrl = 0;
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list_for_each_entry(pdev, &dev->bus->devices, bus_list)
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if (pdev->is_physfn)
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goto found;
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pdev = NULL;
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if (pci_ari_enabled(dev->bus))
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ctrl |= PCI_SRIOV_CTRL_ARI;
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found:
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
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pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (total > 1 && !stride))
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return -EIO;
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pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
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i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
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pgsz &= ~((1 << i) - 1);
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if (!pgsz)
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return -EIO;
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pgsz &= ~(pgsz - 1);
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pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
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iov = kzalloc(sizeof(*iov), GFP_KERNEL);
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if (!iov)
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return -ENOMEM;
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = &dev->resource[i + PCI_IOV_RESOURCES];
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bar64 = __pci_read_base(dev, pci_bar_unknown, res,
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pos + PCI_SRIOV_BAR + i * 4);
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if (!res->flags)
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continue;
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if (resource_size(res) & (PAGE_SIZE - 1)) {
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rc = -EIO;
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goto failed;
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}
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iov->barsz[i] = resource_size(res);
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res->end = res->start + resource_size(res) * total - 1;
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dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
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i, res, i, total);
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i += bar64;
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nres++;
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}
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iov->pos = pos;
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iov->nres = nres;
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iov->ctrl = ctrl;
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iov->total_VFs = total;
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iov->offset = offset;
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iov->stride = stride;
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iov->pgsz = pgsz;
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iov->self = dev;
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pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
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pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
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iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
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if (pdev)
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iov->dev = pci_dev_get(pdev);
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else
|
|
iov->dev = dev;
|
|
|
|
mutex_init(&iov->lock);
|
|
|
|
dev->sriov = iov;
|
|
dev->is_physfn = 1;
|
|
iov->max_VF_buses = virtfn_max_buses(dev);
|
|
|
|
return 0;
|
|
|
|
failed:
|
|
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
|
|
res = &dev->resource[i + PCI_IOV_RESOURCES];
|
|
res->flags = 0;
|
|
}
|
|
|
|
kfree(iov);
|
|
return rc;
|
|
}
|
|
|
|
static void sriov_release(struct pci_dev *dev)
|
|
{
|
|
BUG_ON(dev->sriov->num_VFs);
|
|
|
|
if (dev != dev->sriov->dev)
|
|
pci_dev_put(dev->sriov->dev);
|
|
|
|
mutex_destroy(&dev->sriov->lock);
|
|
|
|
kfree(dev->sriov);
|
|
dev->sriov = NULL;
|
|
}
|
|
|
|
static void sriov_restore_state(struct pci_dev *dev)
|
|
{
|
|
int i;
|
|
u16 ctrl;
|
|
struct pci_sriov *iov = dev->sriov;
|
|
|
|
pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
|
|
if (ctrl & PCI_SRIOV_CTRL_VFE)
|
|
return;
|
|
|
|
for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
|
|
pci_update_resource(dev, i);
|
|
|
|
pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
|
|
pci_iov_set_numvfs(dev, iov->num_VFs);
|
|
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
|
|
if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
|
|
msleep(100);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_init - initialize the IOV capability
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns 0 on success, or negative on failure.
|
|
*/
|
|
int pci_iov_init(struct pci_dev *dev)
|
|
{
|
|
int pos;
|
|
|
|
if (!pci_is_pcie(dev))
|
|
return -ENODEV;
|
|
|
|
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
|
|
if (pos)
|
|
return sriov_init(dev, pos);
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
/**
|
|
* pci_iov_release - release resources used by the IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_iov_release(struct pci_dev *dev)
|
|
{
|
|
if (dev->is_physfn)
|
|
sriov_release(dev);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_resource_bar - get position of the SR-IOV BAR
|
|
* @dev: the PCI device
|
|
* @resno: the resource number
|
|
*
|
|
* Returns position of the BAR encapsulated in the SR-IOV capability.
|
|
*/
|
|
int pci_iov_resource_bar(struct pci_dev *dev, int resno)
|
|
{
|
|
if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
|
|
return 0;
|
|
|
|
BUG_ON(!dev->is_physfn);
|
|
|
|
return dev->sriov->pos + PCI_SRIOV_BAR +
|
|
4 * (resno - PCI_IOV_RESOURCES);
|
|
}
|
|
|
|
resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
|
|
int resno)
|
|
{
|
|
return pci_iov_resource_size(dev, resno);
|
|
}
|
|
|
|
/**
|
|
* pci_sriov_resource_alignment - get resource alignment for VF BAR
|
|
* @dev: the PCI device
|
|
* @resno: the resource number
|
|
*
|
|
* Returns the alignment of the VF BAR found in the SR-IOV capability.
|
|
* This is not the same as the resource size which is defined as
|
|
* the VF BAR size multiplied by the number of VFs. The alignment
|
|
* is just the VF BAR size.
|
|
*/
|
|
resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
|
|
{
|
|
return pcibios_iov_resource_alignment(dev, resno);
|
|
}
|
|
|
|
/**
|
|
* pci_restore_iov_state - restore the state of the IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_restore_iov_state(struct pci_dev *dev)
|
|
{
|
|
if (dev->is_physfn)
|
|
sriov_restore_state(dev);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_bus_range - find bus range used by Virtual Function
|
|
* @bus: the PCI bus
|
|
*
|
|
* Returns max number of buses (exclude current one) used by Virtual
|
|
* Functions.
|
|
*/
|
|
int pci_iov_bus_range(struct pci_bus *bus)
|
|
{
|
|
int max = 0;
|
|
struct pci_dev *dev;
|
|
|
|
list_for_each_entry(dev, &bus->devices, bus_list) {
|
|
if (!dev->is_physfn)
|
|
continue;
|
|
if (dev->sriov->max_VF_buses > max)
|
|
max = dev->sriov->max_VF_buses;
|
|
}
|
|
|
|
return max ? max - bus->number : 0;
|
|
}
|
|
|
|
/**
|
|
* pci_enable_sriov - enable the SR-IOV capability
|
|
* @dev: the PCI device
|
|
* @nr_virtfn: number of virtual functions to enable
|
|
*
|
|
* Returns 0 on success, or negative on failure.
|
|
*/
|
|
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
|
|
{
|
|
might_sleep();
|
|
|
|
if (!dev->is_physfn)
|
|
return -ENOSYS;
|
|
|
|
return sriov_enable(dev, nr_virtfn);
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_enable_sriov);
|
|
|
|
/**
|
|
* pci_disable_sriov - disable the SR-IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_disable_sriov(struct pci_dev *dev)
|
|
{
|
|
might_sleep();
|
|
|
|
if (!dev->is_physfn)
|
|
return;
|
|
|
|
sriov_disable(dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_disable_sriov);
|
|
|
|
/**
|
|
* pci_num_vf - return number of VFs associated with a PF device_release_driver
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns number of VFs, or 0 if SR-IOV is not enabled.
|
|
*/
|
|
int pci_num_vf(struct pci_dev *dev)
|
|
{
|
|
if (!dev->is_physfn)
|
|
return 0;
|
|
|
|
return dev->sriov->num_VFs;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_num_vf);
|
|
|
|
/**
|
|
* pci_vfs_assigned - returns number of VFs are assigned to a guest
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns number of VFs belonging to this device that are assigned to a guest.
|
|
* If device is not a physical function returns 0.
|
|
*/
|
|
int pci_vfs_assigned(struct pci_dev *dev)
|
|
{
|
|
struct pci_dev *vfdev;
|
|
unsigned int vfs_assigned = 0;
|
|
unsigned short dev_id;
|
|
|
|
/* only search if we are a PF */
|
|
if (!dev->is_physfn)
|
|
return 0;
|
|
|
|
/*
|
|
* determine the device ID for the VFs, the vendor ID will be the
|
|
* same as the PF so there is no need to check for that one
|
|
*/
|
|
pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
|
|
|
|
/* loop through all the VFs to see if we own any that are assigned */
|
|
vfdev = pci_get_device(dev->vendor, dev_id, NULL);
|
|
while (vfdev) {
|
|
/*
|
|
* It is considered assigned if it is a virtual function with
|
|
* our dev as the physical function and the assigned bit is set
|
|
*/
|
|
if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
|
|
pci_is_dev_assigned(vfdev))
|
|
vfs_assigned++;
|
|
|
|
vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
|
|
}
|
|
|
|
return vfs_assigned;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_vfs_assigned);
|
|
|
|
/**
|
|
* pci_sriov_set_totalvfs -- reduce the TotalVFs available
|
|
* @dev: the PCI PF device
|
|
* @numvfs: number that should be used for TotalVFs supported
|
|
*
|
|
* Should be called from PF driver's probe routine with
|
|
* device's mutex held.
|
|
*
|
|
* Returns 0 if PF is an SRIOV-capable device and
|
|
* value of numvfs valid. If not a PF return -ENOSYS;
|
|
* if numvfs is invalid return -EINVAL;
|
|
* if VFs already enabled, return -EBUSY.
|
|
*/
|
|
int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
|
|
{
|
|
if (!dev->is_physfn)
|
|
return -ENOSYS;
|
|
if (numvfs > dev->sriov->total_VFs)
|
|
return -EINVAL;
|
|
|
|
/* Shouldn't change if VFs already enabled */
|
|
if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
|
|
return -EBUSY;
|
|
else
|
|
dev->sriov->driver_max_VFs = numvfs;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
|
|
|
|
/**
|
|
* pci_sriov_get_totalvfs -- get total VFs supported on this device
|
|
* @dev: the PCI PF device
|
|
*
|
|
* For a PCIe device with SRIOV support, return the PCIe
|
|
* SRIOV capability value of TotalVFs or the value of driver_max_VFs
|
|
* if the driver reduced it. Otherwise 0.
|
|
*/
|
|
int pci_sriov_get_totalvfs(struct pci_dev *dev)
|
|
{
|
|
if (!dev->is_physfn)
|
|
return 0;
|
|
|
|
if (dev->sriov->driver_max_VFs)
|
|
return dev->sriov->driver_max_VFs;
|
|
|
|
return dev->sriov->total_VFs;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
|