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![Paul Mackerras](/assets/img/avatar_default.png)
Current, when testing whether a page is dirty (when constructing the bitmap for the KVM_GET_DIRTY_LOG ioctl), we test the C (changed) bit in the HPT entries mapping the page, and if it is 0, we consider the page to be clean. However, the Power ISA doesn't require processors to set the C bit to 1 immediately when writing to a page, and in fact allows them to delay the writeback of the C bit until they receive a TLB invalidation for the page. Thus it is possible that the page could be dirty and we miss it. Now, if there are vcpus running, this is not serious since the collection of the dirty log is racy already - some vcpu could dirty the page just after we check it. But if there are no vcpus running we should return definitive results, in case we are in the final phase of migrating the guest. Also, if the permission bits in the HPTE don't allow writing, then we know that no CPU can set C. If the HPTE was previously writable and the page was modified, any C bit writeback would have been flushed out by the tlbie that we did when changing the HPTE to read-only. Otherwise we need to do a TLB invalidation even if the C bit is 0, and then check the C bit. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
1667 lines
43 KiB
C
1667 lines
43 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <linux/vmalloc.h>
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#include <linux/srcu.h>
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#include <linux/anon_inodes.h>
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#include <linux/file.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu-hash64.h>
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#include <asm/hvcall.h>
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#include <asm/synch.h>
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#include <asm/ppc-opcode.h>
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#include <asm/cputable.h>
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#include "book3s_hv_cma.h"
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/* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
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#define MAX_LPID_970 63
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/* Power architecture requires HPT is at least 256kB */
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#define PPC_MIN_HPT_ORDER 18
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static long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
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long pte_index, unsigned long pteh,
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unsigned long ptel, unsigned long *pte_idx_ret);
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static void kvmppc_rmap_reset(struct kvm *kvm);
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long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp)
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{
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unsigned long hpt = 0;
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struct revmap_entry *rev;
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struct page *page = NULL;
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long order = KVM_DEFAULT_HPT_ORDER;
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if (htab_orderp) {
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order = *htab_orderp;
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if (order < PPC_MIN_HPT_ORDER)
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order = PPC_MIN_HPT_ORDER;
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}
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kvm->arch.hpt_cma_alloc = 0;
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VM_BUG_ON(order < KVM_CMA_CHUNK_ORDER);
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page = kvm_alloc_hpt(1 << (order - PAGE_SHIFT));
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if (page) {
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hpt = (unsigned long)pfn_to_kaddr(page_to_pfn(page));
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kvm->arch.hpt_cma_alloc = 1;
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}
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/* Lastly try successively smaller sizes from the page allocator */
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while (!hpt && order > PPC_MIN_HPT_ORDER) {
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hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|
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__GFP_NOWARN, order - PAGE_SHIFT);
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if (!hpt)
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--order;
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}
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if (!hpt)
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return -ENOMEM;
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kvm->arch.hpt_virt = hpt;
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kvm->arch.hpt_order = order;
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/* HPTEs are 2**4 bytes long */
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kvm->arch.hpt_npte = 1ul << (order - 4);
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/* 128 (2**7) bytes in each HPTEG */
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kvm->arch.hpt_mask = (1ul << (order - 7)) - 1;
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/* Allocate reverse map array */
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rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte);
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if (!rev) {
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pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n");
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goto out_freehpt;
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}
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kvm->arch.revmap = rev;
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kvm->arch.sdr1 = __pa(hpt) | (order - 18);
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pr_info("KVM guest htab at %lx (order %ld), LPID %x\n",
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hpt, order, kvm->arch.lpid);
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if (htab_orderp)
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*htab_orderp = order;
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return 0;
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out_freehpt:
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if (kvm->arch.hpt_cma_alloc)
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kvm_release_hpt(page, 1 << (order - PAGE_SHIFT));
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else
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free_pages(hpt, order - PAGE_SHIFT);
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return -ENOMEM;
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}
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long kvmppc_alloc_reset_hpt(struct kvm *kvm, u32 *htab_orderp)
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{
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long err = -EBUSY;
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long order;
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mutex_lock(&kvm->lock);
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if (kvm->arch.rma_setup_done) {
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kvm->arch.rma_setup_done = 0;
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/* order rma_setup_done vs. vcpus_running */
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smp_mb();
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if (atomic_read(&kvm->arch.vcpus_running)) {
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kvm->arch.rma_setup_done = 1;
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goto out;
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}
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}
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if (kvm->arch.hpt_virt) {
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order = kvm->arch.hpt_order;
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/* Set the entire HPT to 0, i.e. invalid HPTEs */
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memset((void *)kvm->arch.hpt_virt, 0, 1ul << order);
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/*
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* Reset all the reverse-mapping chains for all memslots
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*/
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kvmppc_rmap_reset(kvm);
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/* Ensure that each vcpu will flush its TLB on next entry. */
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cpumask_setall(&kvm->arch.need_tlb_flush);
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*htab_orderp = order;
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err = 0;
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} else {
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err = kvmppc_alloc_hpt(kvm, htab_orderp);
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order = *htab_orderp;
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}
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out:
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mutex_unlock(&kvm->lock);
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return err;
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}
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void kvmppc_free_hpt(struct kvm *kvm)
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{
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kvmppc_free_lpid(kvm->arch.lpid);
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vfree(kvm->arch.revmap);
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if (kvm->arch.hpt_cma_alloc)
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kvm_release_hpt(virt_to_page(kvm->arch.hpt_virt),
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1 << (kvm->arch.hpt_order - PAGE_SHIFT));
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else
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free_pages(kvm->arch.hpt_virt,
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kvm->arch.hpt_order - PAGE_SHIFT);
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}
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/* Bits in first HPTE dword for pagesize 4k, 64k or 16M */
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static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize)
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{
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return (pgsize > 0x1000) ? HPTE_V_LARGE : 0;
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}
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/* Bits in second HPTE dword for pagesize 4k, 64k or 16M */
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static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize)
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{
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return (pgsize == 0x10000) ? 0x1000 : 0;
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}
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void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,
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unsigned long porder)
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{
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unsigned long i;
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unsigned long npages;
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unsigned long hp_v, hp_r;
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unsigned long addr, hash;
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unsigned long psize;
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unsigned long hp0, hp1;
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unsigned long idx_ret;
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long ret;
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struct kvm *kvm = vcpu->kvm;
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psize = 1ul << porder;
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npages = memslot->npages >> (porder - PAGE_SHIFT);
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/* VRMA can't be > 1TB */
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if (npages > 1ul << (40 - porder))
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npages = 1ul << (40 - porder);
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/* Can't use more than 1 HPTE per HPTEG */
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if (npages > kvm->arch.hpt_mask + 1)
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npages = kvm->arch.hpt_mask + 1;
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hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) |
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HPTE_V_BOLTED | hpte0_pgsize_encoding(psize);
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hp1 = hpte1_pgsize_encoding(psize) |
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HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX;
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for (i = 0; i < npages; ++i) {
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addr = i << porder;
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/* can't use hpt_hash since va > 64 bits */
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hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & kvm->arch.hpt_mask;
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/*
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* We assume that the hash table is empty and no
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* vcpus are using it at this stage. Since we create
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* at most one HPTE per HPTEG, we just assume entry 7
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* is available and use it.
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*/
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hash = (hash << 3) + 7;
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hp_v = hp0 | ((addr >> 16) & ~0x7fUL);
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hp_r = hp1 | addr;
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ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, hash, hp_v, hp_r,
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&idx_ret);
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if (ret != H_SUCCESS) {
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pr_err("KVM: map_vrma at %lx failed, ret=%ld\n",
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addr, ret);
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break;
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}
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}
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}
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int kvmppc_mmu_hv_init(void)
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{
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unsigned long host_lpid, rsvd_lpid;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return -EINVAL;
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/* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */
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if (cpu_has_feature(CPU_FTR_ARCH_206)) {
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host_lpid = mfspr(SPRN_LPID); /* POWER7 */
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rsvd_lpid = LPID_RSVD;
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} else {
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host_lpid = 0; /* PPC970 */
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rsvd_lpid = MAX_LPID_970;
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}
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kvmppc_init_lpid(rsvd_lpid + 1);
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kvmppc_claim_lpid(host_lpid);
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/* rsvd_lpid is reserved for use in partition switching */
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kvmppc_claim_lpid(rsvd_lpid);
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return 0;
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}
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static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
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{
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unsigned long msr = vcpu->arch.intr_msr;
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/* If transactional, change to suspend mode on IRQ delivery */
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if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr))
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msr |= MSR_TS_S;
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else
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msr |= vcpu->arch.shregs.msr & MSR_TS_MASK;
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kvmppc_set_msr(vcpu, msr);
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}
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/*
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* This is called to get a reference to a guest page if there isn't
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* one already in the memslot->arch.slot_phys[] array.
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*/
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static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
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struct kvm_memory_slot *memslot,
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unsigned long psize)
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{
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unsigned long start;
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long np, err;
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struct page *page, *hpage, *pages[1];
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unsigned long s, pgsize;
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unsigned long *physp;
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unsigned int is_io, got, pgorder;
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struct vm_area_struct *vma;
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unsigned long pfn, i, npages;
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physp = memslot->arch.slot_phys;
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if (!physp)
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return -EINVAL;
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if (physp[gfn - memslot->base_gfn])
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return 0;
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is_io = 0;
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got = 0;
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page = NULL;
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pgsize = psize;
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err = -EINVAL;
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start = gfn_to_hva_memslot(memslot, gfn);
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/* Instantiate and get the page we want access to */
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np = get_user_pages_fast(start, 1, 1, pages);
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if (np != 1) {
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/* Look up the vma for the page */
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down_read(¤t->mm->mmap_sem);
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vma = find_vma(current->mm, start);
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if (!vma || vma->vm_start > start ||
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start + psize > vma->vm_end ||
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!(vma->vm_flags & VM_PFNMAP))
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goto up_err;
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is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
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pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
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/* check alignment of pfn vs. requested page size */
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if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1)))
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goto up_err;
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up_read(¤t->mm->mmap_sem);
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} else {
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page = pages[0];
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got = KVMPPC_GOT_PAGE;
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/* See if this is a large page */
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s = PAGE_SIZE;
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if (PageHuge(page)) {
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hpage = compound_head(page);
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s <<= compound_order(hpage);
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/* Get the whole large page if slot alignment is ok */
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if (s > psize && slot_is_aligned(memslot, s) &&
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!(memslot->userspace_addr & (s - 1))) {
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start &= ~(s - 1);
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pgsize = s;
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get_page(hpage);
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put_page(page);
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page = hpage;
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}
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}
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if (s < psize)
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goto out;
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pfn = page_to_pfn(page);
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}
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npages = pgsize >> PAGE_SHIFT;
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pgorder = __ilog2(npages);
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physp += (gfn - memslot->base_gfn) & ~(npages - 1);
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spin_lock(&kvm->arch.slot_phys_lock);
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for (i = 0; i < npages; ++i) {
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if (!physp[i]) {
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physp[i] = ((pfn + i) << PAGE_SHIFT) +
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got + is_io + pgorder;
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got = 0;
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}
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}
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spin_unlock(&kvm->arch.slot_phys_lock);
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err = 0;
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out:
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if (got)
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put_page(page);
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return err;
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up_err:
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up_read(¤t->mm->mmap_sem);
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return err;
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}
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long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
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long pte_index, unsigned long pteh,
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unsigned long ptel, unsigned long *pte_idx_ret)
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{
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unsigned long psize, gpa, gfn;
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struct kvm_memory_slot *memslot;
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long ret;
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if (kvm->arch.using_mmu_notifiers)
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goto do_insert;
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psize = hpte_page_size(pteh, ptel);
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if (!psize)
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return H_PARAMETER;
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pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
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/* Find the memslot (if any) for this address */
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gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
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gfn = gpa >> PAGE_SHIFT;
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memslot = gfn_to_memslot(kvm, gfn);
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if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) {
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if (!slot_is_aligned(memslot, psize))
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return H_PARAMETER;
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if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0)
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return H_PARAMETER;
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}
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do_insert:
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/* Protect linux PTE lookup from page table destruction */
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rcu_read_lock_sched(); /* this disables preemption too */
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ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel,
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current->mm->pgd, false, pte_idx_ret);
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rcu_read_unlock_sched();
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if (ret == H_TOO_HARD) {
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/* this can't happen */
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pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n");
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ret = H_RESOURCE; /* or something */
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}
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return ret;
|
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}
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|
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/*
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* We come here on a H_ENTER call from the guest when we are not
|
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* using mmu notifiers and we don't have the requested page pinned
|
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* already.
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*/
|
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long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
|
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long pte_index, unsigned long pteh,
|
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unsigned long ptel)
|
|
{
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return kvmppc_virtmode_do_h_enter(vcpu->kvm, flags, pte_index,
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pteh, ptel, &vcpu->arch.gpr[4]);
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}
|
|
|
|
static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu,
|
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gva_t eaddr)
|
|
{
|
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u64 mask;
|
|
int i;
|
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|
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for (i = 0; i < vcpu->arch.slb_nr; i++) {
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if (!(vcpu->arch.slb[i].orige & SLB_ESID_V))
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continue;
|
|
|
|
if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T)
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mask = ESID_MASK_1T;
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else
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mask = ESID_MASK;
|
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|
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if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0)
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return &vcpu->arch.slb[i];
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}
|
|
return NULL;
|
|
}
|
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|
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static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r,
|
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unsigned long ea)
|
|
{
|
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unsigned long ra_mask;
|
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|
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ra_mask = hpte_page_size(v, r) - 1;
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return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask);
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}
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|
|
|
static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
|
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struct kvmppc_pte *gpte, bool data, bool iswrite)
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|
{
|
|
struct kvm *kvm = vcpu->kvm;
|
|
struct kvmppc_slb *slbe;
|
|
unsigned long slb_v;
|
|
unsigned long pp, key;
|
|
unsigned long v, gr;
|
|
unsigned long *hptep;
|
|
int index;
|
|
int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);
|
|
|
|
/* Get SLB entry */
|
|
if (virtmode) {
|
|
slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr);
|
|
if (!slbe)
|
|
return -EINVAL;
|
|
slb_v = slbe->origv;
|
|
} else {
|
|
/* real mode access */
|
|
slb_v = vcpu->kvm->arch.vrma_slb_v;
|
|
}
|
|
|
|
preempt_disable();
|
|
/* Find the HPTE in the hash table */
|
|
index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v,
|
|
HPTE_V_VALID | HPTE_V_ABSENT);
|
|
if (index < 0) {
|
|
preempt_enable();
|
|
return -ENOENT;
|
|
}
|
|
hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
|
|
v = hptep[0] & ~HPTE_V_HVLOCK;
|
|
gr = kvm->arch.revmap[index].guest_rpte;
|
|
|
|
/* Unlock the HPTE */
|
|
asm volatile("lwsync" : : : "memory");
|
|
hptep[0] = v;
|
|
preempt_enable();
|
|
|
|
gpte->eaddr = eaddr;
|
|
gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff);
|
|
|
|
/* Get PP bits and key for permission check */
|
|
pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
|
|
key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
|
|
key &= slb_v;
|
|
|
|
/* Calculate permissions */
|
|
gpte->may_read = hpte_read_permission(pp, key);
|
|
gpte->may_write = hpte_write_permission(pp, key);
|
|
gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G));
|
|
|
|
/* Storage key permission check for POWER7 */
|
|
if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) {
|
|
int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr);
|
|
if (amrfield & 1)
|
|
gpte->may_read = 0;
|
|
if (amrfield & 2)
|
|
gpte->may_write = 0;
|
|
}
|
|
|
|
/* Get the guest physical address */
|
|
gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Quick test for whether an instruction is a load or a store.
|
|
* If the instruction is a load or a store, then this will indicate
|
|
* which it is, at least on server processors. (Embedded processors
|
|
* have some external PID instructions that don't follow the rule
|
|
* embodied here.) If the instruction isn't a load or store, then
|
|
* this doesn't return anything useful.
|
|
*/
|
|
static int instruction_is_store(unsigned int instr)
|
|
{
|
|
unsigned int mask;
|
|
|
|
mask = 0x10000000;
|
|
if ((instr & 0xfc000000) == 0x7c000000)
|
|
mask = 0x100; /* major opcode 31 */
|
|
return (instr & mask) != 0;
|
|
}
|
|
|
|
static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|
unsigned long gpa, gva_t ea, int is_store)
|
|
{
|
|
int ret;
|
|
u32 last_inst;
|
|
unsigned long srr0 = kvmppc_get_pc(vcpu);
|
|
|
|
/* We try to load the last instruction. We don't let
|
|
* emulate_instruction do it as it doesn't check what
|
|
* kvmppc_ld returns.
|
|
* If we fail, we just return to the guest and try executing it again.
|
|
*/
|
|
if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) {
|
|
ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
|
|
if (ret != EMULATE_DONE || last_inst == KVM_INST_FETCH_FAILED)
|
|
return RESUME_GUEST;
|
|
vcpu->arch.last_inst = last_inst;
|
|
}
|
|
|
|
/*
|
|
* WARNING: We do not know for sure whether the instruction we just
|
|
* read from memory is the same that caused the fault in the first
|
|
* place. If the instruction we read is neither an load or a store,
|
|
* then it can't access memory, so we don't need to worry about
|
|
* enforcing access permissions. So, assuming it is a load or
|
|
* store, we just check that its direction (load or store) is
|
|
* consistent with the original fault, since that's what we
|
|
* checked the access permissions against. If there is a mismatch
|
|
* we just return and retry the instruction.
|
|
*/
|
|
|
|
if (instruction_is_store(kvmppc_get_last_inst(vcpu)) != !!is_store)
|
|
return RESUME_GUEST;
|
|
|
|
/*
|
|
* Emulated accesses are emulated by looking at the hash for
|
|
* translation once, then performing the access later. The
|
|
* translation could be invalidated in the meantime in which
|
|
* point performing the subsequent memory access on the old
|
|
* physical address could possibly be a security hole for the
|
|
* guest (but not the host).
|
|
*
|
|
* This is less of an issue for MMIO stores since they aren't
|
|
* globally visible. It could be an issue for MMIO loads to
|
|
* a certain extent but we'll ignore it for now.
|
|
*/
|
|
|
|
vcpu->arch.paddr_accessed = gpa;
|
|
vcpu->arch.vaddr_accessed = ea;
|
|
return kvmppc_emulate_mmio(run, vcpu);
|
|
}
|
|
|
|
int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|
unsigned long ea, unsigned long dsisr)
|
|
{
|
|
struct kvm *kvm = vcpu->kvm;
|
|
unsigned long *hptep, hpte[3], r;
|
|
unsigned long mmu_seq, psize, pte_size;
|
|
unsigned long gpa_base, gfn_base;
|
|
unsigned long gpa, gfn, hva, pfn;
|
|
struct kvm_memory_slot *memslot;
|
|
unsigned long *rmap;
|
|
struct revmap_entry *rev;
|
|
struct page *page, *pages[1];
|
|
long index, ret, npages;
|
|
unsigned long is_io;
|
|
unsigned int writing, write_ok;
|
|
struct vm_area_struct *vma;
|
|
unsigned long rcbits;
|
|
|
|
/*
|
|
* Real-mode code has already searched the HPT and found the
|
|
* entry we're interested in. Lock the entry and check that
|
|
* it hasn't changed. If it has, just return and re-execute the
|
|
* instruction.
|
|
*/
|
|
if (ea != vcpu->arch.pgfault_addr)
|
|
return RESUME_GUEST;
|
|
index = vcpu->arch.pgfault_index;
|
|
hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
|
|
rev = &kvm->arch.revmap[index];
|
|
preempt_disable();
|
|
while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
|
|
cpu_relax();
|
|
hpte[0] = hptep[0] & ~HPTE_V_HVLOCK;
|
|
hpte[1] = hptep[1];
|
|
hpte[2] = r = rev->guest_rpte;
|
|
asm volatile("lwsync" : : : "memory");
|
|
hptep[0] = hpte[0];
|
|
preempt_enable();
|
|
|
|
if (hpte[0] != vcpu->arch.pgfault_hpte[0] ||
|
|
hpte[1] != vcpu->arch.pgfault_hpte[1])
|
|
return RESUME_GUEST;
|
|
|
|
/* Translate the logical address and get the page */
|
|
psize = hpte_page_size(hpte[0], r);
|
|
gpa_base = r & HPTE_R_RPN & ~(psize - 1);
|
|
gfn_base = gpa_base >> PAGE_SHIFT;
|
|
gpa = gpa_base | (ea & (psize - 1));
|
|
gfn = gpa >> PAGE_SHIFT;
|
|
memslot = gfn_to_memslot(kvm, gfn);
|
|
|
|
/* No memslot means it's an emulated MMIO region */
|
|
if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
|
|
return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,
|
|
dsisr & DSISR_ISSTORE);
|
|
|
|
if (!kvm->arch.using_mmu_notifiers)
|
|
return -EFAULT; /* should never get here */
|
|
|
|
/*
|
|
* This should never happen, because of the slot_is_aligned()
|
|
* check in kvmppc_do_h_enter().
|
|
*/
|
|
if (gfn_base < memslot->base_gfn)
|
|
return -EFAULT;
|
|
|
|
/* used to check for invalidations in progress */
|
|
mmu_seq = kvm->mmu_notifier_seq;
|
|
smp_rmb();
|
|
|
|
is_io = 0;
|
|
pfn = 0;
|
|
page = NULL;
|
|
pte_size = PAGE_SIZE;
|
|
writing = (dsisr & DSISR_ISSTORE) != 0;
|
|
/* If writing != 0, then the HPTE must allow writing, if we get here */
|
|
write_ok = writing;
|
|
hva = gfn_to_hva_memslot(memslot, gfn);
|
|
npages = get_user_pages_fast(hva, 1, writing, pages);
|
|
if (npages < 1) {
|
|
/* Check if it's an I/O mapping */
|
|
down_read(¤t->mm->mmap_sem);
|
|
vma = find_vma(current->mm, hva);
|
|
if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
|
|
(vma->vm_flags & VM_PFNMAP)) {
|
|
pfn = vma->vm_pgoff +
|
|
((hva - vma->vm_start) >> PAGE_SHIFT);
|
|
pte_size = psize;
|
|
is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
|
|
write_ok = vma->vm_flags & VM_WRITE;
|
|
}
|
|
up_read(¤t->mm->mmap_sem);
|
|
if (!pfn)
|
|
return -EFAULT;
|
|
} else {
|
|
page = pages[0];
|
|
pfn = page_to_pfn(page);
|
|
if (PageHuge(page)) {
|
|
page = compound_head(page);
|
|
pte_size <<= compound_order(page);
|
|
}
|
|
/* if the guest wants write access, see if that is OK */
|
|
if (!writing && hpte_is_writable(r)) {
|
|
unsigned int hugepage_shift;
|
|
pte_t *ptep, pte;
|
|
|
|
/*
|
|
* We need to protect against page table destruction
|
|
* while looking up and updating the pte.
|
|
*/
|
|
rcu_read_lock_sched();
|
|
ptep = find_linux_pte_or_hugepte(current->mm->pgd,
|
|
hva, &hugepage_shift);
|
|
if (ptep) {
|
|
pte = kvmppc_read_update_linux_pte(ptep, 1,
|
|
hugepage_shift);
|
|
if (pte_write(pte))
|
|
write_ok = 1;
|
|
}
|
|
rcu_read_unlock_sched();
|
|
}
|
|
}
|
|
|
|
ret = -EFAULT;
|
|
if (psize > pte_size)
|
|
goto out_put;
|
|
|
|
/* Check WIMG vs. the actual page we're accessing */
|
|
if (!hpte_cache_flags_ok(r, is_io)) {
|
|
if (is_io)
|
|
return -EFAULT;
|
|
/*
|
|
* Allow guest to map emulated device memory as
|
|
* uncacheable, but actually make it cacheable.
|
|
*/
|
|
r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M;
|
|
}
|
|
|
|
/*
|
|
* Set the HPTE to point to pfn.
|
|
* Since the pfn is at PAGE_SIZE granularity, make sure we
|
|
* don't mask out lower-order bits if psize < PAGE_SIZE.
|
|
*/
|
|
if (psize < PAGE_SIZE)
|
|
psize = PAGE_SIZE;
|
|
r = (r & ~(HPTE_R_PP0 - psize)) | ((pfn << PAGE_SHIFT) & ~(psize - 1));
|
|
if (hpte_is_writable(r) && !write_ok)
|
|
r = hpte_make_readonly(r);
|
|
ret = RESUME_GUEST;
|
|
preempt_disable();
|
|
while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
|
|
cpu_relax();
|
|
if ((hptep[0] & ~HPTE_V_HVLOCK) != hpte[0] || hptep[1] != hpte[1] ||
|
|
rev->guest_rpte != hpte[2])
|
|
/* HPTE has been changed under us; let the guest retry */
|
|
goto out_unlock;
|
|
hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
|
|
|
|
/* Always put the HPTE in the rmap chain for the page base address */
|
|
rmap = &memslot->arch.rmap[gfn_base - memslot->base_gfn];
|
|
lock_rmap(rmap);
|
|
|
|
/* Check if we might have been invalidated; let the guest retry if so */
|
|
ret = RESUME_GUEST;
|
|
if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) {
|
|
unlock_rmap(rmap);
|
|
goto out_unlock;
|
|
}
|
|
|
|
/* Only set R/C in real HPTE if set in both *rmap and guest_rpte */
|
|
rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT;
|
|
r &= rcbits | ~(HPTE_R_R | HPTE_R_C);
|
|
|
|
if (hptep[0] & HPTE_V_VALID) {
|
|
/* HPTE was previously valid, so we need to invalidate it */
|
|
unlock_rmap(rmap);
|
|
hptep[0] |= HPTE_V_ABSENT;
|
|
kvmppc_invalidate_hpte(kvm, hptep, index);
|
|
/* don't lose previous R and C bits */
|
|
r |= hptep[1] & (HPTE_R_R | HPTE_R_C);
|
|
} else {
|
|
kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0);
|
|
}
|
|
|
|
hptep[1] = r;
|
|
eieio();
|
|
hptep[0] = hpte[0];
|
|
asm volatile("ptesync" : : : "memory");
|
|
preempt_enable();
|
|
if (page && hpte_is_writable(r))
|
|
SetPageDirty(page);
|
|
|
|
out_put:
|
|
if (page) {
|
|
/*
|
|
* We drop pages[0] here, not page because page might
|
|
* have been set to the head page of a compound, but
|
|
* we have to drop the reference on the correct tail
|
|
* page to match the get inside gup()
|
|
*/
|
|
put_page(pages[0]);
|
|
}
|
|
return ret;
|
|
|
|
out_unlock:
|
|
hptep[0] &= ~HPTE_V_HVLOCK;
|
|
preempt_enable();
|
|
goto out_put;
|
|
}
|
|
|
|
static void kvmppc_rmap_reset(struct kvm *kvm)
|
|
{
|
|
struct kvm_memslots *slots;
|
|
struct kvm_memory_slot *memslot;
|
|
int srcu_idx;
|
|
|
|
srcu_idx = srcu_read_lock(&kvm->srcu);
|
|
slots = kvm->memslots;
|
|
kvm_for_each_memslot(memslot, slots) {
|
|
/*
|
|
* This assumes it is acceptable to lose reference and
|
|
* change bits across a reset.
|
|
*/
|
|
memset(memslot->arch.rmap, 0,
|
|
memslot->npages * sizeof(*memslot->arch.rmap));
|
|
}
|
|
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
|
}
|
|
|
|
static int kvm_handle_hva_range(struct kvm *kvm,
|
|
unsigned long start,
|
|
unsigned long end,
|
|
int (*handler)(struct kvm *kvm,
|
|
unsigned long *rmapp,
|
|
unsigned long gfn))
|
|
{
|
|
int ret;
|
|
int retval = 0;
|
|
struct kvm_memslots *slots;
|
|
struct kvm_memory_slot *memslot;
|
|
|
|
slots = kvm_memslots(kvm);
|
|
kvm_for_each_memslot(memslot, slots) {
|
|
unsigned long hva_start, hva_end;
|
|
gfn_t gfn, gfn_end;
|
|
|
|
hva_start = max(start, memslot->userspace_addr);
|
|
hva_end = min(end, memslot->userspace_addr +
|
|
(memslot->npages << PAGE_SHIFT));
|
|
if (hva_start >= hva_end)
|
|
continue;
|
|
/*
|
|
* {gfn(page) | page intersects with [hva_start, hva_end)} =
|
|
* {gfn, gfn+1, ..., gfn_end-1}.
|
|
*/
|
|
gfn = hva_to_gfn_memslot(hva_start, memslot);
|
|
gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
|
|
|
|
for (; gfn < gfn_end; ++gfn) {
|
|
gfn_t gfn_offset = gfn - memslot->base_gfn;
|
|
|
|
ret = handler(kvm, &memslot->arch.rmap[gfn_offset], gfn);
|
|
retval |= ret;
|
|
}
|
|
}
|
|
|
|
return retval;
|
|
}
|
|
|
|
static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
|
|
int (*handler)(struct kvm *kvm, unsigned long *rmapp,
|
|
unsigned long gfn))
|
|
{
|
|
return kvm_handle_hva_range(kvm, hva, hva + 1, handler);
|
|
}
|
|
|
|
static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
|
|
unsigned long gfn)
|
|
{
|
|
struct revmap_entry *rev = kvm->arch.revmap;
|
|
unsigned long h, i, j;
|
|
unsigned long *hptep;
|
|
unsigned long ptel, psize, rcbits;
|
|
|
|
for (;;) {
|
|
lock_rmap(rmapp);
|
|
if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
|
|
unlock_rmap(rmapp);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* To avoid an ABBA deadlock with the HPTE lock bit,
|
|
* we can't spin on the HPTE lock while holding the
|
|
* rmap chain lock.
|
|
*/
|
|
i = *rmapp & KVMPPC_RMAP_INDEX;
|
|
hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
|
|
if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
|
|
/* unlock rmap before spinning on the HPTE lock */
|
|
unlock_rmap(rmapp);
|
|
while (hptep[0] & HPTE_V_HVLOCK)
|
|
cpu_relax();
|
|
continue;
|
|
}
|
|
j = rev[i].forw;
|
|
if (j == i) {
|
|
/* chain is now empty */
|
|
*rmapp &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
|
|
} else {
|
|
/* remove i from chain */
|
|
h = rev[i].back;
|
|
rev[h].forw = j;
|
|
rev[j].back = h;
|
|
rev[i].forw = rev[i].back = i;
|
|
*rmapp = (*rmapp & ~KVMPPC_RMAP_INDEX) | j;
|
|
}
|
|
|
|
/* Now check and modify the HPTE */
|
|
ptel = rev[i].guest_rpte;
|
|
psize = hpte_page_size(hptep[0], ptel);
|
|
if ((hptep[0] & HPTE_V_VALID) &&
|
|
hpte_rpn(ptel, psize) == gfn) {
|
|
if (kvm->arch.using_mmu_notifiers)
|
|
hptep[0] |= HPTE_V_ABSENT;
|
|
kvmppc_invalidate_hpte(kvm, hptep, i);
|
|
/* Harvest R and C */
|
|
rcbits = hptep[1] & (HPTE_R_R | HPTE_R_C);
|
|
*rmapp |= rcbits << KVMPPC_RMAP_RC_SHIFT;
|
|
if (rcbits & ~rev[i].guest_rpte) {
|
|
rev[i].guest_rpte = ptel | rcbits;
|
|
note_hpte_modification(kvm, &rev[i]);
|
|
}
|
|
}
|
|
unlock_rmap(rmapp);
|
|
hptep[0] &= ~HPTE_V_HVLOCK;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int kvm_unmap_hva_hv(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
if (kvm->arch.using_mmu_notifiers)
|
|
kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
|
|
return 0;
|
|
}
|
|
|
|
int kvm_unmap_hva_range_hv(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
{
|
|
if (kvm->arch.using_mmu_notifiers)
|
|
kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp);
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_core_flush_memslot_hv(struct kvm *kvm,
|
|
struct kvm_memory_slot *memslot)
|
|
{
|
|
unsigned long *rmapp;
|
|
unsigned long gfn;
|
|
unsigned long n;
|
|
|
|
rmapp = memslot->arch.rmap;
|
|
gfn = memslot->base_gfn;
|
|
for (n = memslot->npages; n; --n) {
|
|
/*
|
|
* Testing the present bit without locking is OK because
|
|
* the memslot has been marked invalid already, and hence
|
|
* no new HPTEs referencing this page can be created,
|
|
* thus the present bit can't go from 0 to 1.
|
|
*/
|
|
if (*rmapp & KVMPPC_RMAP_PRESENT)
|
|
kvm_unmap_rmapp(kvm, rmapp, gfn);
|
|
++rmapp;
|
|
++gfn;
|
|
}
|
|
}
|
|
|
|
static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
|
|
unsigned long gfn)
|
|
{
|
|
struct revmap_entry *rev = kvm->arch.revmap;
|
|
unsigned long head, i, j;
|
|
unsigned long *hptep;
|
|
int ret = 0;
|
|
|
|
retry:
|
|
lock_rmap(rmapp);
|
|
if (*rmapp & KVMPPC_RMAP_REFERENCED) {
|
|
*rmapp &= ~KVMPPC_RMAP_REFERENCED;
|
|
ret = 1;
|
|
}
|
|
if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
|
|
unlock_rmap(rmapp);
|
|
return ret;
|
|
}
|
|
|
|
i = head = *rmapp & KVMPPC_RMAP_INDEX;
|
|
do {
|
|
hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
|
|
j = rev[i].forw;
|
|
|
|
/* If this HPTE isn't referenced, ignore it */
|
|
if (!(hptep[1] & HPTE_R_R))
|
|
continue;
|
|
|
|
if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
|
|
/* unlock rmap before spinning on the HPTE lock */
|
|
unlock_rmap(rmapp);
|
|
while (hptep[0] & HPTE_V_HVLOCK)
|
|
cpu_relax();
|
|
goto retry;
|
|
}
|
|
|
|
/* Now check and modify the HPTE */
|
|
if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_R)) {
|
|
kvmppc_clear_ref_hpte(kvm, hptep, i);
|
|
if (!(rev[i].guest_rpte & HPTE_R_R)) {
|
|
rev[i].guest_rpte |= HPTE_R_R;
|
|
note_hpte_modification(kvm, &rev[i]);
|
|
}
|
|
ret = 1;
|
|
}
|
|
hptep[0] &= ~HPTE_V_HVLOCK;
|
|
} while ((i = j) != head);
|
|
|
|
unlock_rmap(rmapp);
|
|
return ret;
|
|
}
|
|
|
|
int kvm_age_hva_hv(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
if (!kvm->arch.using_mmu_notifiers)
|
|
return 0;
|
|
return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
|
|
}
|
|
|
|
static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
|
|
unsigned long gfn)
|
|
{
|
|
struct revmap_entry *rev = kvm->arch.revmap;
|
|
unsigned long head, i, j;
|
|
unsigned long *hp;
|
|
int ret = 1;
|
|
|
|
if (*rmapp & KVMPPC_RMAP_REFERENCED)
|
|
return 1;
|
|
|
|
lock_rmap(rmapp);
|
|
if (*rmapp & KVMPPC_RMAP_REFERENCED)
|
|
goto out;
|
|
|
|
if (*rmapp & KVMPPC_RMAP_PRESENT) {
|
|
i = head = *rmapp & KVMPPC_RMAP_INDEX;
|
|
do {
|
|
hp = (unsigned long *)(kvm->arch.hpt_virt + (i << 4));
|
|
j = rev[i].forw;
|
|
if (hp[1] & HPTE_R_R)
|
|
goto out;
|
|
} while ((i = j) != head);
|
|
}
|
|
ret = 0;
|
|
|
|
out:
|
|
unlock_rmap(rmapp);
|
|
return ret;
|
|
}
|
|
|
|
int kvm_test_age_hva_hv(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
if (!kvm->arch.using_mmu_notifiers)
|
|
return 0;
|
|
return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp);
|
|
}
|
|
|
|
void kvm_set_spte_hva_hv(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
{
|
|
if (!kvm->arch.using_mmu_notifiers)
|
|
return;
|
|
kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
|
|
}
|
|
|
|
static int vcpus_running(struct kvm *kvm)
|
|
{
|
|
return atomic_read(&kvm->arch.vcpus_running) != 0;
|
|
}
|
|
|
|
/*
|
|
* Returns the number of system pages that are dirty.
|
|
* This can be more than 1 if we find a huge-page HPTE.
|
|
*/
|
|
static int kvm_test_clear_dirty_npages(struct kvm *kvm, unsigned long *rmapp)
|
|
{
|
|
struct revmap_entry *rev = kvm->arch.revmap;
|
|
unsigned long head, i, j;
|
|
unsigned long n;
|
|
unsigned long v, r;
|
|
unsigned long *hptep;
|
|
int npages_dirty = 0;
|
|
|
|
retry:
|
|
lock_rmap(rmapp);
|
|
if (*rmapp & KVMPPC_RMAP_CHANGED) {
|
|
*rmapp &= ~KVMPPC_RMAP_CHANGED;
|
|
npages_dirty = 1;
|
|
}
|
|
if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
|
|
unlock_rmap(rmapp);
|
|
return npages_dirty;
|
|
}
|
|
|
|
i = head = *rmapp & KVMPPC_RMAP_INDEX;
|
|
do {
|
|
hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
|
|
j = rev[i].forw;
|
|
|
|
/*
|
|
* Checking the C (changed) bit here is racy since there
|
|
* is no guarantee about when the hardware writes it back.
|
|
* If the HPTE is not writable then it is stable since the
|
|
* page can't be written to, and we would have done a tlbie
|
|
* (which forces the hardware to complete any writeback)
|
|
* when making the HPTE read-only.
|
|
* If vcpus are running then this call is racy anyway
|
|
* since the page could get dirtied subsequently, so we
|
|
* expect there to be a further call which would pick up
|
|
* any delayed C bit writeback.
|
|
* Otherwise we need to do the tlbie even if C==0 in
|
|
* order to pick up any delayed writeback of C.
|
|
*/
|
|
if (!(hptep[1] & HPTE_R_C) &&
|
|
(!hpte_is_writable(hptep[1]) || vcpus_running(kvm)))
|
|
continue;
|
|
|
|
if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
|
|
/* unlock rmap before spinning on the HPTE lock */
|
|
unlock_rmap(rmapp);
|
|
while (hptep[0] & HPTE_V_HVLOCK)
|
|
cpu_relax();
|
|
goto retry;
|
|
}
|
|
|
|
/* Now check and modify the HPTE */
|
|
if (!(hptep[0] & HPTE_V_VALID))
|
|
continue;
|
|
|
|
/* need to make it temporarily absent so C is stable */
|
|
hptep[0] |= HPTE_V_ABSENT;
|
|
kvmppc_invalidate_hpte(kvm, hptep, i);
|
|
v = hptep[0];
|
|
r = hptep[1];
|
|
if (r & HPTE_R_C) {
|
|
hptep[1] = r & ~HPTE_R_C;
|
|
if (!(rev[i].guest_rpte & HPTE_R_C)) {
|
|
rev[i].guest_rpte |= HPTE_R_C;
|
|
note_hpte_modification(kvm, &rev[i]);
|
|
}
|
|
n = hpte_page_size(v, r);
|
|
n = (n + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
|
if (n > npages_dirty)
|
|
npages_dirty = n;
|
|
eieio();
|
|
}
|
|
v &= ~(HPTE_V_ABSENT | HPTE_V_HVLOCK);
|
|
v |= HPTE_V_VALID;
|
|
hptep[0] = v;
|
|
} while ((i = j) != head);
|
|
|
|
unlock_rmap(rmapp);
|
|
return npages_dirty;
|
|
}
|
|
|
|
static void harvest_vpa_dirty(struct kvmppc_vpa *vpa,
|
|
struct kvm_memory_slot *memslot,
|
|
unsigned long *map)
|
|
{
|
|
unsigned long gfn;
|
|
|
|
if (!vpa->dirty || !vpa->pinned_addr)
|
|
return;
|
|
gfn = vpa->gpa >> PAGE_SHIFT;
|
|
if (gfn < memslot->base_gfn ||
|
|
gfn >= memslot->base_gfn + memslot->npages)
|
|
return;
|
|
|
|
vpa->dirty = false;
|
|
if (map)
|
|
__set_bit_le(gfn - memslot->base_gfn, map);
|
|
}
|
|
|
|
long kvmppc_hv_get_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot,
|
|
unsigned long *map)
|
|
{
|
|
unsigned long i, j;
|
|
unsigned long *rmapp;
|
|
struct kvm_vcpu *vcpu;
|
|
|
|
preempt_disable();
|
|
rmapp = memslot->arch.rmap;
|
|
for (i = 0; i < memslot->npages; ++i) {
|
|
int npages = kvm_test_clear_dirty_npages(kvm, rmapp);
|
|
/*
|
|
* Note that if npages > 0 then i must be a multiple of npages,
|
|
* since we always put huge-page HPTEs in the rmap chain
|
|
* corresponding to their page base address.
|
|
*/
|
|
if (npages && map)
|
|
for (j = i; npages; ++j, --npages)
|
|
__set_bit_le(j, map);
|
|
++rmapp;
|
|
}
|
|
|
|
/* Harvest dirty bits from VPA and DTL updates */
|
|
/* Note: we never modify the SLB shadow buffer areas */
|
|
kvm_for_each_vcpu(i, vcpu, kvm) {
|
|
spin_lock(&vcpu->arch.vpa_update_lock);
|
|
harvest_vpa_dirty(&vcpu->arch.vpa, memslot, map);
|
|
harvest_vpa_dirty(&vcpu->arch.dtl, memslot, map);
|
|
spin_unlock(&vcpu->arch.vpa_update_lock);
|
|
}
|
|
preempt_enable();
|
|
return 0;
|
|
}
|
|
|
|
void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
|
|
unsigned long *nb_ret)
|
|
{
|
|
struct kvm_memory_slot *memslot;
|
|
unsigned long gfn = gpa >> PAGE_SHIFT;
|
|
struct page *page, *pages[1];
|
|
int npages;
|
|
unsigned long hva, offset;
|
|
unsigned long pa;
|
|
unsigned long *physp;
|
|
int srcu_idx;
|
|
|
|
srcu_idx = srcu_read_lock(&kvm->srcu);
|
|
memslot = gfn_to_memslot(kvm, gfn);
|
|
if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
|
|
goto err;
|
|
if (!kvm->arch.using_mmu_notifiers) {
|
|
physp = memslot->arch.slot_phys;
|
|
if (!physp)
|
|
goto err;
|
|
physp += gfn - memslot->base_gfn;
|
|
pa = *physp;
|
|
if (!pa) {
|
|
if (kvmppc_get_guest_page(kvm, gfn, memslot,
|
|
PAGE_SIZE) < 0)
|
|
goto err;
|
|
pa = *physp;
|
|
}
|
|
page = pfn_to_page(pa >> PAGE_SHIFT);
|
|
get_page(page);
|
|
} else {
|
|
hva = gfn_to_hva_memslot(memslot, gfn);
|
|
npages = get_user_pages_fast(hva, 1, 1, pages);
|
|
if (npages < 1)
|
|
goto err;
|
|
page = pages[0];
|
|
}
|
|
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
|
|
|
offset = gpa & (PAGE_SIZE - 1);
|
|
if (nb_ret)
|
|
*nb_ret = PAGE_SIZE - offset;
|
|
return page_address(page) + offset;
|
|
|
|
err:
|
|
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
|
return NULL;
|
|
}
|
|
|
|
void kvmppc_unpin_guest_page(struct kvm *kvm, void *va, unsigned long gpa,
|
|
bool dirty)
|
|
{
|
|
struct page *page = virt_to_page(va);
|
|
struct kvm_memory_slot *memslot;
|
|
unsigned long gfn;
|
|
unsigned long *rmap;
|
|
int srcu_idx;
|
|
|
|
put_page(page);
|
|
|
|
if (!dirty || !kvm->arch.using_mmu_notifiers)
|
|
return;
|
|
|
|
/* We need to mark this page dirty in the rmap chain */
|
|
gfn = gpa >> PAGE_SHIFT;
|
|
srcu_idx = srcu_read_lock(&kvm->srcu);
|
|
memslot = gfn_to_memslot(kvm, gfn);
|
|
if (memslot) {
|
|
rmap = &memslot->arch.rmap[gfn - memslot->base_gfn];
|
|
lock_rmap(rmap);
|
|
*rmap |= KVMPPC_RMAP_CHANGED;
|
|
unlock_rmap(rmap);
|
|
}
|
|
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
|
}
|
|
|
|
/*
|
|
* Functions for reading and writing the hash table via reads and
|
|
* writes on a file descriptor.
|
|
*
|
|
* Reads return the guest view of the hash table, which has to be
|
|
* pieced together from the real hash table and the guest_rpte
|
|
* values in the revmap array.
|
|
*
|
|
* On writes, each HPTE written is considered in turn, and if it
|
|
* is valid, it is written to the HPT as if an H_ENTER with the
|
|
* exact flag set was done. When the invalid count is non-zero
|
|
* in the header written to the stream, the kernel will make
|
|
* sure that that many HPTEs are invalid, and invalidate them
|
|
* if not.
|
|
*/
|
|
|
|
struct kvm_htab_ctx {
|
|
unsigned long index;
|
|
unsigned long flags;
|
|
struct kvm *kvm;
|
|
int first_pass;
|
|
};
|
|
|
|
#define HPTE_SIZE (2 * sizeof(unsigned long))
|
|
|
|
/*
|
|
* Returns 1 if this HPT entry has been modified or has pending
|
|
* R/C bit changes.
|
|
*/
|
|
static int hpte_dirty(struct revmap_entry *revp, unsigned long *hptp)
|
|
{
|
|
unsigned long rcbits_unset;
|
|
|
|
if (revp->guest_rpte & HPTE_GR_MODIFIED)
|
|
return 1;
|
|
|
|
/* Also need to consider changes in reference and changed bits */
|
|
rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C);
|
|
if ((hptp[0] & HPTE_V_VALID) && (hptp[1] & rcbits_unset))
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static long record_hpte(unsigned long flags, unsigned long *hptp,
|
|
unsigned long *hpte, struct revmap_entry *revp,
|
|
int want_valid, int first_pass)
|
|
{
|
|
unsigned long v, r;
|
|
unsigned long rcbits_unset;
|
|
int ok = 1;
|
|
int valid, dirty;
|
|
|
|
/* Unmodified entries are uninteresting except on the first pass */
|
|
dirty = hpte_dirty(revp, hptp);
|
|
if (!first_pass && !dirty)
|
|
return 0;
|
|
|
|
valid = 0;
|
|
if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT)) {
|
|
valid = 1;
|
|
if ((flags & KVM_GET_HTAB_BOLTED_ONLY) &&
|
|
!(hptp[0] & HPTE_V_BOLTED))
|
|
valid = 0;
|
|
}
|
|
if (valid != want_valid)
|
|
return 0;
|
|
|
|
v = r = 0;
|
|
if (valid || dirty) {
|
|
/* lock the HPTE so it's stable and read it */
|
|
preempt_disable();
|
|
while (!try_lock_hpte(hptp, HPTE_V_HVLOCK))
|
|
cpu_relax();
|
|
v = hptp[0];
|
|
|
|
/* re-evaluate valid and dirty from synchronized HPTE value */
|
|
valid = !!(v & HPTE_V_VALID);
|
|
dirty = !!(revp->guest_rpte & HPTE_GR_MODIFIED);
|
|
|
|
/* Harvest R and C into guest view if necessary */
|
|
rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C);
|
|
if (valid && (rcbits_unset & hptp[1])) {
|
|
revp->guest_rpte |= (hptp[1] & (HPTE_R_R | HPTE_R_C)) |
|
|
HPTE_GR_MODIFIED;
|
|
dirty = 1;
|
|
}
|
|
|
|
if (v & HPTE_V_ABSENT) {
|
|
v &= ~HPTE_V_ABSENT;
|
|
v |= HPTE_V_VALID;
|
|
valid = 1;
|
|
}
|
|
if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && !(v & HPTE_V_BOLTED))
|
|
valid = 0;
|
|
|
|
r = revp->guest_rpte;
|
|
/* only clear modified if this is the right sort of entry */
|
|
if (valid == want_valid && dirty) {
|
|
r &= ~HPTE_GR_MODIFIED;
|
|
revp->guest_rpte = r;
|
|
}
|
|
asm volatile(PPC_RELEASE_BARRIER "" : : : "memory");
|
|
hptp[0] &= ~HPTE_V_HVLOCK;
|
|
preempt_enable();
|
|
if (!(valid == want_valid && (first_pass || dirty)))
|
|
ok = 0;
|
|
}
|
|
hpte[0] = v;
|
|
hpte[1] = r;
|
|
return ok;
|
|
}
|
|
|
|
static ssize_t kvm_htab_read(struct file *file, char __user *buf,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
struct kvm_htab_ctx *ctx = file->private_data;
|
|
struct kvm *kvm = ctx->kvm;
|
|
struct kvm_get_htab_header hdr;
|
|
unsigned long *hptp;
|
|
struct revmap_entry *revp;
|
|
unsigned long i, nb, nw;
|
|
unsigned long __user *lbuf;
|
|
struct kvm_get_htab_header __user *hptr;
|
|
unsigned long flags;
|
|
int first_pass;
|
|
unsigned long hpte[2];
|
|
|
|
if (!access_ok(VERIFY_WRITE, buf, count))
|
|
return -EFAULT;
|
|
|
|
first_pass = ctx->first_pass;
|
|
flags = ctx->flags;
|
|
|
|
i = ctx->index;
|
|
hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
|
|
revp = kvm->arch.revmap + i;
|
|
lbuf = (unsigned long __user *)buf;
|
|
|
|
nb = 0;
|
|
while (nb + sizeof(hdr) + HPTE_SIZE < count) {
|
|
/* Initialize header */
|
|
hptr = (struct kvm_get_htab_header __user *)buf;
|
|
hdr.n_valid = 0;
|
|
hdr.n_invalid = 0;
|
|
nw = nb;
|
|
nb += sizeof(hdr);
|
|
lbuf = (unsigned long __user *)(buf + sizeof(hdr));
|
|
|
|
/* Skip uninteresting entries, i.e. clean on not-first pass */
|
|
if (!first_pass) {
|
|
while (i < kvm->arch.hpt_npte &&
|
|
!hpte_dirty(revp, hptp)) {
|
|
++i;
|
|
hptp += 2;
|
|
++revp;
|
|
}
|
|
}
|
|
hdr.index = i;
|
|
|
|
/* Grab a series of valid entries */
|
|
while (i < kvm->arch.hpt_npte &&
|
|
hdr.n_valid < 0xffff &&
|
|
nb + HPTE_SIZE < count &&
|
|
record_hpte(flags, hptp, hpte, revp, 1, first_pass)) {
|
|
/* valid entry, write it out */
|
|
++hdr.n_valid;
|
|
if (__put_user(hpte[0], lbuf) ||
|
|
__put_user(hpte[1], lbuf + 1))
|
|
return -EFAULT;
|
|
nb += HPTE_SIZE;
|
|
lbuf += 2;
|
|
++i;
|
|
hptp += 2;
|
|
++revp;
|
|
}
|
|
/* Now skip invalid entries while we can */
|
|
while (i < kvm->arch.hpt_npte &&
|
|
hdr.n_invalid < 0xffff &&
|
|
record_hpte(flags, hptp, hpte, revp, 0, first_pass)) {
|
|
/* found an invalid entry */
|
|
++hdr.n_invalid;
|
|
++i;
|
|
hptp += 2;
|
|
++revp;
|
|
}
|
|
|
|
if (hdr.n_valid || hdr.n_invalid) {
|
|
/* write back the header */
|
|
if (__copy_to_user(hptr, &hdr, sizeof(hdr)))
|
|
return -EFAULT;
|
|
nw = nb;
|
|
buf = (char __user *)lbuf;
|
|
} else {
|
|
nb = nw;
|
|
}
|
|
|
|
/* Check if we've wrapped around the hash table */
|
|
if (i >= kvm->arch.hpt_npte) {
|
|
i = 0;
|
|
ctx->first_pass = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
ctx->index = i;
|
|
|
|
return nb;
|
|
}
|
|
|
|
static ssize_t kvm_htab_write(struct file *file, const char __user *buf,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
struct kvm_htab_ctx *ctx = file->private_data;
|
|
struct kvm *kvm = ctx->kvm;
|
|
struct kvm_get_htab_header hdr;
|
|
unsigned long i, j;
|
|
unsigned long v, r;
|
|
unsigned long __user *lbuf;
|
|
unsigned long *hptp;
|
|
unsigned long tmp[2];
|
|
ssize_t nb;
|
|
long int err, ret;
|
|
int rma_setup;
|
|
|
|
if (!access_ok(VERIFY_READ, buf, count))
|
|
return -EFAULT;
|
|
|
|
/* lock out vcpus from running while we're doing this */
|
|
mutex_lock(&kvm->lock);
|
|
rma_setup = kvm->arch.rma_setup_done;
|
|
if (rma_setup) {
|
|
kvm->arch.rma_setup_done = 0; /* temporarily */
|
|
/* order rma_setup_done vs. vcpus_running */
|
|
smp_mb();
|
|
if (atomic_read(&kvm->arch.vcpus_running)) {
|
|
kvm->arch.rma_setup_done = 1;
|
|
mutex_unlock(&kvm->lock);
|
|
return -EBUSY;
|
|
}
|
|
}
|
|
|
|
err = 0;
|
|
for (nb = 0; nb + sizeof(hdr) <= count; ) {
|
|
err = -EFAULT;
|
|
if (__copy_from_user(&hdr, buf, sizeof(hdr)))
|
|
break;
|
|
|
|
err = 0;
|
|
if (nb + hdr.n_valid * HPTE_SIZE > count)
|
|
break;
|
|
|
|
nb += sizeof(hdr);
|
|
buf += sizeof(hdr);
|
|
|
|
err = -EINVAL;
|
|
i = hdr.index;
|
|
if (i >= kvm->arch.hpt_npte ||
|
|
i + hdr.n_valid + hdr.n_invalid > kvm->arch.hpt_npte)
|
|
break;
|
|
|
|
hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
|
|
lbuf = (unsigned long __user *)buf;
|
|
for (j = 0; j < hdr.n_valid; ++j) {
|
|
err = -EFAULT;
|
|
if (__get_user(v, lbuf) || __get_user(r, lbuf + 1))
|
|
goto out;
|
|
err = -EINVAL;
|
|
if (!(v & HPTE_V_VALID))
|
|
goto out;
|
|
lbuf += 2;
|
|
nb += HPTE_SIZE;
|
|
|
|
if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
|
|
kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
|
|
err = -EIO;
|
|
ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r,
|
|
tmp);
|
|
if (ret != H_SUCCESS) {
|
|
pr_err("kvm_htab_write ret %ld i=%ld v=%lx "
|
|
"r=%lx\n", ret, i, v, r);
|
|
goto out;
|
|
}
|
|
if (!rma_setup && is_vrma_hpte(v)) {
|
|
unsigned long psize = hpte_page_size(v, r);
|
|
unsigned long senc = slb_pgsize_encoding(psize);
|
|
unsigned long lpcr;
|
|
|
|
kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
|
|
(VRMA_VSID << SLB_VSID_SHIFT_1T);
|
|
lpcr = senc << (LPCR_VRMASD_SH - 4);
|
|
kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
|
|
rma_setup = 1;
|
|
}
|
|
++i;
|
|
hptp += 2;
|
|
}
|
|
|
|
for (j = 0; j < hdr.n_invalid; ++j) {
|
|
if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
|
|
kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
|
|
++i;
|
|
hptp += 2;
|
|
}
|
|
err = 0;
|
|
}
|
|
|
|
out:
|
|
/* Order HPTE updates vs. rma_setup_done */
|
|
smp_wmb();
|
|
kvm->arch.rma_setup_done = rma_setup;
|
|
mutex_unlock(&kvm->lock);
|
|
|
|
if (err)
|
|
return err;
|
|
return nb;
|
|
}
|
|
|
|
static int kvm_htab_release(struct inode *inode, struct file *filp)
|
|
{
|
|
struct kvm_htab_ctx *ctx = filp->private_data;
|
|
|
|
filp->private_data = NULL;
|
|
if (!(ctx->flags & KVM_GET_HTAB_WRITE))
|
|
atomic_dec(&ctx->kvm->arch.hpte_mod_interest);
|
|
kvm_put_kvm(ctx->kvm);
|
|
kfree(ctx);
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations kvm_htab_fops = {
|
|
.read = kvm_htab_read,
|
|
.write = kvm_htab_write,
|
|
.llseek = default_llseek,
|
|
.release = kvm_htab_release,
|
|
};
|
|
|
|
int kvm_vm_ioctl_get_htab_fd(struct kvm *kvm, struct kvm_get_htab_fd *ghf)
|
|
{
|
|
int ret;
|
|
struct kvm_htab_ctx *ctx;
|
|
int rwflag;
|
|
|
|
/* reject flags we don't recognize */
|
|
if (ghf->flags & ~(KVM_GET_HTAB_BOLTED_ONLY | KVM_GET_HTAB_WRITE))
|
|
return -EINVAL;
|
|
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
kvm_get_kvm(kvm);
|
|
ctx->kvm = kvm;
|
|
ctx->index = ghf->start_index;
|
|
ctx->flags = ghf->flags;
|
|
ctx->first_pass = 1;
|
|
|
|
rwflag = (ghf->flags & KVM_GET_HTAB_WRITE) ? O_WRONLY : O_RDONLY;
|
|
ret = anon_inode_getfd("kvm-htab", &kvm_htab_fops, ctx, rwflag | O_CLOEXEC);
|
|
if (ret < 0) {
|
|
kvm_put_kvm(kvm);
|
|
return ret;
|
|
}
|
|
|
|
if (rwflag == O_RDONLY) {
|
|
mutex_lock(&kvm->slots_lock);
|
|
atomic_inc(&kvm->arch.hpte_mod_interest);
|
|
/* make sure kvmppc_do_h_enter etc. see the increment */
|
|
synchronize_srcu_expedited(&kvm->srcu);
|
|
mutex_unlock(&kvm->slots_lock);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
|
|
|
|
if (cpu_has_feature(CPU_FTR_ARCH_206))
|
|
vcpu->arch.slb_nr = 32; /* POWER7 */
|
|
else
|
|
vcpu->arch.slb_nr = 64;
|
|
|
|
mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
|
|
mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
|
|
|
|
vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
|
|
}
|