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![Mahesh Salgaonkar](/assets/img/avatar_default.png)
Now that we handle machine check in linux, the MCE decoding should also take place in linux host. This info is crucial to log before we go down in case we can not handle the machine check errors. This patch decodes and populates a machine check event which contain high level meaning full MCE information. We do this in real mode C code with ME bit on. The MCE information is still available on emergency stack (in pt_regs structure format). Even if we take another exception at this point the MCE early handler will allocate a new stack frame on top of current one. So when we return back here we still have our MCE information safe on current stack. We use per cpu buffer to save high level MCE information. Each per cpu buffer is an array of machine check event structure indexed by per cpu counter mce_nest_count. The mce_nest_count is incremented every time we enter machine check early handler in real mode to get the current free slot (index = mce_nest_count - 1). The mce_nest_count is decremented once the MCE info is consumed by virtual mode machine exception handler. This patch provides save_mce_event(), get_mce_event() and release_mce_event() generic routines that can be used by machine check handlers to populate and retrieve the event. The routine release_mce_event() will free the event slot so that it can be reused. Caller can invoke get_mce_event() with a release flag either to release the event slot immediately OR keep it so that it can be fetched again. The event slot can be also released anytime by invoking release_mce_event(). This patch also updates kvm code to invoke get_mce_event to retrieve generic mce event rather than paca->opal_mce_evt. The KVM code always calls get_mce_event() with release flags set to false so that event is available for linus host machine If machine check occurs while we are in guest, KVM tries to handle the error. If KVM is able to handle MC error successfully, it enters the guest and delivers the machine check to guest. If KVM is not able to handle MC error, it exists the guest and passes the control to linux host machine check handler which then logs MC event and decides how to handle it in linux host. In failure case, KVM needs to make sure that the MC event is available for linux host to consume. Hence KVM always calls get_mce_event() with release flags set to false and later it invokes release_mce_event() only if it succeeds to handle error. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
146 lines
4.3 KiB
C
146 lines
4.3 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/kernel.h>
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#include <asm/opal.h>
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#include <asm/mce.h>
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/* SRR1 bits for machine check on POWER7 */
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#define SRR1_MC_LDSTERR (1ul << (63-42))
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#define SRR1_MC_IFETCH_SH (63-45)
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#define SRR1_MC_IFETCH_MASK 0x7
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#define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */
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#define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
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#define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
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#define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
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/* DSISR bits for machine check on POWER7 */
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#define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
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#define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
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#define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */
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#define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
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#define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
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/* POWER7 SLB flush and reload */
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static void reload_slb(struct kvm_vcpu *vcpu)
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{
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struct slb_shadow *slb;
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unsigned long i, n;
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/* First clear out SLB */
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asm volatile("slbmte %0,%0; slbia" : : "r" (0));
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/* Do they have an SLB shadow buffer registered? */
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slb = vcpu->arch.slb_shadow.pinned_addr;
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if (!slb)
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return;
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/* Sanity check */
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n = min_t(u32, slb->persistent, SLB_MIN_SIZE);
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if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end)
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return;
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/* Load up the SLB from that */
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for (i = 0; i < n; ++i) {
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unsigned long rb = slb->save_area[i].esid;
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unsigned long rs = slb->save_area[i].vsid;
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rb = (rb & ~0xFFFul) | i; /* insert entry number */
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asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb));
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}
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}
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/*
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* On POWER7, see if we can handle a machine check that occurred inside
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* the guest in real mode, without switching to the host partition.
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*
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* Returns: 0 => exit guest, 1 => deliver machine check to guest
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*/
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static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
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{
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unsigned long srr1 = vcpu->arch.shregs.msr;
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struct machine_check_event mce_evt;
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long handled = 1;
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if (srr1 & SRR1_MC_LDSTERR) {
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/* error on load/store */
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unsigned long dsisr = vcpu->arch.shregs.dsisr;
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if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
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DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) {
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/* flush and reload SLB; flushes D-ERAT too */
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reload_slb(vcpu);
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dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
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DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
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}
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if (dsisr & DSISR_MC_TLB_MULTI) {
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if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
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cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID);
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dsisr &= ~DSISR_MC_TLB_MULTI;
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}
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/* Any other errors we don't understand? */
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if (dsisr & 0xffffffffUL)
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handled = 0;
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}
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switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) {
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case 0:
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break;
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case SRR1_MC_IFETCH_SLBPAR:
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case SRR1_MC_IFETCH_SLBMULTI:
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case SRR1_MC_IFETCH_SLBPARMULTI:
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reload_slb(vcpu);
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break;
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case SRR1_MC_IFETCH_TLBMULTI:
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if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
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cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID);
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break;
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default:
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handled = 0;
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}
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/*
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* See if we have already handled the condition in the linux host.
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* We assume that if the condition is recovered then linux host
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* will have generated an error log event that we will pick
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* up and log later.
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* Don't release mce event now. In case if condition is not
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* recovered we do guest exit and go back to linux host machine
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* check handler. Hence we need make sure that current mce event
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* is available for linux host to consume.
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*/
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if (!get_mce_event(&mce_evt, MCE_EVENT_DONTRELEASE))
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goto out;
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if (mce_evt.version == MCE_V1 &&
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(mce_evt.severity == MCE_SEV_NO_ERROR ||
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mce_evt.disposition == MCE_DISPOSITION_RECOVERED))
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handled = 1;
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out:
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/*
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* If we have handled the error, then release the mce event because
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* we will be delivering machine check to guest.
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*/
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if (handled)
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release_mce_event();
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return handled;
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}
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long kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
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{
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if (cpu_has_feature(CPU_FTR_ARCH_206))
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return kvmppc_realmode_mc_power7(vcpu);
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return 0;
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}
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