mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 11:19:37 +00:00
![Samuel Li](/assets/img/avatar_default.png)
v2: drop hdp invalidate/flush. v3: honor pgoff during prime mmap. Add a barrier after cpu access. v4: drop begin/end_cpu_access() for now, revisit later. Signed-off-by: Samuel Li <Samuel.Li@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
178 lines
4.8 KiB
C
178 lines
4.8 KiB
C
/*
|
|
* Copyright 2012 Advanced Micro Devices, Inc.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*
|
|
* based on nouveau_prime.c
|
|
*
|
|
* Authors: Alex Deucher
|
|
*/
|
|
#include <drm/drmP.h>
|
|
|
|
#include "amdgpu.h"
|
|
#include <drm/amdgpu_drm.h>
|
|
#include <linux/dma-buf.h>
|
|
|
|
struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
int npages = bo->tbo.num_pages;
|
|
|
|
return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
|
|
}
|
|
|
|
void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
int ret;
|
|
|
|
ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
|
|
&bo->dma_buf_vmap);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
return bo->dma_buf_vmap.virtual;
|
|
}
|
|
|
|
void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
|
|
ttm_bo_kunmap(&bo->dma_buf_vmap);
|
|
}
|
|
|
|
int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
|
|
unsigned asize = amdgpu_bo_size(bo);
|
|
int ret;
|
|
|
|
if (!vma->vm_file)
|
|
return -ENODEV;
|
|
|
|
if (adev == NULL)
|
|
return -ENODEV;
|
|
|
|
/* Check for valid size. */
|
|
if (asize < vma->vm_end - vma->vm_start)
|
|
return -EINVAL;
|
|
|
|
if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
|
|
(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
|
|
return -EPERM;
|
|
}
|
|
vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
|
|
|
|
/* prime mmap does not need to check access, so allow here */
|
|
ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
|
|
drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
|
|
|
|
return ret;
|
|
}
|
|
|
|
struct drm_gem_object *
|
|
amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
|
|
struct dma_buf_attachment *attach,
|
|
struct sg_table *sg)
|
|
{
|
|
struct reservation_object *resv = attach->dmabuf->resv;
|
|
struct amdgpu_device *adev = dev->dev_private;
|
|
struct amdgpu_bo *bo;
|
|
int ret;
|
|
|
|
ww_mutex_lock(&resv->lock, NULL);
|
|
ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
|
|
AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, 0, &bo);
|
|
ww_mutex_unlock(&resv->lock);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
bo->prime_shared_count = 1;
|
|
return &bo->gem_base;
|
|
}
|
|
|
|
int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
long ret = 0;
|
|
|
|
ret = amdgpu_bo_reserve(bo, false);
|
|
if (unlikely(ret != 0))
|
|
return ret;
|
|
|
|
/*
|
|
* Wait for all shared fences to complete before we switch to future
|
|
* use of exclusive fence on this prime shared bo.
|
|
*/
|
|
ret = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
|
|
MAX_SCHEDULE_TIMEOUT);
|
|
if (unlikely(ret < 0)) {
|
|
DRM_DEBUG_PRIME("Fence wait failed: %li\n", ret);
|
|
amdgpu_bo_unreserve(bo);
|
|
return ret;
|
|
}
|
|
|
|
/* pin buffer into GTT */
|
|
ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
|
|
if (likely(ret == 0))
|
|
bo->prime_shared_count++;
|
|
|
|
amdgpu_bo_unreserve(bo);
|
|
return ret;
|
|
}
|
|
|
|
void amdgpu_gem_prime_unpin(struct drm_gem_object *obj)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
int ret = 0;
|
|
|
|
ret = amdgpu_bo_reserve(bo, true);
|
|
if (unlikely(ret != 0))
|
|
return;
|
|
|
|
amdgpu_bo_unpin(bo);
|
|
if (bo->prime_shared_count)
|
|
bo->prime_shared_count--;
|
|
amdgpu_bo_unreserve(bo);
|
|
}
|
|
|
|
struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
|
|
|
return bo->tbo.resv;
|
|
}
|
|
|
|
struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
|
|
struct drm_gem_object *gobj,
|
|
int flags)
|
|
{
|
|
struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
|
|
|
|
if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
|
|
bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
|
|
return ERR_PTR(-EPERM);
|
|
|
|
return drm_gem_prime_export(dev, gobj, flags);
|
|
}
|