linux-stable/drivers/gpu/drm/imx
Philipp Zabel eb8c88808c drm/imx: add deferred plane disabling
The DP (display processor) channel disable code tried to busy wait for
the DP sync flow end interrupt status bit when disabling the partial
plane without a full modeset. That never worked reliably, and it was
disabled completely by the recent "gpu: ipu-v3: remove IRQ dance on DC
channel disable" patch, causing ipu_wait_interrupt to always time out
after 50 ms, which in turn would trigger a timeout in
drm_atomic_helper_wait_for_vblanks.

This patch changes ipu_plane_atomic_disable to only queue a DP channel
register update at the next frame boundary and set a flag, which can be
done without any waiting whatsoever. The imx_drm_atomic_commit_tail then
calls a new ipu_plane_disable_deferred function that does the actual
IDMAC teardown of the planes that are flagged for deferred disabling,
after waiting for the vblank.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-03-15 15:42:29 +01:00
..
dw_hdmi-imx.c drm: bridge: dw-hdmi: Remove device type from platform data 2017-03-10 15:36:38 +05:30
imx-drm-core.c drm/imx: add deferred plane disabling 2017-03-15 15:42:29 +01:00
imx-drm.h drm: imx: remove struct imx_drm_crtc and imx_drm_crtc_helper_funcs 2017-02-09 16:07:24 +08:00
imx-ldb.c drm: bridge: Detach bridge from encoder at encoder cleanup time 2016-12-18 16:32:49 +05:30
imx-tve.c imx-drm: TVE regulator, fb size limit, and ipu-v3 module fixes 2017-02-23 12:10:42 +10:00
ipuv3-crtc.c drm/imx: add deferred plane disabling 2017-03-15 15:42:29 +01:00
ipuv3-plane.c drm/imx: add deferred plane disabling 2017-03-15 15:42:29 +01:00
ipuv3-plane.h drm/imx: add deferred plane disabling 2017-03-15 15:42:29 +01:00
Kconfig drm/imx: make fbdev support really optional 2016-07-18 09:11:36 +02:00
Makefile drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi 2015-01-07 18:31:56 +01:00
parallel-display.c drm: bridge: Detach bridge from encoder at encoder cleanup time 2016-12-18 16:32:49 +05:30