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2f7d63f909
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
938 lines
22 KiB
C
938 lines
22 KiB
C
/* File: arch/blackfin/mach-bf527/boards/tll6527m.c
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* Based on: arch/blackfin/mach-bf527/boards/ezkit.c
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* Author: Ashish Gupta
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*
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* Copyright: 2010 - The Learning Labs Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/usb/musb.h>
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#include <linux/leds.h>
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#include <linux/input.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <asm/nand.h>
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#include <asm/portmux.h>
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#include <asm/dpmc.h>
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#if defined(CONFIG_TOUCHSCREEN_AD7879) \
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|| defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
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#include <linux/spi/ad7879.h>
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#define LCD_BACKLIGHT_GPIO 0x40
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/* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
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* LCD Backlight Enable
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*/
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#endif
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "TLL6527M";
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/*
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
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static struct resource musb_resources[] = {
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[0] = {
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.start = 0xffc03800,
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.end = 0xffc03cff,
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* general IRQ */
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.start = IRQ_USB_INT0,
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.end = IRQ_USB_INT0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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[2] = { /* DMA IRQ */
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.start = IRQ_USB_DMA,
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.end = IRQ_USB_DMA,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct musb_hdrc_config musb_config = {
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.multipoint = 0,
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.dyn_fifo = 0,
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.soft_con = 1,
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.dma = 1,
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.num_eps = 8,
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.dma_channels = 8,
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/*.gpio_vrsel = GPIO_PG13,*/
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/* Some custom boards need to be active low, just set it to "0"
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* if it is the case.
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*/
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.gpio_vrsel_active = 1,
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};
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static struct musb_hdrc_platform_data musb_plat = {
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#if defined(CONFIG_USB_MUSB_OTG)
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.mode = MUSB_OTG,
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#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
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.mode = MUSB_HOST,
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#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
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.mode = MUSB_PERIPHERAL,
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#endif
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.config = &musb_config,
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};
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static u64 musb_dmamask = ~(u32)0;
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static struct platform_device musb_device = {
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.name = "musb-blackfin",
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.id = 0,
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.dev = {
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.dma_mask = &musb_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &musb_plat,
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},
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.num_resources = ARRAY_SIZE(musb_resources),
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.resource = musb_resources,
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};
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#endif
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#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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#include <asm/bfin-lq035q1.h>
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static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
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.mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
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.ppi_mode = USE_RGB565_16_BIT_PPI,
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.use_bl = 1,
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.gpio_bl = LCD_BACKLIGHT_GPIO,
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};
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static struct resource bfin_lq035q1_resources[] = {
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{
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.start = IRQ_PPI_ERROR,
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.end = IRQ_PPI_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_lq035q1_device = {
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.name = "bfin-lq035q1",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
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.resource = bfin_lq035q1_resources,
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.dev = {
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.platform_data = &bfin_lq035q1_data,
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},
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};
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#endif
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#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
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static struct mtd_partition tll6527m_partitions[] = {
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{
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.name = "bootloader(nor)",
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.size = 0xA0000,
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.offset = 0,
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}, {
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.name = "linux kernel(nor)",
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.size = 0xD00000,
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.offset = MTDPART_OFS_APPEND,
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}, {
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.name = "file system(nor)",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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static struct physmap_flash_data tll6527m_flash_data = {
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.width = 2,
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.parts = tll6527m_partitions,
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.nr_parts = ARRAY_SIZE(tll6527m_partitions),
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};
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static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
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static struct resource tll6527m_flash_resource[] = {
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{
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.name = "cfi_probe",
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.start = 0x20000000,
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.end = 0x201fffff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = (unsigned long)tll6527m_flash_gpios,
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.end = ARRAY_SIZE(tll6527m_flash_gpios),
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device tll6527m_flash_device = {
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.name = "gpio-addr-flash",
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.id = 0,
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.dev = {
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.platform_data = &tll6527m_flash_data,
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},
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.num_resources = ARRAY_SIZE(tll6527m_flash_resource),
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.resource = tll6527m_flash_resource,
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};
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#endif
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#if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
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/* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
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* outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
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* EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
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* used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
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*/
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#include <linux/gpio-decoder.h>
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#define EXP_GPIO_SPISEL_BASE 0x64
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static unsigned gpio_addr_inputs[] = {
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GPIO_PG1, GPIO_PH9, GPIO_PH10
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};
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static struct gpio_decoder_platform_data spi_decoded_cs = {
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.base = EXP_GPIO_SPISEL_BASE,
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.input_addrs = gpio_addr_inputs,
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.nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
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.default_output = 0,
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/* .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
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};
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static struct platform_device spi_decoded_gpio = {
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.name = "gpio-decoder",
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.id = 0,
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.dev = {
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.platform_data = &spi_decoded_cs,
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},
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};
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#else
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#define EXP_GPIO_SPISEL_BASE 0x0
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#endif
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#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
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#include <linux/input/adxl34x.h>
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static const struct adxl34x_platform_data adxl345_info = {
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.x_axis_offset = 0,
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.y_axis_offset = 0,
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.z_axis_offset = 0,
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.tap_threshold = 0x31,
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.tap_duration = 0x10,
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.tap_latency = 0x60,
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.tap_window = 0xF0,
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.tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
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.act_axis_control = 0xFF,
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.activity_threshold = 5,
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.inactivity_threshold = 2,
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.inactivity_time = 2,
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.free_fall_threshold = 0x7,
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.free_fall_time = 0x20,
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.data_rate = 0x8,
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.data_range = ADXL_FULL_RES,
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.ev_type = EV_ABS,
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.ev_code_x = ABS_X, /* EV_REL */
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.ev_code_y = ABS_Y, /* EV_REL */
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.ev_code_z = ABS_Z, /* EV_REL */
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.ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
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/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
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.ev_code_act_inactivity = KEY_A, /* EV_KEY */
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.use_int2 = 1,
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.power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
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.fifo_mode = ADXL_FIFO_STREAM,
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};
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#endif
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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#include <linux/bfin_mac.h>
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static const unsigned short bfin_mac_peripherals[] = P_RMII0;
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static struct bfin_phydev_platform_data bfin_phydev_data[] = {
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{
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.addr = 1,
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.irq = IRQ_MAC_PHYINT,
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},
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};
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static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
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.phydev_number = 1,
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.phydev_data = bfin_phydev_data,
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.phy_mode = PHY_INTERFACE_MODE_RMII,
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.mac_peripherals = bfin_mac_peripherals,
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};
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static struct platform_device bfin_mii_bus = {
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.name = "bfin_mii_bus",
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.dev = {
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.platform_data = &bfin_mii_bus_data,
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}
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};
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static struct platform_device bfin_mac_device = {
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.name = "bfin_mac",
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.dev = {
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.platform_data = &bfin_mii_bus,
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}
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};
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#endif
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader(spi)",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "linux kernel(spi)",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p16",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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};
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#endif
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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.enable_dma = 0,
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};
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#endif
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#if defined(CONFIG_TOUCHSCREEN_AD7879) \
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|| defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
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static const struct ad7879_platform_data bfin_ad7879_ts_info = {
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.model = 7879, /* Model = AD7879 */
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.x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
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.pressure_max = 10000,
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.pressure_min = 0,
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.first_conversion_delay = 3,
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/* wait 512us before do a first conversion */
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.acquisition_time = 1, /* 4us acquisition time per sample */
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.median = 2, /* do 8 measurements */
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.averaging = 1,
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/* take the average of 4 middle samples */
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.pen_down_acc_interval = 255, /* 9.4 ms */
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.gpio_export = 1, /* configure AUX as GPIO output*/
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.gpio_base = LCD_BACKLIGHT_GPIO,
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};
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#endif
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#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
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static struct platform_device bfin_i2s = {
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.name = "bfin-i2s",
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.id = CONFIG_SND_BF5XX_SPORT_NUM,
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/* TODO: add platform data here */
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};
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#endif
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#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
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#include <linux/spi/mcp23s08.h>
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static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
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.chip[0].is_present = true,
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.base = 0x30,
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};
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static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
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.chip[2].is_present = true,
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.base = 0x38,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000,
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/* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
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/* Can be connected to TLL6527M GPIO connector */
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/* Either SPI_ADC or M25P80 FLASH can be installed at a time */
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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{
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.modalias = "mmc_spi",
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/*
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* TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
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* SPI buffer limitations
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*/
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.max_speed_hz = 10000000,
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/* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
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.controller_data = &mmc_spi_chip_info,
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.mode = SPI_MODE_0,
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},
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#endif
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#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
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|| defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
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{
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.modalias = "ad7879",
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.platform_data = &bfin_ad7879_ts_info,
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.irq = IRQ_PH14,
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.max_speed_hz = 5000000,
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/* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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{
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.modalias = "spidev",
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.max_speed_hz = 10000000,
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/* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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{
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.modalias = "bfin-lq035q1-spi",
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.max_speed_hz = 20000000,
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
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{
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.modalias = "mcp23s08",
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.platform_data = &bfin_mcp23s08_sys_gpio_info,
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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{
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.modalias = "mcp23s08",
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.platform_data = &bfin_mcp23s08_usr_gpio_info,
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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};
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|
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
|
|
.num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
|
|
/* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
|
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
|
|
};
|
|
|
|
/* SPI (0) */
|
|
static struct resource bfin_spi0_resource[] = {
|
|
[0] = {
|
|
.start = SPI0_REGBASE,
|
|
.end = SPI0_REGBASE + 0xFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = CH_SPI,
|
|
.end = CH_SPI,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[2] = {
|
|
.start = IRQ_SPI,
|
|
.end = IRQ_SPI,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_spi0_device = {
|
|
.name = "bfin-spi",
|
|
.id = 0, /* Bus number */
|
|
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
|
|
.resource = bfin_spi0_resource,
|
|
.dev = {
|
|
.platform_data = &bfin_spi0_info, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif /* spi master and devices */
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
static struct resource bfin_uart0_resources[] = {
|
|
{
|
|
.start = UART0_THR,
|
|
.end = UART0_GCTL+2,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART0_RX,
|
|
.end = IRQ_UART0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_UART0_ERROR,
|
|
.end = IRQ_UART0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART0_TX,
|
|
.end = CH_UART0_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.start = CH_UART0_RX,
|
|
.end = CH_UART0_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_uart0_peripherals[] = {
|
|
P_UART0_TX, P_UART0_RX, 0
|
|
};
|
|
|
|
static struct platform_device bfin_uart0_device = {
|
|
.name = "bfin-uart",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_uart0_resources),
|
|
.resource = bfin_uart0_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_uart0_peripherals,
|
|
/* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
static struct resource bfin_uart1_resources[] = {
|
|
{
|
|
.start = UART1_THR,
|
|
.end = UART1_GCTL+2,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART1_RX,
|
|
.end = IRQ_UART1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_UART1_ERROR,
|
|
.end = IRQ_UART1_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART1_TX,
|
|
.end = CH_UART1_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.start = CH_UART1_RX,
|
|
.end = CH_UART1_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
#ifdef CONFIG_BFIN_UART1_CTSRTS
|
|
{ /* CTS pin */
|
|
.start = GPIO_PF9,
|
|
.end = GPIO_PF9,
|
|
.flags = IORESOURCE_IO,
|
|
},
|
|
{ /* RTS pin */
|
|
.start = GPIO_PF10,
|
|
.end = GPIO_PF10,
|
|
.flags = IORESOURCE_IO,
|
|
},
|
|
#endif
|
|
};
|
|
|
|
static unsigned short bfin_uart1_peripherals[] = {
|
|
P_UART1_TX, P_UART1_RX, 0
|
|
};
|
|
|
|
static struct platform_device bfin_uart1_device = {
|
|
.name = "bfin-uart",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_uart1_resources),
|
|
.resource = bfin_uart1_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_uart1_peripherals,
|
|
/* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
|
#ifdef CONFIG_BFIN_SIR0
|
|
static struct resource bfin_sir0_resources[] = {
|
|
{
|
|
.start = 0xFFC00400,
|
|
.end = 0xFFC004FF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART0_RX,
|
|
.end = IRQ_UART0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART0_RX,
|
|
.end = CH_UART0_RX+1,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_sir0_device = {
|
|
.name = "bfin_sir",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
|
|
.resource = bfin_sir0_resources,
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR1
|
|
static struct resource bfin_sir1_resources[] = {
|
|
{
|
|
.start = 0xFFC02000,
|
|
.end = 0xFFC020FF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART1_RX,
|
|
.end = IRQ_UART1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART1_RX,
|
|
.end = CH_UART1_RX+1,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_sir1_device = {
|
|
.name = "bfin_sir",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
|
|
.resource = bfin_sir1_resources,
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
static struct resource bfin_twi0_resource[] = {
|
|
[0] = {
|
|
.start = TWI0_REGBASE,
|
|
.end = TWI0_REGBASE,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_TWI,
|
|
.end = IRQ_TWI,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device i2c_bfin_twi_device = {
|
|
.name = "i2c-bfin-twi",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
|
.resource = bfin_twi0_resource,
|
|
};
|
|
#endif
|
|
|
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
|
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
|
|
{
|
|
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
|
|
},
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
|
|
{
|
|
I2C_BOARD_INFO("bfin-adv7393", 0x2B),
|
|
},
|
|
#endif
|
|
#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
|
|
|| defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
|
|
{
|
|
I2C_BOARD_INFO("ad7879", 0x2C),
|
|
.irq = IRQ_PH14,
|
|
.platform_data = (void *)&bfin_ad7879_ts_info,
|
|
},
|
|
#endif
|
|
#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
|
|
{
|
|
I2C_BOARD_INFO("ssm2602", 0x1b),
|
|
},
|
|
#endif
|
|
{
|
|
I2C_BOARD_INFO("adm1192", 0x2e),
|
|
},
|
|
|
|
{
|
|
I2C_BOARD_INFO("ltc3576", 0x09),
|
|
},
|
|
#if defined(CONFIG_INPUT_ADXL34X_I2C) \
|
|
|| defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
|
|
{
|
|
I2C_BOARD_INFO("adxl34x", 0x53),
|
|
.irq = IRQ_PH13,
|
|
.platform_data = (void *)&adxl345_info,
|
|
},
|
|
#endif
|
|
};
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) \
|
|
|| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
static struct resource bfin_sport0_uart_resources[] = {
|
|
{
|
|
.start = SPORT0_TCR1,
|
|
.end = SPORT0_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_RX,
|
|
.end = IRQ_SPORT0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_ERROR,
|
|
.end = IRQ_SPORT0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport0_peripherals[] = {
|
|
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
|
|
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport0_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
|
|
.resource = bfin_sport0_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport0_peripherals,
|
|
/* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
static struct resource bfin_sport1_uart_resources[] = {
|
|
{
|
|
.start = SPORT1_TCR1,
|
|
.end = SPORT1_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_RX,
|
|
.end = IRQ_SPORT1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_ERROR,
|
|
.end = IRQ_SPORT1_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport1_peripherals[] = {
|
|
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
|
|
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport1_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
|
|
.resource = bfin_sport1_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport1_peripherals,
|
|
/* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
static const unsigned int cclk_vlev_datasheet[] = {
|
|
VRPAIR(VLEV_100, 400000000),
|
|
VRPAIR(VLEV_105, 426000000),
|
|
VRPAIR(VLEV_110, 500000000),
|
|
VRPAIR(VLEV_115, 533000000),
|
|
VRPAIR(VLEV_120, 600000000),
|
|
};
|
|
|
|
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
|
|
.tuple_tab = cclk_vlev_datasheet,
|
|
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
|
|
.vr_settling_time = 25 /* us */,
|
|
};
|
|
|
|
static struct platform_device bfin_dpmc = {
|
|
.name = "bfin dpmc",
|
|
.dev = {
|
|
.platform_data = &bfin_dmpc_vreg_data,
|
|
},
|
|
};
|
|
|
|
static struct platform_device *tll6527m_devices[] __initdata = {
|
|
|
|
&bfin_dpmc,
|
|
|
|
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
|
&rtc_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
|
|
&musb_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
|
&bfin_mii_bus,
|
|
&bfin_mac_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
|
&bfin_spi0_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
|
|
&bfin_lq035q1_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
|
#ifdef CONFIG_BFIN_SIR0
|
|
&bfin_sir0_device,
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR1
|
|
&bfin_sir1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
&i2c_bfin_twi_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) \
|
|
|| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
|
|
&tll6527m_flash_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
|
|
&bfin_i2s,
|
|
#endif
|
|
|
|
#if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
|
|
&spi_decoded_gpio,
|
|
#endif
|
|
};
|
|
|
|
static int __init tll6527m_init(void)
|
|
{
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
|
ARRAY_SIZE(bfin_i2c_board_info));
|
|
platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
|
|
spi_register_board_info(bfin_spi_board_info,
|
|
ARRAY_SIZE(bfin_spi_board_info));
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(tll6527m_init);
|
|
|
|
static struct platform_device *tll6527m_early_devices[] __initdata = {
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#endif
|
|
};
|
|
|
|
void __init native_machine_early_platform_add_devices(void)
|
|
{
|
|
printk(KERN_INFO "register early platform devices\n");
|
|
early_platform_add_devices(tll6527m_early_devices,
|
|
ARRAY_SIZE(tll6527m_early_devices));
|
|
}
|
|
|
|
void native_machine_restart(char *cmd)
|
|
{
|
|
/* workaround reboot hang when booting from SPI */
|
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
|
}
|
|
|
|
void bfin_get_ether_addr(char *addr)
|
|
{
|
|
/* the MAC is stored in OTP memory page 0xDF */
|
|
u32 ret;
|
|
u64 otp_mac;
|
|
u32 (*otp_read)(u32 page, u32 flags,
|
|
u64 *page_content) = (void *)0xEF00001A;
|
|
|
|
ret = otp_read(0xDF, 0x00, &otp_mac);
|
|
if (!(ret & 0x1)) {
|
|
char *otp_mac_p = (char *)&otp_mac;
|
|
for (ret = 0; ret < 6; ++ret)
|
|
addr[ret] = otp_mac_p[5 - ret];
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(bfin_get_ether_addr);
|