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907fbed65c
[ Upstream commit719c5e37e9] Previously, the defines for phy_device flags in the Micrel driver were ambiguous in their representation. They were intended to be bit masks but were mistakenly defined as bit positions. This led to the following issues: - MICREL_KSZ8_P1_ERRATA, designated for KSZ88xx switches, overlapped with MICREL_PHY_FXEN and MICREL_PHY_50MHZ_CLK. - Due to this overlap, the code path for MICREL_PHY_FXEN, tailored for the KSZ8041 PHY, was not executed for KSZ88xx PHYs. - Similarly, the code associated with MICREL_PHY_50MHZ_CLK wasn't triggered for KSZ88xx. To rectify this, all three flags have now been explicitly converted to use the `BIT()` macro, ensuring they are defined as bit masks and preventing potential overlaps in the future. Fixes:49011e0c15("net: phy: micrel: ksz886x/ksz8081: add cabletest support") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
64 lines
1.8 KiB
C
64 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* include/linux/micrel_phy.h
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*
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* Micrel PHY IDs
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*/
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#ifndef _MICREL_PHY_H
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#define _MICREL_PHY_H
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#define MICREL_PHY_ID_MASK 0x00fffff0
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#define PHY_ID_KSZ8873MLL 0x000e7237
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#define PHY_ID_KSZ9021 0x00221610
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#define PHY_ID_KSZ9021RLRN 0x00221611
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#define PHY_ID_KS8737 0x00221720
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#define PHY_ID_KSZ8021 0x00221555
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#define PHY_ID_KSZ8031 0x00221556
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#define PHY_ID_KSZ8041 0x00221510
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/* undocumented */
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#define PHY_ID_KSZ8041RNLI 0x00221537
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#define PHY_ID_KSZ8051 0x00221550
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/* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
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#define PHY_ID_KSZ8001 0x0022161A
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/* same id: KS8081, KS8091 */
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#define PHY_ID_KSZ8081 0x00221560
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#define PHY_ID_KSZ8061 0x00221570
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#define PHY_ID_KSZ9031 0x00221620
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#define PHY_ID_KSZ9131 0x00221640
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#define PHY_ID_LAN8814 0x00221660
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#define PHY_ID_KSZ886X 0x00221430
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#define PHY_ID_KSZ8863 0x00221435
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#define PHY_ID_KSZ87XX 0x00221550
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#define PHY_ID_KSZ9477 0x00221631
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/* struct phy_device dev_flags definitions */
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#define MICREL_PHY_50MHZ_CLK BIT(0)
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#define MICREL_PHY_FXEN BIT(1)
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#define MICREL_KSZ8_P1_ERRATA BIT(2)
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#define MICREL_KSZ9021_EXTREG_CTRL 0xB
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#define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC
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#define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104
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#define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105
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/* Device specific MII_BMCR (Reg 0) bits */
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/* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */
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#define KSZ886X_BMCR_HP_MDIX BIT(5)
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/* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation
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* (transmit on TXP/TXM pins)
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*/
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#define KSZ886X_BMCR_FORCE_MDI BIT(4)
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/* 1 = Disable auto MDI-X */
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#define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3)
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#define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2)
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#define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1)
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#define KSZ886X_BMCR_DISABLE_LED BIT(0)
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#define KSZ886X_CTRL_MDIX_STAT BIT(4)
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#endif /* _MICREL_PHY_H */
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