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c612505f86
If memory is located above 1<<VA_BITS, kvm adds an extra level to its page tables, merging the runtime tables and boot tables that contain the idmap. This lets us avoid the trampoline dance during initialisation. This also means there is no trampoline page mapped, so __cpu_reset_hyp_mode() can't call __kvm_hyp_reset() in this page. The good news is the idmap is still mapped, so we don't need the trampoline page. The bad news is we can't call it directly as the idmap is above HYP_PAGE_OFFSET, so its address is masked by kvm_call_hyp. Add a function __extended_idmap_trampoline which will branch into __kvm_hyp_reset in the idmap, change kvm_hyp_reset_entry() to return this address if __kvm_cpu_uses_extended_idmap(). In this case __kvm_hyp_reset() will still switch to the boot tables (which are the merged tables that were already in use), and branch into the idmap (where it already was). This fixes boot failures on these systems, where we fail to execute the missing trampoline page when tearing down kvm in init_subsystems(): [ 2.508922] kvm [1]: 8-bit VMID [ 2.512057] kvm [1]: Hyp mode initialized successfully [ 2.517242] kvm [1]: interrupt-controller@e1140000 IRQ13 [ 2.522622] kvm [1]: timer IRQ3 [ 2.525783] Kernel panic - not syncing: HYP panic: [ 2.525783] PS:200003c9 PC:0000007ffffff820 ESR:86000005 [ 2.525783] FAR:0000007ffffff820 HPFAR:00000000003ffff0 PAR:0000000000000000 [ 2.525783] VCPU: (null) [ 2.525783] [ 2.547667] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.6.0-rc5+ #1 [ 2.555137] Hardware name: Default string Default string/Default string, BIOS ROD0084E 09/03/2015 [ 2.563994] Call trace: [ 2.566432] [<ffffff80080888d0>] dump_backtrace+0x0/0x240 [ 2.571818] [<ffffff8008088b24>] show_stack+0x14/0x20 [ 2.576858] [<ffffff80083423ac>] dump_stack+0x94/0xb8 [ 2.581899] [<ffffff8008152130>] panic+0x10c/0x250 [ 2.586677] [<ffffff8008152024>] panic+0x0/0x250 [ 2.591281] SMP: stopping secondary CPUs [ 3.649692] SMP: failed to stop secondary CPUs 0-2,4-7 [ 3.654818] Kernel Offset: disabled [ 3.658293] Memory Limit: none [ 3.661337] ---[ end Kernel panic - not syncing: HYP panic: [ 3.661337] PS:200003c9 PC:0000007ffffff820 ESR:86000005 [ 3.661337] FAR:0000007ffffff820 HPFAR:00000000003ffff0 PAR:0000000000000000 [ 3.661337] VCPU: (null) [ 3.661337] Reported-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
187 lines
4.3 KiB
ArmAsm
187 lines
4.3 KiB
ArmAsm
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_mmu.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/sysreg.h>
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.text
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.pushsection .hyp.idmap.text, "ax"
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.align 11
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ENTRY(__kvm_hyp_init)
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ventry __invalid // Synchronous EL2t
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ventry __invalid // IRQ EL2t
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ventry __invalid // FIQ EL2t
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ventry __invalid // Error EL2t
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ventry __invalid // Synchronous EL2h
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ventry __invalid // IRQ EL2h
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ventry __invalid // FIQ EL2h
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ventry __invalid // Error EL2h
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ventry __do_hyp_init // Synchronous 64-bit EL1
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ventry __invalid // IRQ 64-bit EL1
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ventry __invalid // FIQ 64-bit EL1
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ventry __invalid // Error 64-bit EL1
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ventry __invalid // Synchronous 32-bit EL1
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ventry __invalid // IRQ 32-bit EL1
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ventry __invalid // FIQ 32-bit EL1
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ventry __invalid // Error 32-bit EL1
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__invalid:
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b .
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/*
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* x0: HYP boot pgd
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* x1: HYP pgd
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* x2: HYP stack
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* x3: HYP vectors
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*/
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__do_hyp_init:
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msr ttbr0_el2, x0
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mrs x4, tcr_el1
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ldr x5, =TCR_EL2_MASK
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and x4, x4, x5
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mov x5, #TCR_EL2_RES1
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orr x4, x4, x5
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#ifndef CONFIG_ARM64_VA_BITS_48
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/*
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* If we are running with VA_BITS < 48, we may be running with an extra
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* level of translation in the ID map. This is only the case if system
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* RAM is out of range for the currently configured page size and number
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* of translation levels, in which case we will also need the extra
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* level for the HYP ID map, or we won't be able to enable the EL2 MMU.
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*
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* However, at EL2, there is only one TTBR register, and we can't switch
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* between translation tables *and* update TCR_EL2.T0SZ at the same
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* time. Bottom line: we need the extra level in *both* our translation
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* tables.
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*
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* So use the same T0SZ value we use for the ID map.
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*/
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ldr_l x5, idmap_t0sz
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bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
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#endif
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/*
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* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
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* TCR_EL2.
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*/
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mrs x5, ID_AA64MMFR0_EL1
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bfi x4, x5, #16, #3
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msr tcr_el2, x4
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mrs x4, mair_el1
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msr mair_el2, x4
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isb
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/* Invalidate the stale TLBs from Bootloader */
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tlbi alle2
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dsb sy
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mrs x4, sctlr_el2
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and x4, x4, #SCTLR_ELx_EE // preserve endianness of EL2
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ldr x5, =SCTLR_ELx_FLAGS
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orr x4, x4, x5
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msr sctlr_el2, x4
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isb
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/* Skip the trampoline dance if we merged the boot and runtime PGDs */
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cmp x0, x1
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b.eq merged
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/* MMU is now enabled. Get ready for the trampoline dance */
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ldr x4, =TRAMPOLINE_VA
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adr x5, target
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bfi x4, x5, #0, #PAGE_SHIFT
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br x4
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target: /* We're now in the trampoline code, switch page tables */
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msr ttbr0_el2, x1
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isb
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/* Invalidate the old TLBs */
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tlbi alle2
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dsb sy
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merged:
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/* Set the stack and new vectors */
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kern_hyp_va x2
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mov sp, x2
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kern_hyp_va x3
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msr vbar_el2, x3
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/* Hello, World! */
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eret
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ENDPROC(__kvm_hyp_init)
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/*
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* Reset kvm back to the hyp stub. This is the trampoline dance in
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* reverse. If kvm used an extended idmap, __extended_idmap_trampoline
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* calls this code directly in the idmap. In this case switching to the
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* boot tables is a no-op.
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*
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* x0: HYP boot pgd
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* x1: HYP phys_idmap_start
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*/
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ENTRY(__kvm_hyp_reset)
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/* We're in trampoline code in VA, switch back to boot page tables */
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msr ttbr0_el2, x0
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isb
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/* Ensure the PA branch doesn't find a stale tlb entry or stale code. */
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ic iallu
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tlbi alle2
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dsb sy
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isb
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/* Branch into PA space */
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adr x0, 1f
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bfi x1, x0, #0, #PAGE_SHIFT
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br x1
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/* We're now in idmap, disable MMU */
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1: mrs x0, sctlr_el2
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ldr x1, =SCTLR_ELx_FLAGS
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bic x0, x0, x1 // Clear SCTL_M and etc
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msr sctlr_el2, x0
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isb
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/* Invalidate the old TLBs */
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tlbi alle2
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dsb sy
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/* Install stub vectors */
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adr_l x0, __hyp_stub_vectors
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msr vbar_el2, x0
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eret
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ENDPROC(__kvm_hyp_reset)
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.ltorg
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.popsection
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