Biju Das 1c4eb1bc39 pinctrl: renesas: rzg2l: Make reverse order of enable() for disable() ... [ Upstream commit dd462cf53e ] We usually do reverse order of enable() for disable(). Currently, the ordering of irq_chip_disable_parent() is not correct in rzg2l_gpio_irq_disable(). Fix the incorrect order. Fixes: db2e5f21a4 ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230918123355.262115-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-11-20 11:52:10 +01:00
..
core.c
core.h
gpio.c
Kconfig	pinctrl: renesas: rzn1: Enable missing PINMUX	2023-10-19 23:08:54 +02:00
Makefile
pfc-emev2.c
pfc-r8a73a4.c
pfc-r8a779a0.c
pfc-r8a779f0.c
pfc-r8a779g0.c
pfc-r8a7740.c
pfc-r8a7778.c
pfc-r8a7779.c
pfc-r8a7790.c
pfc-r8a7791.c
pfc-r8a7792.c
pfc-r8a7794.c
pfc-r8a7796.c
pfc-r8a77470.c
pfc-r8a77950.c
pfc-r8a77951.c
pfc-r8a77965.c
pfc-r8a77970.c
pfc-r8a77980.c
pfc-r8a77990.c
pfc-r8a77995.c
pfc-sh73a0.c
pfc-sh7203.c
pfc-sh7264.c
pfc-sh7269.c
pfc-sh7720.c
pfc-sh7722.c
pfc-sh7723.c
pfc-sh7724.c
pfc-sh7734.c
pfc-sh7757.c
pfc-sh7785.c
pfc-sh7786.c
pfc-shx3.c
pinctrl-rza1.c
pinctrl-rza2.c	pinctrl: renesas: rza2: Add lock around pinctrl_generic{{add,remove}_group,{add,remove}_function}	2023-08-30 16:11:12 +02:00
pinctrl-rzg2l.c	pinctrl: renesas: rzg2l: Make reverse order of enable() for disable()	2023-11-20 11:52:10 +01:00
pinctrl-rzn1.c
pinctrl-rzv2m.c	pinctrl: renesas: rzv2m: Fix NULL pointer dereference in rzv2m_dt_subnode_to_map()	2023-08-30 16:11:12 +02:00
pinctrl.c
sh_pfc.h