linux-stable/arch/riscv
Khem Raj edcd7594ad riscv32: Use medany C model for modules
[ Upstream commit 5d2388dbf8 ]

When CONFIG_CMODEL_MEDLOW is used it ends up generating riscv_hi20_rela
relocations in modules which are not resolved during runtime and
following errors would be seen

[    4.802714] virtio_input: target 00000000c1539090 can not be addressed by the 32-bit offset from PC = 39148b7b
[    4.854800] virtio_input: target 00000000c1539090 can not be addressed by the 32-bit offset from PC = 9774456d

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-06-30 08:47:21 -04:00
..
boot Revert "dts: phy: add GPIO number and active state used for phy reset" 2021-02-17 11:02:20 +01:00
configs riscv: defconfig: enable gpio support for HiFive Unleashed 2021-01-27 11:55:01 +01:00
include riscv: Workaround mcount name prior to clang-13 2021-05-22 11:40:53 +02:00
kernel riscv: vdso: fix and clean-up Makefile 2021-06-10 13:39:22 +02:00
lib riscv: use memcpy based uaccess for nommu again 2020-10-04 10:27:07 -07:00
mm riscv: Get rid of MAX_EARLY_MAPPING_SIZE 2021-03-07 12:34:05 +01:00
net treewide: Use fallthrough pseudo-keyword 2020-08-23 17:36:59 -05:00
Kbuild riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
Kconfig riscv: Fix spelling mistake "SPARSEMEM" to "SPARSMEM" 2021-04-21 13:00:55 +02:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
Makefile riscv32: Use medany C model for modules 2021-06-30 08:47:21 -04:00