117 lines
3.5 KiB
C
117 lines
3.5 KiB
C
/*
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* Copyright 2011 Red Hat Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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/* Algorithm:
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*
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* We store the last allocated bo in "hole", we always try to allocate
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* after the last allocated bo. Principle is that in a linear GPU ring
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* progression was is after last is the oldest bo we allocated and thus
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* the first one that should no longer be in use by the GPU.
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*
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* If it's not the case we skip over the bo after last to the closest
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* done bo if such one exist. If none exist and we are not asked to
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* block we report failure to allocate.
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*
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* If we are asked to block we wait on all the oldest fence of all
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* rings. We just wait for any of those fence to complete.
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*/
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#include "amdgpu.h"
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int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
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struct amdgpu_sa_manager *sa_manager,
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unsigned int size, u32 suballoc_align, u32 domain)
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{
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int r;
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r = amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE, domain,
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&sa_manager->bo, &sa_manager->gpu_addr,
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&sa_manager->cpu_ptr);
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if (r) {
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dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r);
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return r;
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}
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memset(sa_manager->cpu_ptr, 0, size);
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drm_suballoc_manager_init(&sa_manager->base, size, suballoc_align);
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return r;
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}
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void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
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struct amdgpu_sa_manager *sa_manager)
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{
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if (sa_manager->bo == NULL) {
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dev_err(adev->dev, "no bo for sa manager\n");
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return;
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}
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drm_suballoc_manager_fini(&sa_manager->base);
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amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
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}
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int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
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struct drm_suballoc **sa_bo,
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unsigned int size)
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{
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struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
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GFP_KERNEL, false, 0);
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if (IS_ERR(sa)) {
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*sa_bo = NULL;
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return PTR_ERR(sa);
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}
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*sa_bo = sa;
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return 0;
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}
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void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct drm_suballoc **sa_bo,
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struct dma_fence *fence)
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{
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if (sa_bo == NULL || *sa_bo == NULL) {
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return;
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}
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drm_suballoc_free(*sa_bo, fence);
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*sa_bo = NULL;
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}
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#if defined(CONFIG_DEBUG_FS)
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void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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struct seq_file *m)
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{
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struct drm_printer p = drm_seq_file_printer(m);
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drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager->gpu_addr);
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}
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#endif
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