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![Andy Shevchenko](/assets/img/avatar_default.png)
Enable ADC on Intel Galileo Gen 1 board. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210412131835.70212-1-andriy.shevchenko@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
374 lines
8.7 KiB
C
374 lines
8.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AD7298 SPI ADC driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/bitops.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#define AD7298_WRITE BIT(15) /* write to the control register */
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#define AD7298_REPEAT BIT(14) /* repeated conversion enable */
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#define AD7298_CH(x) BIT(13 - (x)) /* channel select */
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#define AD7298_TSENSE BIT(5) /* temperature conversion enable */
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#define AD7298_EXTREF BIT(2) /* external reference enable */
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#define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
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#define AD7298_PDD BIT(0) /* partial power down enable */
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#define AD7298_MAX_CHAN 8
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#define AD7298_INTREF_mV 2500
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#define AD7298_CH_TEMP 9
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struct ad7298_state {
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struct spi_device *spi;
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struct regulator *reg;
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unsigned ext_ref;
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struct spi_transfer ring_xfer[10];
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struct spi_transfer scan_single_xfer[3];
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struct spi_message ring_msg;
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struct spi_message scan_single_msg;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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__be16 rx_buf[12] ____cacheline_aligned;
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__be16 tx_buf[2];
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};
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#define AD7298_V_CHAN(index) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.address = index, \
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.scan_index = index, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 12, \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec ad7298_channels[] = {
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{
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.type = IIO_TEMP,
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.indexed = 1,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.address = AD7298_CH_TEMP,
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.scan_index = -1,
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.scan_type = {
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.sign = 's',
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.realbits = 32,
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.storagebits = 32,
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},
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},
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AD7298_V_CHAN(0),
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AD7298_V_CHAN(1),
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AD7298_V_CHAN(2),
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AD7298_V_CHAN(3),
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AD7298_V_CHAN(4),
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AD7298_V_CHAN(5),
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AD7298_V_CHAN(6),
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AD7298_V_CHAN(7),
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IIO_CHAN_SOFT_TIMESTAMP(8),
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};
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/*
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* ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
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*/
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static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *active_scan_mask)
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{
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struct ad7298_state *st = iio_priv(indio_dev);
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int i, m;
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unsigned short command;
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int scan_count;
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/* Now compute overall size */
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scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
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command = AD7298_WRITE | st->ext_ref;
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for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
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if (test_bit(i, active_scan_mask))
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command |= m;
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st->tx_buf[0] = cpu_to_be16(command);
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/* build spi ring message */
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st->ring_xfer[0].tx_buf = &st->tx_buf[0];
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st->ring_xfer[0].len = 2;
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st->ring_xfer[0].cs_change = 1;
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st->ring_xfer[1].tx_buf = &st->tx_buf[1];
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st->ring_xfer[1].len = 2;
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st->ring_xfer[1].cs_change = 1;
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spi_message_init(&st->ring_msg);
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spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
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spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
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for (i = 0; i < scan_count; i++) {
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st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
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st->ring_xfer[i + 2].len = 2;
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st->ring_xfer[i + 2].cs_change = 1;
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spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
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}
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/* make sure last transfer cs_change is not set */
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st->ring_xfer[i + 1].cs_change = 0;
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return 0;
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}
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static irqreturn_t ad7298_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7298_state *st = iio_priv(indio_dev);
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int b_sent;
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b_sent = spi_sync(st->spi, &st->ring_msg);
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if (b_sent)
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goto done;
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iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
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iio_get_time_ns(indio_dev));
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
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{
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int ret;
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st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
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(AD7298_CH(0) >> ch));
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ret = spi_sync(st->spi, &st->scan_single_msg);
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if (ret)
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return ret;
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return be16_to_cpu(st->rx_buf[0]);
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}
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static int ad7298_scan_temp(struct ad7298_state *st, int *val)
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{
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int ret;
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__be16 buf;
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buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
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AD7298_TAVG | st->ext_ref);
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ret = spi_write(st->spi, (u8 *)&buf, 2);
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if (ret)
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return ret;
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buf = cpu_to_be16(0);
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ret = spi_write(st->spi, (u8 *)&buf, 2);
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if (ret)
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return ret;
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usleep_range(101, 1000); /* sleep > 100us */
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ret = spi_read(st->spi, (u8 *)&buf, 2);
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if (ret)
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return ret;
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*val = sign_extend32(be16_to_cpu(buf), 11);
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return 0;
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}
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static int ad7298_get_ref_voltage(struct ad7298_state *st)
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{
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int vref;
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if (st->reg) {
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vref = regulator_get_voltage(st->reg);
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if (vref < 0)
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return vref;
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return vref / 1000;
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} else {
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return AD7298_INTREF_mV;
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}
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}
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static int ad7298_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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int ret;
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struct ad7298_state *st = iio_priv(indio_dev);
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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if (chan->address == AD7298_CH_TEMP)
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ret = ad7298_scan_temp(st, val);
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else
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ret = ad7298_scan_direct(st, chan->address);
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iio_device_release_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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if (chan->address != AD7298_CH_TEMP)
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*val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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switch (chan->type) {
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case IIO_VOLTAGE:
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*val = ad7298_get_ref_voltage(st);
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_TEMP:
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*val = ad7298_get_ref_voltage(st);
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*val2 = 10;
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return IIO_VAL_FRACTIONAL;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_OFFSET:
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*val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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static const struct iio_info ad7298_info = {
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.read_raw = &ad7298_read_raw,
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.update_scan_mode = ad7298_update_scan_mode,
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};
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static void ad7298_reg_disable(void *data)
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{
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struct regulator *reg = data;
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regulator_disable(reg);
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}
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static int ad7298_probe(struct spi_device *spi)
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{
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struct ad7298_state *st;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->reg = devm_regulator_get_optional(&spi->dev, "vref");
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if (!IS_ERR(st->reg)) {
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st->ext_ref = AD7298_EXTREF;
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} else {
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ret = PTR_ERR(st->reg);
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if (ret != -ENODEV)
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return ret;
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st->reg = NULL;
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}
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if (st->reg) {
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ret = regulator_enable(st->reg);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(&spi->dev, ad7298_reg_disable,
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st->reg);
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if (ret)
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return ret;
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}
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st->spi = spi;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = ad7298_channels;
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indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
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indio_dev->info = &ad7298_info;
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/* Setup default message */
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st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
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st->scan_single_xfer[0].len = 2;
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st->scan_single_xfer[0].cs_change = 1;
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st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
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st->scan_single_xfer[1].len = 2;
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st->scan_single_xfer[1].cs_change = 1;
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st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
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st->scan_single_xfer[2].len = 2;
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spi_message_init(&st->scan_single_msg);
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spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
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spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
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spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
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ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
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&ad7298_trigger_handler, NULL);
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if (ret)
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return ret;
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct acpi_device_id ad7298_acpi_ids[] = {
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{ "INT3494", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, ad7298_acpi_ids);
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static const struct spi_device_id ad7298_id[] = {
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{"ad7298", 0},
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{}
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};
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MODULE_DEVICE_TABLE(spi, ad7298_id);
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static struct spi_driver ad7298_driver = {
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.driver = {
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.name = "ad7298",
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.acpi_match_table = ad7298_acpi_ids,
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},
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.probe = ad7298_probe,
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.id_table = ad7298_id,
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};
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module_spi_driver(ad7298_driver);
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MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
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MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
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MODULE_LICENSE("GPL v2");
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