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ea082040fe
Allow loading of a binary containing i2c scaling sequences to be provided to the wkup_m3 firmware in order to properly scale voltage rails on the PMIC during low power modes like DeepSleep0. Proper binary format is determined by the FW in use. Code expects firmware to have 0x0C57 present as the first two bytes followed by one byte defining offset to sleep sequence followed by one byte defining offset to wake sequence and then lastly both sequences. Each sequence is a series of I2C transfers in the form: u8 length | u8 chip address | u8 byte0/reg address | u8 byte1 | u8 byteN .. The length indicates the number of bytes to transfer, including the register address. The length of each transfer is limited by the I2C buffer size of 32 bytes. Based on previous work by Russ Dill. [dfustini: replace FW_ACTION_HOTPLUG with FW_ACTION_UEVENT] Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> [dfustini: add NULL argument to rproc_da_to_va() call] Signed-off-by: Drew Fustini <dfustini@baylibre.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220426200741.712842-3-dfustini@baylibre.com
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
/*
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* TI Wakeup M3 for AMx3 SoCs Power Management Routines
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*
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* Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
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* Dave Gerlach <d-gerlach@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _LINUX_WKUP_M3_IPC_H
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#define _LINUX_WKUP_M3_IPC_H
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#define WKUP_M3_DEEPSLEEP 1
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#define WKUP_M3_STANDBY 2
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#define WKUP_M3_IDLE 3
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#include <linux/mailbox_client.h>
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struct wkup_m3_ipc_ops;
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struct wkup_m3_ipc {
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struct rproc *rproc;
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void __iomem *ipc_mem_base;
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struct device *dev;
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int mem_type;
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unsigned long resume_addr;
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int vtt_conf;
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int isolation_conf;
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int state;
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unsigned long volt_scale_offsets;
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const char *sd_fw_name;
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struct completion sync_complete;
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struct mbox_client mbox_client;
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struct mbox_chan *mbox;
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struct wkup_m3_ipc_ops *ops;
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int is_rtc_only;
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};
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struct wkup_m3_wakeup_src {
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int irq_nr;
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char src[10];
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};
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struct wkup_m3_scale_data_header {
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u16 magic;
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u8 sleep_offset;
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u8 wake_offset;
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} __packed;
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struct wkup_m3_ipc_ops {
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void (*set_mem_type)(struct wkup_m3_ipc *m3_ipc, int mem_type);
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void (*set_resume_address)(struct wkup_m3_ipc *m3_ipc, void *addr);
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int (*prepare_low_power)(struct wkup_m3_ipc *m3_ipc, int state);
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int (*finish_low_power)(struct wkup_m3_ipc *m3_ipc);
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int (*request_pm_status)(struct wkup_m3_ipc *m3_ipc);
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const char *(*request_wake_src)(struct wkup_m3_ipc *m3_ipc);
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void (*set_rtc_only)(struct wkup_m3_ipc *m3_ipc);
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};
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struct wkup_m3_ipc *wkup_m3_ipc_get(void);
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void wkup_m3_ipc_put(struct wkup_m3_ipc *m3_ipc);
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void wkup_m3_set_rtc_only_mode(void);
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#endif /* _LINUX_WKUP_M3_IPC_H */
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